emitIAS for movsx and movzx.

tests_lit/llvm2ice_tests/test_i1.ll

Index: tests_lit/llvm2ice_tests/test_i1.ll
diff --git a/tests_lit/llvm2ice_tests/test_i1.ll b/tests_lit/llvm2ice_tests/test_i1.ll
index 697f0d1fcd65b8f078cdc84366f80441eda50196..d3c15e5ffa52e6c7700d7bd20589ce33c9d07b80 100644
--- a/tests_lit/llvm2ice_tests/test_i1.ll
+++ b/tests_lit/llvm2ice_tests/test_i1.ll
@@ -79,8 +79,8 @@ entry:
 ; match the trunc instruction
 ; CHECK: and {{.*}}, 1
 ; match the zext i1 instruction
-; CHECK: movzx
-; CHECK: and {{.*}}, 1
+; CHECK: movzx [[REG:.*]], {{[a-d]l|byte ptr}}

[Jim Stichnoth, 2014/10/15 20:08:45]

Should this be something like [[REG:e.*]] to indicate the 32-bit dest register?

Also, it puzzled me that the following "and" instruction uses the 32-bit
register instead of 16-bit, but I see that lowering code explicitly uses
IceType_i32.  Something like the diff below seems to work; maybe at least mark
it with a TODO?

diff --git a/src/IceTargetLoweringX8632.cpp b/src/IceTargetLoweringX8632.cpp
index dfb1fda..36ddebe 100644
--- a/src/IceTargetLoweringX8632.cpp
+++ b/src/IceTargetLoweringX8632.cpp
@@ -2018,8 +2018,11 @@ void TargetX8632::lowerCast(const InstCast *Inst) {
     } else if (Src0RM->getType() == IceType_i1) {
       // t = Src0RM; t &= 1; Dest = t
       Constant *One = Ctx->getConstantInt32(IceType_i32, 1);
-      Variable *T = makeReg(IceType_i32);
-      _movzx(T, Src0RM);
+      Variable *T = makeReg(Dest->getType());
+      if (Dest->getType() == IceType_i8)
+        _mov(T, Src0RM);
+      else
+        _movzx(T, Src0RM);
       _and(T, One);
       _mov(Dest, T);
     } else {

[jvoung (off chromium), 2014/10/15 21:07:29]

Hmm, yes it's a bit puzzling.

Thinking about it more, the 16-bit version will end up being longer than the
32-bit version because of the 66 prefix. Since the immediate is just "1" they
can both take advantage of the shorter imm8 form.

However, the:
part does help some, because it can notice that the mov is redundant when the
same register is chosen, and eliminate it, while the movzx is not eliminated.
The 8-bit one is also one byte shorter, if the register happens to be "al". On
the other hand, the 32-bit version gives you more choices for registers?

So, would it make sense to use the Dest type for 8-bit only, and then leave a
comment about 16-bit vs 32-bit?

+; CHECK: and [[REG]], 1
 
 ; Test zext to i32.
 define internal i32 @testZextI32(i32 %arg) {
@@ -138,7 +138,7 @@ entry:
 ; match the trunc instruction
 ; CHECK: and {{.*}}, 1
 ; match the sext i1 instruction
-; CHECK: movzx [[REG:.*]],
+; CHECK: movzx e[[REG:.*]], {{[a-d]l|byte ptr}}
 ; CHECK-NEXT: shl [[REG]], 15
 ; CHECK-NEXT: sar [[REG]], 15