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| 1 // ------------------------------------------------------------------ |
| 2 // Copyright (c) 2004-2007 Atheros Corporation. All rights reserved. |
| 3 // |
| 4 // This program is free software; you can redistribute it and/or modify |
| 5 // it under the terms of the GNU General Public License version 2 as |
| 6 // published by the Free Software Foundation; |
| 7 // |
| 8 // Software distributed under the License is distributed on an "AS |
| 9 // IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or |
| 10 // implied. See the License for the specific language governing |
| 11 // rights and limitations under the License. |
| 12 // |
| 13 // |
| 14 // ------------------------------------------------------------------ |
| 15 //=================================================================== |
| 16 // Author(s): ="Atheros" |
| 17 //=================================================================== |
| 18 |
| 19 /* Copyright (C) 2009 Denali Software Inc. All rights reserved */ |
| 20 /* THIS FILE IS AUTOMATICALLY GENERATED BY DENALI BLUEPRINT, DO NOT EDIT */ |
| 21 |
| 22 |
| 23 #ifndef _ANALOG_INTF_ATHR_WLAN_REG_REG_H_ |
| 24 #define _ANALOG_INTF_ATHR_WLAN_REG_REG_H_ |
| 25 |
| 26 |
| 27 /* macros for RXRF_BIAS1 */ |
| 28 #define PHY_ANALOG_RXRF_BIAS1_ADDRESS
0x00000000 |
| 29 #define PHY_ANALOG_RXRF_BIAS1_OFFSET
0x00000000 |
| 30 #define PHY_ANALOG_RXRF_BIAS1_SPARE_MSB
0 |
| 31 #define PHY_ANALOG_RXRF_BIAS1_SPARE_LSB
0 |
| 32 #define PHY_ANALOG_RXRF_BIAS1_SPARE_MASK
0x00000001 |
| 33 #define PHY_ANALOG_RXRF_BIAS1_SPARE_GET(x)
(((x) & 0x00000001) >> 0) |
| 34 #define PHY_ANALOG_RXRF_BIAS1_SPARE_SET(x)
(((x) << 0) & 0x00000001) |
| 35 #define PHY_ANALOG_RXRF_BIAS1_PWD_IR25SPARE_MSB
3 |
| 36 #define PHY_ANALOG_RXRF_BIAS1_PWD_IR25SPARE_LSB
1 |
| 37 #define PHY_ANALOG_RXRF_BIAS1_PWD_IR25SPARE_MASK
0x0000000e |
| 38 #define PHY_ANALOG_RXRF_BIAS1_PWD_IR25SPARE_GET(x)
(((x) & 0x0000000e) >> 1) |
| 39 #define PHY_ANALOG_RXRF_BIAS1_PWD_IR25SPARE_SET(x)
(((x) << 1) & 0x0000000e) |
| 40 #define PHY_ANALOG_RXRF_BIAS1_PWD_IR25LO18_MSB
6 |
| 41 #define PHY_ANALOG_RXRF_BIAS1_PWD_IR25LO18_LSB
4 |
| 42 #define PHY_ANALOG_RXRF_BIAS1_PWD_IR25LO18_MASK
0x00000070 |
| 43 #define PHY_ANALOG_RXRF_BIAS1_PWD_IR25LO18_GET(x)
(((x) & 0x00000070) >> 4) |
| 44 #define PHY_ANALOG_RXRF_BIAS1_PWD_IR25LO18_SET(x)
(((x) << 4) & 0x00000070) |
| 45 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC25LO36_MSB
9 |
| 46 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC25LO36_LSB
7 |
| 47 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC25LO36_MASK
0x00000380 |
| 48 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC25LO36_GET(x)
(((x) & 0x00000380) >> 7) |
| 49 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC25LO36_SET(x)
(((x) << 7) & 0x00000380) |
| 50 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC25MXR2_5GH_MSB
12 |
| 51 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC25MXR2_5GH_LSB
10 |
| 52 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC25MXR2_5GH_MASK
0x00001c00 |
| 53 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC25MXR2_5GH_GET(x)
(((x) & 0x00001c00) >> 10) |
| 54 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC25MXR2_5GH_SET(x)
(((x) << 10) & 0x00001c00) |
| 55 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC25MXR5GH_MSB
15 |
| 56 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC25MXR5GH_LSB
13 |
| 57 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC25MXR5GH_MASK
0x0000e000 |
| 58 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC25MXR5GH_GET(x)
(((x) & 0x0000e000) >> 13) |
| 59 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC25MXR5GH_SET(x)
(((x) << 13) & 0x0000e000) |
| 60 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC25VGA5G_MSB
18 |
| 61 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC25VGA5G_LSB
16 |
| 62 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC25VGA5G_MASK
0x00070000 |
| 63 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC25VGA5G_GET(x)
(((x) & 0x00070000) >> 16) |
| 64 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC25VGA5G_SET(x)
(((x) << 16) & 0x00070000) |
| 65 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC75LNA5G_MSB
21 |
| 66 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC75LNA5G_LSB
19 |
| 67 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC75LNA5G_MASK
0x00380000 |
| 68 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC75LNA5G_GET(x)
(((x) & 0x00380000) >> 19) |
| 69 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC75LNA5G_SET(x)
(((x) << 19) & 0x00380000) |
| 70 #define PHY_ANALOG_RXRF_BIAS1_PWD_IR25LO24_MSB
24 |
| 71 #define PHY_ANALOG_RXRF_BIAS1_PWD_IR25LO24_LSB
22 |
| 72 #define PHY_ANALOG_RXRF_BIAS1_PWD_IR25LO24_MASK
0x01c00000 |
| 73 #define PHY_ANALOG_RXRF_BIAS1_PWD_IR25LO24_GET(x)
(((x) & 0x01c00000) >> 22) |
| 74 #define PHY_ANALOG_RXRF_BIAS1_PWD_IR25LO24_SET(x)
(((x) << 22) & 0x01c00000) |
| 75 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC25MXR2GH_MSB
27 |
| 76 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC25MXR2GH_LSB
25 |
| 77 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC25MXR2GH_MASK
0x0e000000 |
| 78 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC25MXR2GH_GET(x)
(((x) & 0x0e000000) >> 25) |
| 79 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC25MXR2GH_SET(x)
(((x) << 25) & 0x0e000000) |
| 80 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC75LNA2G_MSB
30 |
| 81 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC75LNA2G_LSB
28 |
| 82 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC75LNA2G_MASK
0x70000000 |
| 83 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC75LNA2G_GET(x)
(((x) & 0x70000000) >> 28) |
| 84 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC75LNA2G_SET(x)
(((x) << 28) & 0x70000000) |
| 85 #define PHY_ANALOG_RXRF_BIAS1_PWD_BIAS_MSB
31 |
| 86 #define PHY_ANALOG_RXRF_BIAS1_PWD_BIAS_LSB
31 |
| 87 #define PHY_ANALOG_RXRF_BIAS1_PWD_BIAS_MASK
0x80000000 |
| 88 #define PHY_ANALOG_RXRF_BIAS1_PWD_BIAS_GET(x)
(((x) & 0x80000000) >> 31) |
| 89 #define PHY_ANALOG_RXRF_BIAS1_PWD_BIAS_SET(x)
(((x) << 31) & 0x80000000) |
| 90 |
| 91 /* macros for RXRF_BIAS2 */ |
| 92 #define PHY_ANALOG_RXRF_BIAS2_ADDRESS
0x00000004 |
| 93 #define PHY_ANALOG_RXRF_BIAS2_OFFSET
0x00000004 |
| 94 #define PHY_ANALOG_RXRF_BIAS2_SPARE_MSB
0 |
| 95 #define PHY_ANALOG_RXRF_BIAS2_SPARE_LSB
0 |
| 96 #define PHY_ANALOG_RXRF_BIAS2_SPARE_MASK
0x00000001 |
| 97 #define PHY_ANALOG_RXRF_BIAS2_SPARE_GET(x)
(((x) & 0x00000001) >> 0) |
| 98 #define PHY_ANALOG_RXRF_BIAS2_SPARE_SET(x)
(((x) << 0) & 0x00000001) |
| 99 #define PHY_ANALOG_RXRF_BIAS2_PKEN_MSB
3 |
| 100 #define PHY_ANALOG_RXRF_BIAS2_PKEN_LSB
1 |
| 101 #define PHY_ANALOG_RXRF_BIAS2_PKEN_MASK
0x0000000e |
| 102 #define PHY_ANALOG_RXRF_BIAS2_PKEN_GET(x)
(((x) & 0x0000000e) >> 1) |
| 103 #define PHY_ANALOG_RXRF_BIAS2_PKEN_SET(x)
(((x) << 1) & 0x0000000e) |
| 104 #define PHY_ANALOG_RXRF_BIAS2_VCMVALUE_MSB
6 |
| 105 #define PHY_ANALOG_RXRF_BIAS2_VCMVALUE_LSB
4 |
| 106 #define PHY_ANALOG_RXRF_BIAS2_VCMVALUE_MASK
0x00000070 |
| 107 #define PHY_ANALOG_RXRF_BIAS2_VCMVALUE_GET(x)
(((x) & 0x00000070) >> 4) |
| 108 #define PHY_ANALOG_RXRF_BIAS2_VCMVALUE_SET(x)
(((x) << 4) & 0x00000070) |
| 109 #define PHY_ANALOG_RXRF_BIAS2_PWD_VCMBUF_MSB
7 |
| 110 #define PHY_ANALOG_RXRF_BIAS2_PWD_VCMBUF_LSB
7 |
| 111 #define PHY_ANALOG_RXRF_BIAS2_PWD_VCMBUF_MASK
0x00000080 |
| 112 #define PHY_ANALOG_RXRF_BIAS2_PWD_VCMBUF_GET(x)
(((x) & 0x00000080) >> 7) |
| 113 #define PHY_ANALOG_RXRF_BIAS2_PWD_VCMBUF_SET(x)
(((x) << 7) & 0x00000080) |
| 114 #define PHY_ANALOG_RXRF_BIAS2_PWD_IR25SPAREH_MSB
10 |
| 115 #define PHY_ANALOG_RXRF_BIAS2_PWD_IR25SPAREH_LSB
8 |
| 116 #define PHY_ANALOG_RXRF_BIAS2_PWD_IR25SPAREH_MASK
0x00000700 |
| 117 #define PHY_ANALOG_RXRF_BIAS2_PWD_IR25SPAREH_GET(x)
(((x) & 0x00000700) >> 8) |
| 118 #define PHY_ANALOG_RXRF_BIAS2_PWD_IR25SPAREH_SET(x)
(((x) << 8) & 0x00000700) |
| 119 #define PHY_ANALOG_RXRF_BIAS2_PWD_IR25SPARE_MSB
13 |
| 120 #define PHY_ANALOG_RXRF_BIAS2_PWD_IR25SPARE_LSB
11 |
| 121 #define PHY_ANALOG_RXRF_BIAS2_PWD_IR25SPARE_MASK
0x00003800 |
| 122 #define PHY_ANALOG_RXRF_BIAS2_PWD_IR25SPARE_GET(x)
(((x) & 0x00003800) >> 11) |
| 123 #define PHY_ANALOG_RXRF_BIAS2_PWD_IR25SPARE_SET(x)
(((x) << 11) & 0x00003800) |
| 124 #define PHY_ANALOG_RXRF_BIAS2_PWD_IC25LNABUF_MSB
16 |
| 125 #define PHY_ANALOG_RXRF_BIAS2_PWD_IC25LNABUF_LSB
14 |
| 126 #define PHY_ANALOG_RXRF_BIAS2_PWD_IC25LNABUF_MASK
0x0001c000 |
| 127 #define PHY_ANALOG_RXRF_BIAS2_PWD_IC25LNABUF_GET(x)
(((x) & 0x0001c000) >> 14) |
| 128 #define PHY_ANALOG_RXRF_BIAS2_PWD_IC25LNABUF_SET(x)
(((x) << 14) & 0x0001c000) |
| 129 #define PHY_ANALOG_RXRF_BIAS2_PWD_IR25AGCH_MSB
19 |
| 130 #define PHY_ANALOG_RXRF_BIAS2_PWD_IR25AGCH_LSB
17 |
| 131 #define PHY_ANALOG_RXRF_BIAS2_PWD_IR25AGCH_MASK
0x000e0000 |
| 132 #define PHY_ANALOG_RXRF_BIAS2_PWD_IR25AGCH_GET(x)
(((x) & 0x000e0000) >> 17) |
| 133 #define PHY_ANALOG_RXRF_BIAS2_PWD_IR25AGCH_SET(x)
(((x) << 17) & 0x000e0000) |
| 134 #define PHY_ANALOG_RXRF_BIAS2_PWD_IR25AGC_MSB
22 |
| 135 #define PHY_ANALOG_RXRF_BIAS2_PWD_IR25AGC_LSB
20 |
| 136 #define PHY_ANALOG_RXRF_BIAS2_PWD_IR25AGC_MASK
0x00700000 |
| 137 #define PHY_ANALOG_RXRF_BIAS2_PWD_IR25AGC_GET(x)
(((x) & 0x00700000) >> 20) |
| 138 #define PHY_ANALOG_RXRF_BIAS2_PWD_IR25AGC_SET(x)
(((x) << 20) & 0x00700000) |
| 139 #define PHY_ANALOG_RXRF_BIAS2_PWD_IC25AGC_MSB
25 |
| 140 #define PHY_ANALOG_RXRF_BIAS2_PWD_IC25AGC_LSB
23 |
| 141 #define PHY_ANALOG_RXRF_BIAS2_PWD_IC25AGC_MASK
0x03800000 |
| 142 #define PHY_ANALOG_RXRF_BIAS2_PWD_IC25AGC_GET(x)
(((x) & 0x03800000) >> 23) |
| 143 #define PHY_ANALOG_RXRF_BIAS2_PWD_IC25AGC_SET(x)
(((x) << 23) & 0x03800000) |
| 144 #define PHY_ANALOG_RXRF_BIAS2_PWD_IC25VCMBUF_MSB
28 |
| 145 #define PHY_ANALOG_RXRF_BIAS2_PWD_IC25VCMBUF_LSB
26 |
| 146 #define PHY_ANALOG_RXRF_BIAS2_PWD_IC25VCMBUF_MASK
0x1c000000 |
| 147 #define PHY_ANALOG_RXRF_BIAS2_PWD_IC25VCMBUF_GET(x)
(((x) & 0x1c000000) >> 26) |
| 148 #define PHY_ANALOG_RXRF_BIAS2_PWD_IC25VCMBUF_SET(x)
(((x) << 26) & 0x1c000000) |
| 149 #define PHY_ANALOG_RXRF_BIAS2_PWD_IR25VCM_MSB
31 |
| 150 #define PHY_ANALOG_RXRF_BIAS2_PWD_IR25VCM_LSB
29 |
| 151 #define PHY_ANALOG_RXRF_BIAS2_PWD_IR25VCM_MASK
0xe0000000 |
| 152 #define PHY_ANALOG_RXRF_BIAS2_PWD_IR25VCM_GET(x)
(((x) & 0xe0000000) >> 29) |
| 153 #define PHY_ANALOG_RXRF_BIAS2_PWD_IR25VCM_SET(x)
(((x) << 29) & 0xe0000000) |
| 154 |
| 155 /* macros for RXRF_GAINSTAGES */ |
| 156 #define PHY_ANALOG_RXRF_GAINSTAGES_ADDRESS
0x00000008 |
| 157 #define PHY_ANALOG_RXRF_GAINSTAGES_OFFSET
0x00000008 |
| 158 #define PHY_ANALOG_RXRF_GAINSTAGES_SPARE_MSB
0 |
| 159 #define PHY_ANALOG_RXRF_GAINSTAGES_SPARE_LSB
0 |
| 160 #define PHY_ANALOG_RXRF_GAINSTAGES_SPARE_MASK
0x00000001 |
| 161 #define PHY_ANALOG_RXRF_GAINSTAGES_SPARE_GET(x)
(((x) & 0x00000001) >> 0) |
| 162 #define PHY_ANALOG_RXRF_GAINSTAGES_SPARE_SET(x)
(((x) << 0) & 0x00000001) |
| 163 #define PHY_ANALOG_RXRF_GAINSTAGES_LNAON_CALDC_MSB
1 |
| 164 #define PHY_ANALOG_RXRF_GAINSTAGES_LNAON_CALDC_LSB
1 |
| 165 #define PHY_ANALOG_RXRF_GAINSTAGES_LNAON_CALDC_MASK
0x00000002 |
| 166 #define PHY_ANALOG_RXRF_GAINSTAGES_LNAON_CALDC_GET(x)
(((x) & 0x00000002) >> 1) |
| 167 #define PHY_ANALOG_RXRF_GAINSTAGES_LNAON_CALDC_SET(x)
(((x) << 1) & 0x00000002) |
| 168 #define PHY_ANALOG_RXRF_GAINSTAGES_VGA5G_CAP_MSB
3 |
| 169 #define PHY_ANALOG_RXRF_GAINSTAGES_VGA5G_CAP_LSB
2 |
| 170 #define PHY_ANALOG_RXRF_GAINSTAGES_VGA5G_CAP_MASK
0x0000000c |
| 171 #define PHY_ANALOG_RXRF_GAINSTAGES_VGA5G_CAP_GET(x)
(((x) & 0x0000000c) >> 2) |
| 172 #define PHY_ANALOG_RXRF_GAINSTAGES_VGA5G_CAP_SET(x)
(((x) << 2) & 0x0000000c) |
| 173 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA5G_CAP_MSB
5 |
| 174 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA5G_CAP_LSB
4 |
| 175 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA5G_CAP_MASK
0x00000030 |
| 176 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA5G_CAP_GET(x)
(((x) & 0x00000030) >> 4) |
| 177 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA5G_CAP_SET(x)
(((x) << 4) & 0x00000030) |
| 178 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA5G_SHORTINP_MSB
6 |
| 179 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA5G_SHORTINP_LSB
6 |
| 180 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA5G_SHORTINP_MASK
0x00000040 |
| 181 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA5G_SHORTINP_GET(x)
(((x) & 0x00000040) >> 6) |
| 182 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA5G_SHORTINP_SET(x)
(((x) << 6) & 0x00000040) |
| 183 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LO5G_MSB
7 |
| 184 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LO5G_LSB
7 |
| 185 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LO5G_MASK
0x00000080 |
| 186 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LO5G_GET(x)
(((x) & 0x00000080) >> 7) |
| 187 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LO5G_SET(x)
(((x) << 7) & 0x00000080) |
| 188 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_VGA5G_MSB
8 |
| 189 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_VGA5G_LSB
8 |
| 190 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_VGA5G_MASK
0x00000100 |
| 191 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_VGA5G_GET(x)
(((x) & 0x00000100) >> 8) |
| 192 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_VGA5G_SET(x)
(((x) << 8) & 0x00000100) |
| 193 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_MXR5G_MSB
9 |
| 194 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_MXR5G_LSB
9 |
| 195 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_MXR5G_MASK
0x00000200 |
| 196 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_MXR5G_GET(x)
(((x) & 0x00000200) >> 9) |
| 197 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_MXR5G_SET(x)
(((x) << 9) & 0x00000200) |
| 198 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LNA5G_MSB
10 |
| 199 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LNA5G_LSB
10 |
| 200 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LNA5G_MASK
0x00000400 |
| 201 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LNA5G_GET(x)
(((x) & 0x00000400) >> 10) |
| 202 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LNA5G_SET(x)
(((x) << 10) & 0x00000400) |
| 203 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_CAP_MSB
12 |
| 204 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_CAP_LSB
11 |
| 205 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_CAP_MASK
0x00001800 |
| 206 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_CAP_GET(x)
(((x) & 0x00001800) >> 11) |
| 207 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_CAP_SET(x)
(((x) << 11) & 0x00001800) |
| 208 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_SHORTINP_MSB
13 |
| 209 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_SHORTINP_LSB
13 |
| 210 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_SHORTINP_MASK
0x00002000 |
| 211 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_SHORTINP_GET(x)
(((x) & 0x00002000) >> 13) |
| 212 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_SHORTINP_SET(x)
(((x) << 13) & 0x00002000) |
| 213 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_LP_MSB
14 |
| 214 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_LP_LSB
14 |
| 215 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_LP_MASK
0x00004000 |
| 216 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_LP_GET(x)
(((x) & 0x00004000) >> 14) |
| 217 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_LP_SET(x)
(((x) << 14) & 0x00004000) |
| 218 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LO2G_MSB
15 |
| 219 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LO2G_LSB
15 |
| 220 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LO2G_MASK
0x00008000 |
| 221 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LO2G_GET(x)
(((x) & 0x00008000) >> 15) |
| 222 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LO2G_SET(x)
(((x) << 15) & 0x00008000) |
| 223 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_MXR2G_MSB
16 |
| 224 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_MXR2G_LSB
16 |
| 225 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_MXR2G_MASK
0x00010000 |
| 226 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_MXR2G_GET(x)
(((x) & 0x00010000) >> 16) |
| 227 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_MXR2G_SET(x)
(((x) << 16) & 0x00010000) |
| 228 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LNA2G_MSB
17 |
| 229 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LNA2G_LSB
17 |
| 230 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LNA2G_MASK
0x00020000 |
| 231 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LNA2G_GET(x)
(((x) & 0x00020000) >> 17) |
| 232 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LNA2G_SET(x)
(((x) << 17) & 0x00020000) |
| 233 #define PHY_ANALOG_RXRF_GAINSTAGES_MXR5G_GAIN_OVR_MSB
19 |
| 234 #define PHY_ANALOG_RXRF_GAINSTAGES_MXR5G_GAIN_OVR_LSB
18 |
| 235 #define PHY_ANALOG_RXRF_GAINSTAGES_MXR5G_GAIN_OVR_MASK
0x000c0000 |
| 236 #define PHY_ANALOG_RXRF_GAINSTAGES_MXR5G_GAIN_OVR_GET(x)
(((x) & 0x000c0000) >> 18) |
| 237 #define PHY_ANALOG_RXRF_GAINSTAGES_MXR5G_GAIN_OVR_SET(x)
(((x) << 18) & 0x000c0000) |
| 238 #define PHY_ANALOG_RXRF_GAINSTAGES_VGA5G_GAIN_OVR_MSB
22 |
| 239 #define PHY_ANALOG_RXRF_GAINSTAGES_VGA5G_GAIN_OVR_LSB
20 |
| 240 #define PHY_ANALOG_RXRF_GAINSTAGES_VGA5G_GAIN_OVR_MASK
0x00700000 |
| 241 #define PHY_ANALOG_RXRF_GAINSTAGES_VGA5G_GAIN_OVR_GET(x)
(((x) & 0x00700000) >> 20) |
| 242 #define PHY_ANALOG_RXRF_GAINSTAGES_VGA5G_GAIN_OVR_SET(x)
(((x) << 20) & 0x00700000) |
| 243 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA5G_GAIN_OVR_MSB
25 |
| 244 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA5G_GAIN_OVR_LSB
23 |
| 245 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA5G_GAIN_OVR_MASK
0x03800000 |
| 246 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA5G_GAIN_OVR_GET(x)
(((x) & 0x03800000) >> 23) |
| 247 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA5G_GAIN_OVR_SET(x)
(((x) << 23) & 0x03800000) |
| 248 #define PHY_ANALOG_RXRF_GAINSTAGES_MXR2G_GAIN_OVR_MSB
27 |
| 249 #define PHY_ANALOG_RXRF_GAINSTAGES_MXR2G_GAIN_OVR_LSB
26 |
| 250 #define PHY_ANALOG_RXRF_GAINSTAGES_MXR2G_GAIN_OVR_MASK
0x0c000000 |
| 251 #define PHY_ANALOG_RXRF_GAINSTAGES_MXR2G_GAIN_OVR_GET(x)
(((x) & 0x0c000000) >> 26) |
| 252 #define PHY_ANALOG_RXRF_GAINSTAGES_MXR2G_GAIN_OVR_SET(x)
(((x) << 26) & 0x0c000000) |
| 253 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_GAIN_OVR_MSB
30 |
| 254 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_GAIN_OVR_LSB
28 |
| 255 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_GAIN_OVR_MASK
0x70000000 |
| 256 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_GAIN_OVR_GET(x)
(((x) & 0x70000000) >> 28) |
| 257 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_GAIN_OVR_SET(x)
(((x) << 28) & 0x70000000) |
| 258 #define PHY_ANALOG_RXRF_GAINSTAGES_RX_OVERRIDE_MSB
31 |
| 259 #define PHY_ANALOG_RXRF_GAINSTAGES_RX_OVERRIDE_LSB
31 |
| 260 #define PHY_ANALOG_RXRF_GAINSTAGES_RX_OVERRIDE_MASK
0x80000000 |
| 261 #define PHY_ANALOG_RXRF_GAINSTAGES_RX_OVERRIDE_GET(x)
(((x) & 0x80000000) >> 31) |
| 262 #define PHY_ANALOG_RXRF_GAINSTAGES_RX_OVERRIDE_SET(x)
(((x) << 31) & 0x80000000) |
| 263 |
| 264 /* macros for RXRF_AGC */ |
| 265 #define PHY_ANALOG_RXRF_AGC_ADDRESS
0x0000000c |
| 266 #define PHY_ANALOG_RXRF_AGC_OFFSET
0x0000000c |
| 267 #define PHY_ANALOG_RXRF_AGC_RF5G_ON_DURING_CALPA_MSB
0 |
| 268 #define PHY_ANALOG_RXRF_AGC_RF5G_ON_DURING_CALPA_LSB
0 |
| 269 #define PHY_ANALOG_RXRF_AGC_RF5G_ON_DURING_CALPA_MASK
0x00000001 |
| 270 #define PHY_ANALOG_RXRF_AGC_RF5G_ON_DURING_CALPA_GET(x)
(((x) & 0x00000001) >> 0) |
| 271 #define PHY_ANALOG_RXRF_AGC_RF5G_ON_DURING_CALPA_SET(x)
(((x) << 0) & 0x00000001) |
| 272 #define PHY_ANALOG_RXRF_AGC_RF2G_ON_DURING_CALPA_MSB
1 |
| 273 #define PHY_ANALOG_RXRF_AGC_RF2G_ON_DURING_CALPA_LSB
1 |
| 274 #define PHY_ANALOG_RXRF_AGC_RF2G_ON_DURING_CALPA_MASK
0x00000002 |
| 275 #define PHY_ANALOG_RXRF_AGC_RF2G_ON_DURING_CALPA_GET(x)
(((x) & 0x00000002) >> 1) |
| 276 #define PHY_ANALOG_RXRF_AGC_RF2G_ON_DURING_CALPA_SET(x)
(((x) << 1) & 0x00000002) |
| 277 #define PHY_ANALOG_RXRF_AGC_AGC_OUT_MSB
2 |
| 278 #define PHY_ANALOG_RXRF_AGC_AGC_OUT_LSB
2 |
| 279 #define PHY_ANALOG_RXRF_AGC_AGC_OUT_MASK
0x00000004 |
| 280 #define PHY_ANALOG_RXRF_AGC_AGC_OUT_GET(x)
(((x) & 0x00000004) >> 2) |
| 281 #define PHY_ANALOG_RXRF_AGC_LNABUFGAIN2X_MSB
3 |
| 282 #define PHY_ANALOG_RXRF_AGC_LNABUFGAIN2X_LSB
3 |
| 283 #define PHY_ANALOG_RXRF_AGC_LNABUFGAIN2X_MASK
0x00000008 |
| 284 #define PHY_ANALOG_RXRF_AGC_LNABUFGAIN2X_GET(x)
(((x) & 0x00000008) >> 3) |
| 285 #define PHY_ANALOG_RXRF_AGC_LNABUFGAIN2X_SET(x)
(((x) << 3) & 0x00000008) |
| 286 #define PHY_ANALOG_RXRF_AGC_LNABUF_PWD_OVR_MSB
4 |
| 287 #define PHY_ANALOG_RXRF_AGC_LNABUF_PWD_OVR_LSB
4 |
| 288 #define PHY_ANALOG_RXRF_AGC_LNABUF_PWD_OVR_MASK
0x00000010 |
| 289 #define PHY_ANALOG_RXRF_AGC_LNABUF_PWD_OVR_GET(x)
(((x) & 0x00000010) >> 4) |
| 290 #define PHY_ANALOG_RXRF_AGC_LNABUF_PWD_OVR_SET(x)
(((x) << 4) & 0x00000010) |
| 291 #define PHY_ANALOG_RXRF_AGC_PWD_LNABUF_MSB
5 |
| 292 #define PHY_ANALOG_RXRF_AGC_PWD_LNABUF_LSB
5 |
| 293 #define PHY_ANALOG_RXRF_AGC_PWD_LNABUF_MASK
0x00000020 |
| 294 #define PHY_ANALOG_RXRF_AGC_PWD_LNABUF_GET(x)
(((x) & 0x00000020) >> 5) |
| 295 #define PHY_ANALOG_RXRF_AGC_PWD_LNABUF_SET(x)
(((x) << 5) & 0x00000020) |
| 296 #define PHY_ANALOG_RXRF_AGC_AGC_FALL_CTRL_MSB
8 |
| 297 #define PHY_ANALOG_RXRF_AGC_AGC_FALL_CTRL_LSB
6 |
| 298 #define PHY_ANALOG_RXRF_AGC_AGC_FALL_CTRL_MASK
0x000001c0 |
| 299 #define PHY_ANALOG_RXRF_AGC_AGC_FALL_CTRL_GET(x)
(((x) & 0x000001c0) >> 6) |
| 300 #define PHY_ANALOG_RXRF_AGC_AGC_FALL_CTRL_SET(x)
(((x) << 6) & 0x000001c0) |
| 301 #define PHY_ANALOG_RXRF_AGC_AGC5G_CALDAC_OVR_MSB
14 |
| 302 #define PHY_ANALOG_RXRF_AGC_AGC5G_CALDAC_OVR_LSB
9 |
| 303 #define PHY_ANALOG_RXRF_AGC_AGC5G_CALDAC_OVR_MASK
0x00007e00 |
| 304 #define PHY_ANALOG_RXRF_AGC_AGC5G_CALDAC_OVR_GET(x)
(((x) & 0x00007e00) >> 9) |
| 305 #define PHY_ANALOG_RXRF_AGC_AGC5G_CALDAC_OVR_SET(x)
(((x) << 9) & 0x00007e00) |
| 306 #define PHY_ANALOG_RXRF_AGC_AGC5G_DBDAC_OVR_MSB
18 |
| 307 #define PHY_ANALOG_RXRF_AGC_AGC5G_DBDAC_OVR_LSB
15 |
| 308 #define PHY_ANALOG_RXRF_AGC_AGC5G_DBDAC_OVR_MASK
0x00078000 |
| 309 #define PHY_ANALOG_RXRF_AGC_AGC5G_DBDAC_OVR_GET(x)
(((x) & 0x00078000) >> 15) |
| 310 #define PHY_ANALOG_RXRF_AGC_AGC5G_DBDAC_OVR_SET(x)
(((x) << 15) & 0x00078000) |
| 311 #define PHY_ANALOG_RXRF_AGC_AGC2G_CALDAC_OVR_MSB
24 |
| 312 #define PHY_ANALOG_RXRF_AGC_AGC2G_CALDAC_OVR_LSB
19 |
| 313 #define PHY_ANALOG_RXRF_AGC_AGC2G_CALDAC_OVR_MASK
0x01f80000 |
| 314 #define PHY_ANALOG_RXRF_AGC_AGC2G_CALDAC_OVR_GET(x)
(((x) & 0x01f80000) >> 19) |
| 315 #define PHY_ANALOG_RXRF_AGC_AGC2G_CALDAC_OVR_SET(x)
(((x) << 19) & 0x01f80000) |
| 316 #define PHY_ANALOG_RXRF_AGC_AGC2G_DBDAC_OVR_MSB
28 |
| 317 #define PHY_ANALOG_RXRF_AGC_AGC2G_DBDAC_OVR_LSB
25 |
| 318 #define PHY_ANALOG_RXRF_AGC_AGC2G_DBDAC_OVR_MASK
0x1e000000 |
| 319 #define PHY_ANALOG_RXRF_AGC_AGC2G_DBDAC_OVR_GET(x)
(((x) & 0x1e000000) >> 25) |
| 320 #define PHY_ANALOG_RXRF_AGC_AGC2G_DBDAC_OVR_SET(x)
(((x) << 25) & 0x1e000000) |
| 321 #define PHY_ANALOG_RXRF_AGC_AGC_CAL_OVR_MSB
29 |
| 322 #define PHY_ANALOG_RXRF_AGC_AGC_CAL_OVR_LSB
29 |
| 323 #define PHY_ANALOG_RXRF_AGC_AGC_CAL_OVR_MASK
0x20000000 |
| 324 #define PHY_ANALOG_RXRF_AGC_AGC_CAL_OVR_GET(x)
(((x) & 0x20000000) >> 29) |
| 325 #define PHY_ANALOG_RXRF_AGC_AGC_CAL_OVR_SET(x)
(((x) << 29) & 0x20000000) |
| 326 #define PHY_ANALOG_RXRF_AGC_AGC_ON_OVR_MSB
30 |
| 327 #define PHY_ANALOG_RXRF_AGC_AGC_ON_OVR_LSB
30 |
| 328 #define PHY_ANALOG_RXRF_AGC_AGC_ON_OVR_MASK
0x40000000 |
| 329 #define PHY_ANALOG_RXRF_AGC_AGC_ON_OVR_GET(x)
(((x) & 0x40000000) >> 30) |
| 330 #define PHY_ANALOG_RXRF_AGC_AGC_ON_OVR_SET(x)
(((x) << 30) & 0x40000000) |
| 331 #define PHY_ANALOG_RXRF_AGC_AGC_OVERRIDE_MSB
31 |
| 332 #define PHY_ANALOG_RXRF_AGC_AGC_OVERRIDE_LSB
31 |
| 333 #define PHY_ANALOG_RXRF_AGC_AGC_OVERRIDE_MASK
0x80000000 |
| 334 #define PHY_ANALOG_RXRF_AGC_AGC_OVERRIDE_GET(x)
(((x) & 0x80000000) >> 31) |
| 335 #define PHY_ANALOG_RXRF_AGC_AGC_OVERRIDE_SET(x)
(((x) << 31) & 0x80000000) |
| 336 |
| 337 /* macros for TXRF1 */ |
| 338 #define PHY_ANALOG_TXRF1_ADDRESS
0x00000040 |
| 339 #define PHY_ANALOG_TXRF1_OFFSET
0x00000040 |
| 340 #define PHY_ANALOG_TXRF1_PDLOBUF5G_MSB
0 |
| 341 #define PHY_ANALOG_TXRF1_PDLOBUF5G_LSB
0 |
| 342 #define PHY_ANALOG_TXRF1_PDLOBUF5G_MASK
0x00000001 |
| 343 #define PHY_ANALOG_TXRF1_PDLOBUF5G_GET(x)
(((x) & 0x00000001) >> 0) |
| 344 #define PHY_ANALOG_TXRF1_PDLOBUF5G_SET(x)
(((x) << 0) & 0x00000001) |
| 345 #define PHY_ANALOG_TXRF1_PDLODIV5G_MSB
1 |
| 346 #define PHY_ANALOG_TXRF1_PDLODIV5G_LSB
1 |
| 347 #define PHY_ANALOG_TXRF1_PDLODIV5G_MASK
0x00000002 |
| 348 #define PHY_ANALOG_TXRF1_PDLODIV5G_GET(x)
(((x) & 0x00000002) >> 1) |
| 349 #define PHY_ANALOG_TXRF1_PDLODIV5G_SET(x)
(((x) << 1) & 0x00000002) |
| 350 #define PHY_ANALOG_TXRF1_LOBUF5GFORCED_MSB
2 |
| 351 #define PHY_ANALOG_TXRF1_LOBUF5GFORCED_LSB
2 |
| 352 #define PHY_ANALOG_TXRF1_LOBUF5GFORCED_MASK
0x00000004 |
| 353 #define PHY_ANALOG_TXRF1_LOBUF5GFORCED_GET(x)
(((x) & 0x00000004) >> 2) |
| 354 #define PHY_ANALOG_TXRF1_LOBUF5GFORCED_SET(x)
(((x) << 2) & 0x00000004) |
| 355 #define PHY_ANALOG_TXRF1_LODIV5GFORCED_MSB
3 |
| 356 #define PHY_ANALOG_TXRF1_LODIV5GFORCED_LSB
3 |
| 357 #define PHY_ANALOG_TXRF1_LODIV5GFORCED_MASK
0x00000008 |
| 358 #define PHY_ANALOG_TXRF1_LODIV5GFORCED_GET(x)
(((x) & 0x00000008) >> 3) |
| 359 #define PHY_ANALOG_TXRF1_LODIV5GFORCED_SET(x)
(((x) << 3) & 0x00000008) |
| 360 #define PHY_ANALOG_TXRF1_PADRV2GN5G_MSB
7 |
| 361 #define PHY_ANALOG_TXRF1_PADRV2GN5G_LSB
4 |
| 362 #define PHY_ANALOG_TXRF1_PADRV2GN5G_MASK
0x000000f0 |
| 363 #define PHY_ANALOG_TXRF1_PADRV2GN5G_GET(x)
(((x) & 0x000000f0) >> 4) |
| 364 #define PHY_ANALOG_TXRF1_PADRV2GN5G_SET(x)
(((x) << 4) & 0x000000f0) |
| 365 #define PHY_ANALOG_TXRF1_PADRV3GN5G_MSB
11 |
| 366 #define PHY_ANALOG_TXRF1_PADRV3GN5G_LSB
8 |
| 367 #define PHY_ANALOG_TXRF1_PADRV3GN5G_MASK
0x00000f00 |
| 368 #define PHY_ANALOG_TXRF1_PADRV3GN5G_GET(x)
(((x) & 0x00000f00) >> 8) |
| 369 #define PHY_ANALOG_TXRF1_PADRV3GN5G_SET(x)
(((x) << 8) & 0x00000f00) |
| 370 #define PHY_ANALOG_TXRF1_PADRV4GN5G_MSB
15 |
| 371 #define PHY_ANALOG_TXRF1_PADRV4GN5G_LSB
12 |
| 372 #define PHY_ANALOG_TXRF1_PADRV4GN5G_MASK
0x0000f000 |
| 373 #define PHY_ANALOG_TXRF1_PADRV4GN5G_GET(x)
(((x) & 0x0000f000) >> 12) |
| 374 #define PHY_ANALOG_TXRF1_PADRV4GN5G_SET(x)
(((x) << 12) & 0x0000f000) |
| 375 #define PHY_ANALOG_TXRF1_LOCALTXGAIN5G_MSB
16 |
| 376 #define PHY_ANALOG_TXRF1_LOCALTXGAIN5G_LSB
16 |
| 377 #define PHY_ANALOG_TXRF1_LOCALTXGAIN5G_MASK
0x00010000 |
| 378 #define PHY_ANALOG_TXRF1_LOCALTXGAIN5G_GET(x)
(((x) & 0x00010000) >> 16) |
| 379 #define PHY_ANALOG_TXRF1_LOCALTXGAIN5G_SET(x)
(((x) << 16) & 0x00010000) |
| 380 #define PHY_ANALOG_TXRF1_PDOUT2G_MSB
17 |
| 381 #define PHY_ANALOG_TXRF1_PDOUT2G_LSB
17 |
| 382 #define PHY_ANALOG_TXRF1_PDOUT2G_MASK
0x00020000 |
| 383 #define PHY_ANALOG_TXRF1_PDOUT2G_GET(x)
(((x) & 0x00020000) >> 17) |
| 384 #define PHY_ANALOG_TXRF1_PDOUT2G_SET(x)
(((x) << 17) & 0x00020000) |
| 385 #define PHY_ANALOG_TXRF1_PDDR2G_MSB
18 |
| 386 #define PHY_ANALOG_TXRF1_PDDR2G_LSB
18 |
| 387 #define PHY_ANALOG_TXRF1_PDDR2G_MASK
0x00040000 |
| 388 #define PHY_ANALOG_TXRF1_PDDR2G_GET(x)
(((x) & 0x00040000) >> 18) |
| 389 #define PHY_ANALOG_TXRF1_PDDR2G_SET(x)
(((x) << 18) & 0x00040000) |
| 390 #define PHY_ANALOG_TXRF1_PDMXR2G_MSB
19 |
| 391 #define PHY_ANALOG_TXRF1_PDMXR2G_LSB
19 |
| 392 #define PHY_ANALOG_TXRF1_PDMXR2G_MASK
0x00080000 |
| 393 #define PHY_ANALOG_TXRF1_PDMXR2G_GET(x)
(((x) & 0x00080000) >> 19) |
| 394 #define PHY_ANALOG_TXRF1_PDMXR2G_SET(x)
(((x) << 19) & 0x00080000) |
| 395 #define PHY_ANALOG_TXRF1_PDLOBUF2G_MSB
20 |
| 396 #define PHY_ANALOG_TXRF1_PDLOBUF2G_LSB
20 |
| 397 #define PHY_ANALOG_TXRF1_PDLOBUF2G_MASK
0x00100000 |
| 398 #define PHY_ANALOG_TXRF1_PDLOBUF2G_GET(x)
(((x) & 0x00100000) >> 20) |
| 399 #define PHY_ANALOG_TXRF1_PDLOBUF2G_SET(x)
(((x) << 20) & 0x00100000) |
| 400 #define PHY_ANALOG_TXRF1_PDLODIV2G_MSB
21 |
| 401 #define PHY_ANALOG_TXRF1_PDLODIV2G_LSB
21 |
| 402 #define PHY_ANALOG_TXRF1_PDLODIV2G_MASK
0x00200000 |
| 403 #define PHY_ANALOG_TXRF1_PDLODIV2G_GET(x)
(((x) & 0x00200000) >> 21) |
| 404 #define PHY_ANALOG_TXRF1_PDLODIV2G_SET(x)
(((x) << 21) & 0x00200000) |
| 405 #define PHY_ANALOG_TXRF1_LOBUF2GFORCED_MSB
22 |
| 406 #define PHY_ANALOG_TXRF1_LOBUF2GFORCED_LSB
22 |
| 407 #define PHY_ANALOG_TXRF1_LOBUF2GFORCED_MASK
0x00400000 |
| 408 #define PHY_ANALOG_TXRF1_LOBUF2GFORCED_GET(x)
(((x) & 0x00400000) >> 22) |
| 409 #define PHY_ANALOG_TXRF1_LOBUF2GFORCED_SET(x)
(((x) << 22) & 0x00400000) |
| 410 #define PHY_ANALOG_TXRF1_LODIV2GFORCED_MSB
23 |
| 411 #define PHY_ANALOG_TXRF1_LODIV2GFORCED_LSB
23 |
| 412 #define PHY_ANALOG_TXRF1_LODIV2GFORCED_MASK
0x00800000 |
| 413 #define PHY_ANALOG_TXRF1_LODIV2GFORCED_GET(x)
(((x) & 0x00800000) >> 23) |
| 414 #define PHY_ANALOG_TXRF1_LODIV2GFORCED_SET(x)
(((x) << 23) & 0x00800000) |
| 415 #define PHY_ANALOG_TXRF1_PADRVGN2G_MSB
30 |
| 416 #define PHY_ANALOG_TXRF1_PADRVGN2G_LSB
24 |
| 417 #define PHY_ANALOG_TXRF1_PADRVGN2G_MASK
0x7f000000 |
| 418 #define PHY_ANALOG_TXRF1_PADRVGN2G_GET(x)
(((x) & 0x7f000000) >> 24) |
| 419 #define PHY_ANALOG_TXRF1_PADRVGN2G_SET(x)
(((x) << 24) & 0x7f000000) |
| 420 #define PHY_ANALOG_TXRF1_LOCALTXGAIN2G_MSB
31 |
| 421 #define PHY_ANALOG_TXRF1_LOCALTXGAIN2G_LSB
31 |
| 422 #define PHY_ANALOG_TXRF1_LOCALTXGAIN2G_MASK
0x80000000 |
| 423 #define PHY_ANALOG_TXRF1_LOCALTXGAIN2G_GET(x)
(((x) & 0x80000000) >> 31) |
| 424 #define PHY_ANALOG_TXRF1_LOCALTXGAIN2G_SET(x)
(((x) << 31) & 0x80000000) |
| 425 |
| 426 /* macros for TXRF2 */ |
| 427 #define PHY_ANALOG_TXRF2_ADDRESS
0x00000044 |
| 428 #define PHY_ANALOG_TXRF2_OFFSET
0x00000044 |
| 429 #define PHY_ANALOG_TXRF2_D3B5G_MSB
2 |
| 430 #define PHY_ANALOG_TXRF2_D3B5G_LSB
0 |
| 431 #define PHY_ANALOG_TXRF2_D3B5G_MASK
0x00000007 |
| 432 #define PHY_ANALOG_TXRF2_D3B5G_GET(x)
(((x) & 0x00000007) >> 0) |
| 433 #define PHY_ANALOG_TXRF2_D3B5G_SET(x)
(((x) << 0) & 0x00000007) |
| 434 #define PHY_ANALOG_TXRF2_D4B5G_MSB
5 |
| 435 #define PHY_ANALOG_TXRF2_D4B5G_LSB
3 |
| 436 #define PHY_ANALOG_TXRF2_D4B5G_MASK
0x00000038 |
| 437 #define PHY_ANALOG_TXRF2_D4B5G_GET(x)
(((x) & 0x00000038) >> 3) |
| 438 #define PHY_ANALOG_TXRF2_D4B5G_SET(x)
(((x) << 3) & 0x00000038) |
| 439 #define PHY_ANALOG_TXRF2_OCAS2G_MSB
8 |
| 440 #define PHY_ANALOG_TXRF2_OCAS2G_LSB
6 |
| 441 #define PHY_ANALOG_TXRF2_OCAS2G_MASK
0x000001c0 |
| 442 #define PHY_ANALOG_TXRF2_OCAS2G_GET(x)
(((x) & 0x000001c0) >> 6) |
| 443 #define PHY_ANALOG_TXRF2_OCAS2G_SET(x)
(((x) << 6) & 0x000001c0) |
| 444 #define PHY_ANALOG_TXRF2_DCAS2G_MSB
11 |
| 445 #define PHY_ANALOG_TXRF2_DCAS2G_LSB
9 |
| 446 #define PHY_ANALOG_TXRF2_DCAS2G_MASK
0x00000e00 |
| 447 #define PHY_ANALOG_TXRF2_DCAS2G_GET(x)
(((x) & 0x00000e00) >> 9) |
| 448 #define PHY_ANALOG_TXRF2_DCAS2G_SET(x)
(((x) << 9) & 0x00000e00) |
| 449 #define PHY_ANALOG_TXRF2_OB2G_PALOFF_MSB
14 |
| 450 #define PHY_ANALOG_TXRF2_OB2G_PALOFF_LSB
12 |
| 451 #define PHY_ANALOG_TXRF2_OB2G_PALOFF_MASK
0x00007000 |
| 452 #define PHY_ANALOG_TXRF2_OB2G_PALOFF_GET(x)
(((x) & 0x00007000) >> 12) |
| 453 #define PHY_ANALOG_TXRF2_OB2G_PALOFF_SET(x)
(((x) << 12) & 0x00007000) |
| 454 #define PHY_ANALOG_TXRF2_OB2G_QAM_MSB
17 |
| 455 #define PHY_ANALOG_TXRF2_OB2G_QAM_LSB
15 |
| 456 #define PHY_ANALOG_TXRF2_OB2G_QAM_MASK
0x00038000 |
| 457 #define PHY_ANALOG_TXRF2_OB2G_QAM_GET(x)
(((x) & 0x00038000) >> 15) |
| 458 #define PHY_ANALOG_TXRF2_OB2G_QAM_SET(x)
(((x) << 15) & 0x00038000) |
| 459 #define PHY_ANALOG_TXRF2_OB2G_PSK_MSB
20 |
| 460 #define PHY_ANALOG_TXRF2_OB2G_PSK_LSB
18 |
| 461 #define PHY_ANALOG_TXRF2_OB2G_PSK_MASK
0x001c0000 |
| 462 #define PHY_ANALOG_TXRF2_OB2G_PSK_GET(x)
(((x) & 0x001c0000) >> 18) |
| 463 #define PHY_ANALOG_TXRF2_OB2G_PSK_SET(x)
(((x) << 18) & 0x001c0000) |
| 464 #define PHY_ANALOG_TXRF2_OB2G_CCK_MSB
23 |
| 465 #define PHY_ANALOG_TXRF2_OB2G_CCK_LSB
21 |
| 466 #define PHY_ANALOG_TXRF2_OB2G_CCK_MASK
0x00e00000 |
| 467 #define PHY_ANALOG_TXRF2_OB2G_CCK_GET(x)
(((x) & 0x00e00000) >> 21) |
| 468 #define PHY_ANALOG_TXRF2_OB2G_CCK_SET(x)
(((x) << 21) & 0x00e00000) |
| 469 #define PHY_ANALOG_TXRF2_DB2G_MSB
26 |
| 470 #define PHY_ANALOG_TXRF2_DB2G_LSB
24 |
| 471 #define PHY_ANALOG_TXRF2_DB2G_MASK
0x07000000 |
| 472 #define PHY_ANALOG_TXRF2_DB2G_GET(x)
(((x) & 0x07000000) >> 24) |
| 473 #define PHY_ANALOG_TXRF2_DB2G_SET(x)
(((x) << 24) & 0x07000000) |
| 474 #define PHY_ANALOG_TXRF2_PDOUT5G_MSB
30 |
| 475 #define PHY_ANALOG_TXRF2_PDOUT5G_LSB
27 |
| 476 #define PHY_ANALOG_TXRF2_PDOUT5G_MASK
0x78000000 |
| 477 #define PHY_ANALOG_TXRF2_PDOUT5G_GET(x)
(((x) & 0x78000000) >> 27) |
| 478 #define PHY_ANALOG_TXRF2_PDOUT5G_SET(x)
(((x) << 27) & 0x78000000) |
| 479 #define PHY_ANALOG_TXRF2_PDMXR5G_MSB
31 |
| 480 #define PHY_ANALOG_TXRF2_PDMXR5G_LSB
31 |
| 481 #define PHY_ANALOG_TXRF2_PDMXR5G_MASK
0x80000000 |
| 482 #define PHY_ANALOG_TXRF2_PDMXR5G_GET(x)
(((x) & 0x80000000) >> 31) |
| 483 #define PHY_ANALOG_TXRF2_PDMXR5G_SET(x)
(((x) << 31) & 0x80000000) |
| 484 |
| 485 /* macros for TXRF3 */ |
| 486 #define PHY_ANALOG_TXRF3_ADDRESS
0x00000048 |
| 487 #define PHY_ANALOG_TXRF3_OFFSET
0x00000048 |
| 488 #define PHY_ANALOG_TXRF3_FILTR2G_MSB
1 |
| 489 #define PHY_ANALOG_TXRF3_FILTR2G_LSB
0 |
| 490 #define PHY_ANALOG_TXRF3_FILTR2G_MASK
0x00000003 |
| 491 #define PHY_ANALOG_TXRF3_FILTR2G_GET(x)
(((x) & 0x00000003) >> 0) |
| 492 #define PHY_ANALOG_TXRF3_FILTR2G_SET(x)
(((x) << 0) & 0x00000003) |
| 493 #define PHY_ANALOG_TXRF3_PWDFB2_2G_MSB
2 |
| 494 #define PHY_ANALOG_TXRF3_PWDFB2_2G_LSB
2 |
| 495 #define PHY_ANALOG_TXRF3_PWDFB2_2G_MASK
0x00000004 |
| 496 #define PHY_ANALOG_TXRF3_PWDFB2_2G_GET(x)
(((x) & 0x00000004) >> 2) |
| 497 #define PHY_ANALOG_TXRF3_PWDFB2_2G_SET(x)
(((x) << 2) & 0x00000004) |
| 498 #define PHY_ANALOG_TXRF3_PWDFB1_2G_MSB
3 |
| 499 #define PHY_ANALOG_TXRF3_PWDFB1_2G_LSB
3 |
| 500 #define PHY_ANALOG_TXRF3_PWDFB1_2G_MASK
0x00000008 |
| 501 #define PHY_ANALOG_TXRF3_PWDFB1_2G_GET(x)
(((x) & 0x00000008) >> 3) |
| 502 #define PHY_ANALOG_TXRF3_PWDFB1_2G_SET(x)
(((x) << 3) & 0x00000008) |
| 503 #define PHY_ANALOG_TXRF3_PDFB2G_MSB
4 |
| 504 #define PHY_ANALOG_TXRF3_PDFB2G_LSB
4 |
| 505 #define PHY_ANALOG_TXRF3_PDFB2G_MASK
0x00000010 |
| 506 #define PHY_ANALOG_TXRF3_PDFB2G_GET(x)
(((x) & 0x00000010) >> 4) |
| 507 #define PHY_ANALOG_TXRF3_PDFB2G_SET(x)
(((x) << 4) & 0x00000010) |
| 508 #define PHY_ANALOG_TXRF3_RDIV5G_MSB
6 |
| 509 #define PHY_ANALOG_TXRF3_RDIV5G_LSB
5 |
| 510 #define PHY_ANALOG_TXRF3_RDIV5G_MASK
0x00000060 |
| 511 #define PHY_ANALOG_TXRF3_RDIV5G_GET(x)
(((x) & 0x00000060) >> 5) |
| 512 #define PHY_ANALOG_TXRF3_RDIV5G_SET(x)
(((x) << 5) & 0x00000060) |
| 513 #define PHY_ANALOG_TXRF3_CAPDIV5G_MSB
9 |
| 514 #define PHY_ANALOG_TXRF3_CAPDIV5G_LSB
7 |
| 515 #define PHY_ANALOG_TXRF3_CAPDIV5G_MASK
0x00000380 |
| 516 #define PHY_ANALOG_TXRF3_CAPDIV5G_GET(x)
(((x) & 0x00000380) >> 7) |
| 517 #define PHY_ANALOG_TXRF3_CAPDIV5G_SET(x)
(((x) << 7) & 0x00000380) |
| 518 #define PHY_ANALOG_TXRF3_PDPREDIST5G_MSB
10 |
| 519 #define PHY_ANALOG_TXRF3_PDPREDIST5G_LSB
10 |
| 520 #define PHY_ANALOG_TXRF3_PDPREDIST5G_MASK
0x00000400 |
| 521 #define PHY_ANALOG_TXRF3_PDPREDIST5G_GET(x)
(((x) & 0x00000400) >> 10) |
| 522 #define PHY_ANALOG_TXRF3_PDPREDIST5G_SET(x)
(((x) << 10) & 0x00000400) |
| 523 #define PHY_ANALOG_TXRF3_RDIV2G_MSB
12 |
| 524 #define PHY_ANALOG_TXRF3_RDIV2G_LSB
11 |
| 525 #define PHY_ANALOG_TXRF3_RDIV2G_MASK
0x00001800 |
| 526 #define PHY_ANALOG_TXRF3_RDIV2G_GET(x)
(((x) & 0x00001800) >> 11) |
| 527 #define PHY_ANALOG_TXRF3_RDIV2G_SET(x)
(((x) << 11) & 0x00001800) |
| 528 #define PHY_ANALOG_TXRF3_PDPREDIST2G_MSB
13 |
| 529 #define PHY_ANALOG_TXRF3_PDPREDIST2G_LSB
13 |
| 530 #define PHY_ANALOG_TXRF3_PDPREDIST2G_MASK
0x00002000 |
| 531 #define PHY_ANALOG_TXRF3_PDPREDIST2G_GET(x)
(((x) & 0x00002000) >> 13) |
| 532 #define PHY_ANALOG_TXRF3_PDPREDIST2G_SET(x)
(((x) << 13) & 0x00002000) |
| 533 #define PHY_ANALOG_TXRF3_OCAS5G_MSB
16 |
| 534 #define PHY_ANALOG_TXRF3_OCAS5G_LSB
14 |
| 535 #define PHY_ANALOG_TXRF3_OCAS5G_MASK
0x0001c000 |
| 536 #define PHY_ANALOG_TXRF3_OCAS5G_GET(x)
(((x) & 0x0001c000) >> 14) |
| 537 #define PHY_ANALOG_TXRF3_OCAS5G_SET(x)
(((x) << 14) & 0x0001c000) |
| 538 #define PHY_ANALOG_TXRF3_D2CAS5G_MSB
19 |
| 539 #define PHY_ANALOG_TXRF3_D2CAS5G_LSB
17 |
| 540 #define PHY_ANALOG_TXRF3_D2CAS5G_MASK
0x000e0000 |
| 541 #define PHY_ANALOG_TXRF3_D2CAS5G_GET(x)
(((x) & 0x000e0000) >> 17) |
| 542 #define PHY_ANALOG_TXRF3_D2CAS5G_SET(x)
(((x) << 17) & 0x000e0000) |
| 543 #define PHY_ANALOG_TXRF3_D3CAS5G_MSB
22 |
| 544 #define PHY_ANALOG_TXRF3_D3CAS5G_LSB
20 |
| 545 #define PHY_ANALOG_TXRF3_D3CAS5G_MASK
0x00700000 |
| 546 #define PHY_ANALOG_TXRF3_D3CAS5G_GET(x)
(((x) & 0x00700000) >> 20) |
| 547 #define PHY_ANALOG_TXRF3_D3CAS5G_SET(x)
(((x) << 20) & 0x00700000) |
| 548 #define PHY_ANALOG_TXRF3_D4CAS5G_MSB
25 |
| 549 #define PHY_ANALOG_TXRF3_D4CAS5G_LSB
23 |
| 550 #define PHY_ANALOG_TXRF3_D4CAS5G_MASK
0x03800000 |
| 551 #define PHY_ANALOG_TXRF3_D4CAS5G_GET(x)
(((x) & 0x03800000) >> 23) |
| 552 #define PHY_ANALOG_TXRF3_D4CAS5G_SET(x)
(((x) << 23) & 0x03800000) |
| 553 #define PHY_ANALOG_TXRF3_OB5G_MSB
28 |
| 554 #define PHY_ANALOG_TXRF3_OB5G_LSB
26 |
| 555 #define PHY_ANALOG_TXRF3_OB5G_MASK
0x1c000000 |
| 556 #define PHY_ANALOG_TXRF3_OB5G_GET(x)
(((x) & 0x1c000000) >> 26) |
| 557 #define PHY_ANALOG_TXRF3_OB5G_SET(x)
(((x) << 26) & 0x1c000000) |
| 558 #define PHY_ANALOG_TXRF3_D2B5G_MSB
31 |
| 559 #define PHY_ANALOG_TXRF3_D2B5G_LSB
29 |
| 560 #define PHY_ANALOG_TXRF3_D2B5G_MASK
0xe0000000 |
| 561 #define PHY_ANALOG_TXRF3_D2B5G_GET(x)
(((x) & 0xe0000000) >> 29) |
| 562 #define PHY_ANALOG_TXRF3_D2B5G_SET(x)
(((x) << 29) & 0xe0000000) |
| 563 |
| 564 /* macros for TXRF4 */ |
| 565 #define PHY_ANALOG_TXRF4_ADDRESS
0x0000004c |
| 566 #define PHY_ANALOG_TXRF4_OFFSET
0x0000004c |
| 567 #define PHY_ANALOG_TXRF4_PK1B2G_CCK_MSB
1 |
| 568 #define PHY_ANALOG_TXRF4_PK1B2G_CCK_LSB
0 |
| 569 #define PHY_ANALOG_TXRF4_PK1B2G_CCK_MASK
0x00000003 |
| 570 #define PHY_ANALOG_TXRF4_PK1B2G_CCK_GET(x)
(((x) & 0x00000003) >> 0) |
| 571 #define PHY_ANALOG_TXRF4_PK1B2G_CCK_SET(x)
(((x) << 0) & 0x00000003) |
| 572 #define PHY_ANALOG_TXRF4_MIOB2G_QAM_MSB
4 |
| 573 #define PHY_ANALOG_TXRF4_MIOB2G_QAM_LSB
2 |
| 574 #define PHY_ANALOG_TXRF4_MIOB2G_QAM_MASK
0x0000001c |
| 575 #define PHY_ANALOG_TXRF4_MIOB2G_QAM_GET(x)
(((x) & 0x0000001c) >> 2) |
| 576 #define PHY_ANALOG_TXRF4_MIOB2G_QAM_SET(x)
(((x) << 2) & 0x0000001c) |
| 577 #define PHY_ANALOG_TXRF4_MIOB2G_PSK_MSB
7 |
| 578 #define PHY_ANALOG_TXRF4_MIOB2G_PSK_LSB
5 |
| 579 #define PHY_ANALOG_TXRF4_MIOB2G_PSK_MASK
0x000000e0 |
| 580 #define PHY_ANALOG_TXRF4_MIOB2G_PSK_GET(x)
(((x) & 0x000000e0) >> 5) |
| 581 #define PHY_ANALOG_TXRF4_MIOB2G_PSK_SET(x)
(((x) << 5) & 0x000000e0) |
| 582 #define PHY_ANALOG_TXRF4_MIOB2G_CCK_MSB
10 |
| 583 #define PHY_ANALOG_TXRF4_MIOB2G_CCK_LSB
8 |
| 584 #define PHY_ANALOG_TXRF4_MIOB2G_CCK_MASK
0x00000700 |
| 585 #define PHY_ANALOG_TXRF4_MIOB2G_CCK_GET(x)
(((x) & 0x00000700) >> 8) |
| 586 #define PHY_ANALOG_TXRF4_MIOB2G_CCK_SET(x)
(((x) << 8) & 0x00000700) |
| 587 #define PHY_ANALOG_TXRF4_COMP2G_QAM_MSB
13 |
| 588 #define PHY_ANALOG_TXRF4_COMP2G_QAM_LSB
11 |
| 589 #define PHY_ANALOG_TXRF4_COMP2G_QAM_MASK
0x00003800 |
| 590 #define PHY_ANALOG_TXRF4_COMP2G_QAM_GET(x)
(((x) & 0x00003800) >> 11) |
| 591 #define PHY_ANALOG_TXRF4_COMP2G_QAM_SET(x)
(((x) << 11) & 0x00003800) |
| 592 #define PHY_ANALOG_TXRF4_COMP2G_PSK_MSB
16 |
| 593 #define PHY_ANALOG_TXRF4_COMP2G_PSK_LSB
14 |
| 594 #define PHY_ANALOG_TXRF4_COMP2G_PSK_MASK
0x0001c000 |
| 595 #define PHY_ANALOG_TXRF4_COMP2G_PSK_GET(x)
(((x) & 0x0001c000) >> 14) |
| 596 #define PHY_ANALOG_TXRF4_COMP2G_PSK_SET(x)
(((x) << 14) & 0x0001c000) |
| 597 #define PHY_ANALOG_TXRF4_COMP2G_CCK_MSB
19 |
| 598 #define PHY_ANALOG_TXRF4_COMP2G_CCK_LSB
17 |
| 599 #define PHY_ANALOG_TXRF4_COMP2G_CCK_MASK
0x000e0000 |
| 600 #define PHY_ANALOG_TXRF4_COMP2G_CCK_GET(x)
(((x) & 0x000e0000) >> 17) |
| 601 #define PHY_ANALOG_TXRF4_COMP2G_CCK_SET(x)
(((x) << 17) & 0x000e0000) |
| 602 #define PHY_ANALOG_TXRF4_AMP2B2G_QAM_MSB
22 |
| 603 #define PHY_ANALOG_TXRF4_AMP2B2G_QAM_LSB
20 |
| 604 #define PHY_ANALOG_TXRF4_AMP2B2G_QAM_MASK
0x00700000 |
| 605 #define PHY_ANALOG_TXRF4_AMP2B2G_QAM_GET(x)
(((x) & 0x00700000) >> 20) |
| 606 #define PHY_ANALOG_TXRF4_AMP2B2G_QAM_SET(x)
(((x) << 20) & 0x00700000) |
| 607 #define PHY_ANALOG_TXRF4_AMP2B2G_PSK_MSB
25 |
| 608 #define PHY_ANALOG_TXRF4_AMP2B2G_PSK_LSB
23 |
| 609 #define PHY_ANALOG_TXRF4_AMP2B2G_PSK_MASK
0x03800000 |
| 610 #define PHY_ANALOG_TXRF4_AMP2B2G_PSK_GET(x)
(((x) & 0x03800000) >> 23) |
| 611 #define PHY_ANALOG_TXRF4_AMP2B2G_PSK_SET(x)
(((x) << 23) & 0x03800000) |
| 612 #define PHY_ANALOG_TXRF4_AMP2B2G_CCK_MSB
28 |
| 613 #define PHY_ANALOG_TXRF4_AMP2B2G_CCK_LSB
26 |
| 614 #define PHY_ANALOG_TXRF4_AMP2B2G_CCK_MASK
0x1c000000 |
| 615 #define PHY_ANALOG_TXRF4_AMP2B2G_CCK_GET(x)
(((x) & 0x1c000000) >> 26) |
| 616 #define PHY_ANALOG_TXRF4_AMP2B2G_CCK_SET(x)
(((x) << 26) & 0x1c000000) |
| 617 #define PHY_ANALOG_TXRF4_AMP2CAS2G_MSB
31 |
| 618 #define PHY_ANALOG_TXRF4_AMP2CAS2G_LSB
29 |
| 619 #define PHY_ANALOG_TXRF4_AMP2CAS2G_MASK
0xe0000000 |
| 620 #define PHY_ANALOG_TXRF4_AMP2CAS2G_GET(x)
(((x) & 0xe0000000) >> 29) |
| 621 #define PHY_ANALOG_TXRF4_AMP2CAS2G_SET(x)
(((x) << 29) & 0xe0000000) |
| 622 |
| 623 /* macros for TXRF5 */ |
| 624 #define PHY_ANALOG_TXRF5_ADDRESS
0x00000050 |
| 625 #define PHY_ANALOG_TXRF5_OFFSET
0x00000050 |
| 626 #define PHY_ANALOG_TXRF5_SPARE5_MSB
0 |
| 627 #define PHY_ANALOG_TXRF5_SPARE5_LSB
0 |
| 628 #define PHY_ANALOG_TXRF5_SPARE5_MASK
0x00000001 |
| 629 #define PHY_ANALOG_TXRF5_SPARE5_GET(x)
(((x) & 0x00000001) >> 0) |
| 630 #define PHY_ANALOG_TXRF5_SPARE5_SET(x)
(((x) << 0) & 0x00000001) |
| 631 #define PHY_ANALOG_TXRF5_PAL_LOCKED_MSB
1 |
| 632 #define PHY_ANALOG_TXRF5_PAL_LOCKED_LSB
1 |
| 633 #define PHY_ANALOG_TXRF5_PAL_LOCKED_MASK
0x00000002 |
| 634 #define PHY_ANALOG_TXRF5_PAL_LOCKED_GET(x)
(((x) & 0x00000002) >> 1) |
| 635 #define PHY_ANALOG_TXRF5_FBHI2G_MSB
2 |
| 636 #define PHY_ANALOG_TXRF5_FBHI2G_LSB
2 |
| 637 #define PHY_ANALOG_TXRF5_FBHI2G_MASK
0x00000004 |
| 638 #define PHY_ANALOG_TXRF5_FBHI2G_GET(x)
(((x) & 0x00000004) >> 2) |
| 639 #define PHY_ANALOG_TXRF5_FBLO2G_MSB
3 |
| 640 #define PHY_ANALOG_TXRF5_FBLO2G_LSB
3 |
| 641 #define PHY_ANALOG_TXRF5_FBLO2G_MASK
0x00000008 |
| 642 #define PHY_ANALOG_TXRF5_FBLO2G_GET(x)
(((x) & 0x00000008) >> 3) |
| 643 #define PHY_ANALOG_TXRF5_NOPALGAIN2G_MSB
4 |
| 644 #define PHY_ANALOG_TXRF5_NOPALGAIN2G_LSB
4 |
| 645 #define PHY_ANALOG_TXRF5_NOPALGAIN2G_MASK
0x00000010 |
| 646 #define PHY_ANALOG_TXRF5_NOPALGAIN2G_GET(x)
(((x) & 0x00000010) >> 4) |
| 647 #define PHY_ANALOG_TXRF5_NOPALGAIN2G_SET(x)
(((x) << 4) & 0x00000010) |
| 648 #define PHY_ANALOG_TXRF5_ENPACAL2G_MSB
5 |
| 649 #define PHY_ANALOG_TXRF5_ENPACAL2G_LSB
5 |
| 650 #define PHY_ANALOG_TXRF5_ENPACAL2G_MASK
0x00000020 |
| 651 #define PHY_ANALOG_TXRF5_ENPACAL2G_GET(x)
(((x) & 0x00000020) >> 5) |
| 652 #define PHY_ANALOG_TXRF5_ENPACAL2G_SET(x)
(((x) << 5) & 0x00000020) |
| 653 #define PHY_ANALOG_TXRF5_OFFSET2G_MSB
12 |
| 654 #define PHY_ANALOG_TXRF5_OFFSET2G_LSB
6 |
| 655 #define PHY_ANALOG_TXRF5_OFFSET2G_MASK
0x00001fc0 |
| 656 #define PHY_ANALOG_TXRF5_OFFSET2G_GET(x)
(((x) & 0x00001fc0) >> 6) |
| 657 #define PHY_ANALOG_TXRF5_OFFSET2G_SET(x)
(((x) << 6) & 0x00001fc0) |
| 658 #define PHY_ANALOG_TXRF5_ENOFFSETCAL2G_MSB
13 |
| 659 #define PHY_ANALOG_TXRF5_ENOFFSETCAL2G_LSB
13 |
| 660 #define PHY_ANALOG_TXRF5_ENOFFSETCAL2G_MASK
0x00002000 |
| 661 #define PHY_ANALOG_TXRF5_ENOFFSETCAL2G_GET(x)
(((x) & 0x00002000) >> 13) |
| 662 #define PHY_ANALOG_TXRF5_ENOFFSETCAL2G_SET(x)
(((x) << 13) & 0x00002000) |
| 663 #define PHY_ANALOG_TXRF5_REFHI2G_MSB
16 |
| 664 #define PHY_ANALOG_TXRF5_REFHI2G_LSB
14 |
| 665 #define PHY_ANALOG_TXRF5_REFHI2G_MASK
0x0001c000 |
| 666 #define PHY_ANALOG_TXRF5_REFHI2G_GET(x)
(((x) & 0x0001c000) >> 14) |
| 667 #define PHY_ANALOG_TXRF5_REFHI2G_SET(x)
(((x) << 14) & 0x0001c000) |
| 668 #define PHY_ANALOG_TXRF5_REFLO2G_MSB
19 |
| 669 #define PHY_ANALOG_TXRF5_REFLO2G_LSB
17 |
| 670 #define PHY_ANALOG_TXRF5_REFLO2G_MASK
0x000e0000 |
| 671 #define PHY_ANALOG_TXRF5_REFLO2G_GET(x)
(((x) & 0x000e0000) >> 17) |
| 672 #define PHY_ANALOG_TXRF5_REFLO2G_SET(x)
(((x) << 17) & 0x000e0000) |
| 673 #define PHY_ANALOG_TXRF5_PALCLAMP2G_MSB
21 |
| 674 #define PHY_ANALOG_TXRF5_PALCLAMP2G_LSB
20 |
| 675 #define PHY_ANALOG_TXRF5_PALCLAMP2G_MASK
0x00300000 |
| 676 #define PHY_ANALOG_TXRF5_PALCLAMP2G_GET(x)
(((x) & 0x00300000) >> 20) |
| 677 #define PHY_ANALOG_TXRF5_PALCLAMP2G_SET(x)
(((x) << 20) & 0x00300000) |
| 678 #define PHY_ANALOG_TXRF5_PK2B2G_QAM_MSB
23 |
| 679 #define PHY_ANALOG_TXRF5_PK2B2G_QAM_LSB
22 |
| 680 #define PHY_ANALOG_TXRF5_PK2B2G_QAM_MASK
0x00c00000 |
| 681 #define PHY_ANALOG_TXRF5_PK2B2G_QAM_GET(x)
(((x) & 0x00c00000) >> 22) |
| 682 #define PHY_ANALOG_TXRF5_PK2B2G_QAM_SET(x)
(((x) << 22) & 0x00c00000) |
| 683 #define PHY_ANALOG_TXRF5_PK2B2G_PSK_MSB
25 |
| 684 #define PHY_ANALOG_TXRF5_PK2B2G_PSK_LSB
24 |
| 685 #define PHY_ANALOG_TXRF5_PK2B2G_PSK_MASK
0x03000000 |
| 686 #define PHY_ANALOG_TXRF5_PK2B2G_PSK_GET(x)
(((x) & 0x03000000) >> 24) |
| 687 #define PHY_ANALOG_TXRF5_PK2B2G_PSK_SET(x)
(((x) << 24) & 0x03000000) |
| 688 #define PHY_ANALOG_TXRF5_PK2B2G_CCK_MSB
27 |
| 689 #define PHY_ANALOG_TXRF5_PK2B2G_CCK_LSB
26 |
| 690 #define PHY_ANALOG_TXRF5_PK2B2G_CCK_MASK
0x0c000000 |
| 691 #define PHY_ANALOG_TXRF5_PK2B2G_CCK_GET(x)
(((x) & 0x0c000000) >> 26) |
| 692 #define PHY_ANALOG_TXRF5_PK2B2G_CCK_SET(x)
(((x) << 26) & 0x0c000000) |
| 693 #define PHY_ANALOG_TXRF5_PK1B2G_QAM_MSB
29 |
| 694 #define PHY_ANALOG_TXRF5_PK1B2G_QAM_LSB
28 |
| 695 #define PHY_ANALOG_TXRF5_PK1B2G_QAM_MASK
0x30000000 |
| 696 #define PHY_ANALOG_TXRF5_PK1B2G_QAM_GET(x)
(((x) & 0x30000000) >> 28) |
| 697 #define PHY_ANALOG_TXRF5_PK1B2G_QAM_SET(x)
(((x) << 28) & 0x30000000) |
| 698 #define PHY_ANALOG_TXRF5_PK1B2G_PSK_MSB
31 |
| 699 #define PHY_ANALOG_TXRF5_PK1B2G_PSK_LSB
30 |
| 700 #define PHY_ANALOG_TXRF5_PK1B2G_PSK_MASK
0xc0000000 |
| 701 #define PHY_ANALOG_TXRF5_PK1B2G_PSK_GET(x)
(((x) & 0xc0000000) >> 30) |
| 702 #define PHY_ANALOG_TXRF5_PK1B2G_PSK_SET(x)
(((x) << 30) & 0xc0000000) |
| 703 |
| 704 /* macros for TXRF6 */ |
| 705 #define PHY_ANALOG_TXRF6_ADDRESS
0x00000054 |
| 706 #define PHY_ANALOG_TXRF6_OFFSET
0x00000054 |
| 707 #define PHY_ANALOG_TXRF6_PALCLKGATE2G_MSB
0 |
| 708 #define PHY_ANALOG_TXRF6_PALCLKGATE2G_LSB
0 |
| 709 #define PHY_ANALOG_TXRF6_PALCLKGATE2G_MASK
0x00000001 |
| 710 #define PHY_ANALOG_TXRF6_PALCLKGATE2G_GET(x)
(((x) & 0x00000001) >> 0) |
| 711 #define PHY_ANALOG_TXRF6_PALCLKGATE2G_SET(x)
(((x) << 0) & 0x00000001) |
| 712 #define PHY_ANALOG_TXRF6_PALFLUCTCOUNT2G_MSB
8 |
| 713 #define PHY_ANALOG_TXRF6_PALFLUCTCOUNT2G_LSB
1 |
| 714 #define PHY_ANALOG_TXRF6_PALFLUCTCOUNT2G_MASK
0x000001fe |
| 715 #define PHY_ANALOG_TXRF6_PALFLUCTCOUNT2G_GET(x)
(((x) & 0x000001fe) >> 1) |
| 716 #define PHY_ANALOG_TXRF6_PALFLUCTCOUNT2G_SET(x)
(((x) << 1) & 0x000001fe) |
| 717 #define PHY_ANALOG_TXRF6_PALFLUCTGAIN2G_MSB
10 |
| 718 #define PHY_ANALOG_TXRF6_PALFLUCTGAIN2G_LSB
9 |
| 719 #define PHY_ANALOG_TXRF6_PALFLUCTGAIN2G_MASK
0x00000600 |
| 720 #define PHY_ANALOG_TXRF6_PALFLUCTGAIN2G_GET(x)
(((x) & 0x00000600) >> 9) |
| 721 #define PHY_ANALOG_TXRF6_PALFLUCTGAIN2G_SET(x)
(((x) << 9) & 0x00000600) |
| 722 #define PHY_ANALOG_TXRF6_PALNOFLUCT2G_MSB
11 |
| 723 #define PHY_ANALOG_TXRF6_PALNOFLUCT2G_LSB
11 |
| 724 #define PHY_ANALOG_TXRF6_PALNOFLUCT2G_MASK
0x00000800 |
| 725 #define PHY_ANALOG_TXRF6_PALNOFLUCT2G_GET(x)
(((x) & 0x00000800) >> 11) |
| 726 #define PHY_ANALOG_TXRF6_PALNOFLUCT2G_SET(x)
(((x) << 11) & 0x00000800) |
| 727 #define PHY_ANALOG_TXRF6_GAINSTEP2G_MSB
14 |
| 728 #define PHY_ANALOG_TXRF6_GAINSTEP2G_LSB
12 |
| 729 #define PHY_ANALOG_TXRF6_GAINSTEP2G_MASK
0x00007000 |
| 730 #define PHY_ANALOG_TXRF6_GAINSTEP2G_GET(x)
(((x) & 0x00007000) >> 12) |
| 731 #define PHY_ANALOG_TXRF6_GAINSTEP2G_SET(x)
(((x) << 12) & 0x00007000) |
| 732 #define PHY_ANALOG_TXRF6_USE_GAIN_DELTA2G_MSB
15 |
| 733 #define PHY_ANALOG_TXRF6_USE_GAIN_DELTA2G_LSB
15 |
| 734 #define PHY_ANALOG_TXRF6_USE_GAIN_DELTA2G_MASK
0x00008000 |
| 735 #define PHY_ANALOG_TXRF6_USE_GAIN_DELTA2G_GET(x)
(((x) & 0x00008000) >> 15) |
| 736 #define PHY_ANALOG_TXRF6_USE_GAIN_DELTA2G_SET(x)
(((x) << 15) & 0x00008000) |
| 737 #define PHY_ANALOG_TXRF6_CAPDIV_I2G_MSB
19 |
| 738 #define PHY_ANALOG_TXRF6_CAPDIV_I2G_LSB
16 |
| 739 #define PHY_ANALOG_TXRF6_CAPDIV_I2G_MASK
0x000f0000 |
| 740 #define PHY_ANALOG_TXRF6_CAPDIV_I2G_GET(x)
(((x) & 0x000f0000) >> 16) |
| 741 #define PHY_ANALOG_TXRF6_CAPDIV_I2G_SET(x)
(((x) << 16) & 0x000f0000) |
| 742 #define PHY_ANALOG_TXRF6_PADRVGN_INDEX_I2G_MSB
23 |
| 743 #define PHY_ANALOG_TXRF6_PADRVGN_INDEX_I2G_LSB
20 |
| 744 #define PHY_ANALOG_TXRF6_PADRVGN_INDEX_I2G_MASK
0x00f00000 |
| 745 #define PHY_ANALOG_TXRF6_PADRVGN_INDEX_I2G_GET(x)
(((x) & 0x00f00000) >> 20) |
| 746 #define PHY_ANALOG_TXRF6_PADRVGN_INDEX_I2G_SET(x)
(((x) << 20) & 0x00f00000) |
| 747 #define PHY_ANALOG_TXRF6_VCMONDELAY2G_MSB
26 |
| 748 #define PHY_ANALOG_TXRF6_VCMONDELAY2G_LSB
24 |
| 749 #define PHY_ANALOG_TXRF6_VCMONDELAY2G_MASK
0x07000000 |
| 750 #define PHY_ANALOG_TXRF6_VCMONDELAY2G_GET(x)
(((x) & 0x07000000) >> 24) |
| 751 #define PHY_ANALOG_TXRF6_VCMONDELAY2G_SET(x)
(((x) << 24) & 0x07000000) |
| 752 #define PHY_ANALOG_TXRF6_CAPDIV2G_MSB
30 |
| 753 #define PHY_ANALOG_TXRF6_CAPDIV2G_LSB
27 |
| 754 #define PHY_ANALOG_TXRF6_CAPDIV2G_MASK
0x78000000 |
| 755 #define PHY_ANALOG_TXRF6_CAPDIV2G_GET(x)
(((x) & 0x78000000) >> 27) |
| 756 #define PHY_ANALOG_TXRF6_CAPDIV2G_SET(x)
(((x) << 27) & 0x78000000) |
| 757 #define PHY_ANALOG_TXRF6_CAPDIV2GOVR_MSB
31 |
| 758 #define PHY_ANALOG_TXRF6_CAPDIV2GOVR_LSB
31 |
| 759 #define PHY_ANALOG_TXRF6_CAPDIV2GOVR_MASK
0x80000000 |
| 760 #define PHY_ANALOG_TXRF6_CAPDIV2GOVR_GET(x)
(((x) & 0x80000000) >> 31) |
| 761 #define PHY_ANALOG_TXRF6_CAPDIV2GOVR_SET(x)
(((x) << 31) & 0x80000000) |
| 762 |
| 763 /* macros for TXRF7 */ |
| 764 #define PHY_ANALOG_TXRF7_ADDRESS
0x00000058 |
| 765 #define PHY_ANALOG_TXRF7_OFFSET
0x00000058 |
| 766 #define PHY_ANALOG_TXRF7_SPARE7_MSB
1 |
| 767 #define PHY_ANALOG_TXRF7_SPARE7_LSB
0 |
| 768 #define PHY_ANALOG_TXRF7_SPARE7_MASK
0x00000003 |
| 769 #define PHY_ANALOG_TXRF7_SPARE7_GET(x)
(((x) & 0x00000003) >> 0) |
| 770 #define PHY_ANALOG_TXRF7_SPARE7_SET(x)
(((x) << 0) & 0x00000003) |
| 771 #define PHY_ANALOG_TXRF7_PADRVGNTAB_4_MSB
7 |
| 772 #define PHY_ANALOG_TXRF7_PADRVGNTAB_4_LSB
2 |
| 773 #define PHY_ANALOG_TXRF7_PADRVGNTAB_4_MASK
0x000000fc |
| 774 #define PHY_ANALOG_TXRF7_PADRVGNTAB_4_GET(x)
(((x) & 0x000000fc) >> 2) |
| 775 #define PHY_ANALOG_TXRF7_PADRVGNTAB_4_SET(x)
(((x) << 2) & 0x000000fc) |
| 776 #define PHY_ANALOG_TXRF7_PADRVGNTAB_3_MSB
13 |
| 777 #define PHY_ANALOG_TXRF7_PADRVGNTAB_3_LSB
8 |
| 778 #define PHY_ANALOG_TXRF7_PADRVGNTAB_3_MASK
0x00003f00 |
| 779 #define PHY_ANALOG_TXRF7_PADRVGNTAB_3_GET(x)
(((x) & 0x00003f00) >> 8) |
| 780 #define PHY_ANALOG_TXRF7_PADRVGNTAB_3_SET(x)
(((x) << 8) & 0x00003f00) |
| 781 #define PHY_ANALOG_TXRF7_PADRVGNTAB_2_MSB
19 |
| 782 #define PHY_ANALOG_TXRF7_PADRVGNTAB_2_LSB
14 |
| 783 #define PHY_ANALOG_TXRF7_PADRVGNTAB_2_MASK
0x000fc000 |
| 784 #define PHY_ANALOG_TXRF7_PADRVGNTAB_2_GET(x)
(((x) & 0x000fc000) >> 14) |
| 785 #define PHY_ANALOG_TXRF7_PADRVGNTAB_2_SET(x)
(((x) << 14) & 0x000fc000) |
| 786 #define PHY_ANALOG_TXRF7_PADRVGNTAB_1_MSB
25 |
| 787 #define PHY_ANALOG_TXRF7_PADRVGNTAB_1_LSB
20 |
| 788 #define PHY_ANALOG_TXRF7_PADRVGNTAB_1_MASK
0x03f00000 |
| 789 #define PHY_ANALOG_TXRF7_PADRVGNTAB_1_GET(x)
(((x) & 0x03f00000) >> 20) |
| 790 #define PHY_ANALOG_TXRF7_PADRVGNTAB_1_SET(x)
(((x) << 20) & 0x03f00000) |
| 791 #define PHY_ANALOG_TXRF7_PADRVGNTAB_0_MSB
31 |
| 792 #define PHY_ANALOG_TXRF7_PADRVGNTAB_0_LSB
26 |
| 793 #define PHY_ANALOG_TXRF7_PADRVGNTAB_0_MASK
0xfc000000 |
| 794 #define PHY_ANALOG_TXRF7_PADRVGNTAB_0_GET(x)
(((x) & 0xfc000000) >> 26) |
| 795 #define PHY_ANALOG_TXRF7_PADRVGNTAB_0_SET(x)
(((x) << 26) & 0xfc000000) |
| 796 |
| 797 /* macros for TXRF8 */ |
| 798 #define PHY_ANALOG_TXRF8_ADDRESS
0x0000005c |
| 799 #define PHY_ANALOG_TXRF8_OFFSET
0x0000005c |
| 800 #define PHY_ANALOG_TXRF8_SPARE8_MSB
1 |
| 801 #define PHY_ANALOG_TXRF8_SPARE8_LSB
0 |
| 802 #define PHY_ANALOG_TXRF8_SPARE8_MASK
0x00000003 |
| 803 #define PHY_ANALOG_TXRF8_SPARE8_GET(x)
(((x) & 0x00000003) >> 0) |
| 804 #define PHY_ANALOG_TXRF8_SPARE8_SET(x)
(((x) << 0) & 0x00000003) |
| 805 #define PHY_ANALOG_TXRF8_PADRVGNTAB_9_MSB
7 |
| 806 #define PHY_ANALOG_TXRF8_PADRVGNTAB_9_LSB
2 |
| 807 #define PHY_ANALOG_TXRF8_PADRVGNTAB_9_MASK
0x000000fc |
| 808 #define PHY_ANALOG_TXRF8_PADRVGNTAB_9_GET(x)
(((x) & 0x000000fc) >> 2) |
| 809 #define PHY_ANALOG_TXRF8_PADRVGNTAB_9_SET(x)
(((x) << 2) & 0x000000fc) |
| 810 #define PHY_ANALOG_TXRF8_PADRVGNTAB_8_MSB
13 |
| 811 #define PHY_ANALOG_TXRF8_PADRVGNTAB_8_LSB
8 |
| 812 #define PHY_ANALOG_TXRF8_PADRVGNTAB_8_MASK
0x00003f00 |
| 813 #define PHY_ANALOG_TXRF8_PADRVGNTAB_8_GET(x)
(((x) & 0x00003f00) >> 8) |
| 814 #define PHY_ANALOG_TXRF8_PADRVGNTAB_8_SET(x)
(((x) << 8) & 0x00003f00) |
| 815 #define PHY_ANALOG_TXRF8_PADRVGNTAB_7_MSB
19 |
| 816 #define PHY_ANALOG_TXRF8_PADRVGNTAB_7_LSB
14 |
| 817 #define PHY_ANALOG_TXRF8_PADRVGNTAB_7_MASK
0x000fc000 |
| 818 #define PHY_ANALOG_TXRF8_PADRVGNTAB_7_GET(x)
(((x) & 0x000fc000) >> 14) |
| 819 #define PHY_ANALOG_TXRF8_PADRVGNTAB_7_SET(x)
(((x) << 14) & 0x000fc000) |
| 820 #define PHY_ANALOG_TXRF8_PADRVGNTAB_6_MSB
25 |
| 821 #define PHY_ANALOG_TXRF8_PADRVGNTAB_6_LSB
20 |
| 822 #define PHY_ANALOG_TXRF8_PADRVGNTAB_6_MASK
0x03f00000 |
| 823 #define PHY_ANALOG_TXRF8_PADRVGNTAB_6_GET(x)
(((x) & 0x03f00000) >> 20) |
| 824 #define PHY_ANALOG_TXRF8_PADRVGNTAB_6_SET(x)
(((x) << 20) & 0x03f00000) |
| 825 #define PHY_ANALOG_TXRF8_PADRVGNTAB_5_MSB
31 |
| 826 #define PHY_ANALOG_TXRF8_PADRVGNTAB_5_LSB
26 |
| 827 #define PHY_ANALOG_TXRF8_PADRVGNTAB_5_MASK
0xfc000000 |
| 828 #define PHY_ANALOG_TXRF8_PADRVGNTAB_5_GET(x)
(((x) & 0xfc000000) >> 26) |
| 829 #define PHY_ANALOG_TXRF8_PADRVGNTAB_5_SET(x)
(((x) << 26) & 0xfc000000) |
| 830 |
| 831 /* macros for TXRF9 */ |
| 832 #define PHY_ANALOG_TXRF9_ADDRESS
0x00000060 |
| 833 #define PHY_ANALOG_TXRF9_OFFSET
0x00000060 |
| 834 #define PHY_ANALOG_TXRF9_SPARE9_MSB
1 |
| 835 #define PHY_ANALOG_TXRF9_SPARE9_LSB
0 |
| 836 #define PHY_ANALOG_TXRF9_SPARE9_MASK
0x00000003 |
| 837 #define PHY_ANALOG_TXRF9_SPARE9_GET(x)
(((x) & 0x00000003) >> 0) |
| 838 #define PHY_ANALOG_TXRF9_SPARE9_SET(x)
(((x) << 0) & 0x00000003) |
| 839 #define PHY_ANALOG_TXRF9_PADRVGNTAB_14_MSB
7 |
| 840 #define PHY_ANALOG_TXRF9_PADRVGNTAB_14_LSB
2 |
| 841 #define PHY_ANALOG_TXRF9_PADRVGNTAB_14_MASK
0x000000fc |
| 842 #define PHY_ANALOG_TXRF9_PADRVGNTAB_14_GET(x)
(((x) & 0x000000fc) >> 2) |
| 843 #define PHY_ANALOG_TXRF9_PADRVGNTAB_14_SET(x)
(((x) << 2) & 0x000000fc) |
| 844 #define PHY_ANALOG_TXRF9_PADRVGNTAB_13_MSB
13 |
| 845 #define PHY_ANALOG_TXRF9_PADRVGNTAB_13_LSB
8 |
| 846 #define PHY_ANALOG_TXRF9_PADRVGNTAB_13_MASK
0x00003f00 |
| 847 #define PHY_ANALOG_TXRF9_PADRVGNTAB_13_GET(x)
(((x) & 0x00003f00) >> 8) |
| 848 #define PHY_ANALOG_TXRF9_PADRVGNTAB_13_SET(x)
(((x) << 8) & 0x00003f00) |
| 849 #define PHY_ANALOG_TXRF9_PADRVGNTAB_12_MSB
19 |
| 850 #define PHY_ANALOG_TXRF9_PADRVGNTAB_12_LSB
14 |
| 851 #define PHY_ANALOG_TXRF9_PADRVGNTAB_12_MASK
0x000fc000 |
| 852 #define PHY_ANALOG_TXRF9_PADRVGNTAB_12_GET(x)
(((x) & 0x000fc000) >> 14) |
| 853 #define PHY_ANALOG_TXRF9_PADRVGNTAB_12_SET(x)
(((x) << 14) & 0x000fc000) |
| 854 #define PHY_ANALOG_TXRF9_PADRVGNTAB_11_MSB
25 |
| 855 #define PHY_ANALOG_TXRF9_PADRVGNTAB_11_LSB
20 |
| 856 #define PHY_ANALOG_TXRF9_PADRVGNTAB_11_MASK
0x03f00000 |
| 857 #define PHY_ANALOG_TXRF9_PADRVGNTAB_11_GET(x)
(((x) & 0x03f00000) >> 20) |
| 858 #define PHY_ANALOG_TXRF9_PADRVGNTAB_11_SET(x)
(((x) << 20) & 0x03f00000) |
| 859 #define PHY_ANALOG_TXRF9_PADRVGNTAB_10_MSB
31 |
| 860 #define PHY_ANALOG_TXRF9_PADRVGNTAB_10_LSB
26 |
| 861 #define PHY_ANALOG_TXRF9_PADRVGNTAB_10_MASK
0xfc000000 |
| 862 #define PHY_ANALOG_TXRF9_PADRVGNTAB_10_GET(x)
(((x) & 0xfc000000) >> 26) |
| 863 #define PHY_ANALOG_TXRF9_PADRVGNTAB_10_SET(x)
(((x) << 26) & 0xfc000000) |
| 864 |
| 865 /* macros for TXRF10 */ |
| 866 #define PHY_ANALOG_TXRF10_ADDRESS
0x00000064 |
| 867 #define PHY_ANALOG_TXRF10_OFFSET
0x00000064 |
| 868 #define PHY_ANALOG_TXRF10_SPARE10_MSB
2 |
| 869 #define PHY_ANALOG_TXRF10_SPARE10_LSB
0 |
| 870 #define PHY_ANALOG_TXRF10_SPARE10_MASK
0x00000007 |
| 871 #define PHY_ANALOG_TXRF10_SPARE10_GET(x)
(((x) & 0x00000007) >> 0) |
| 872 #define PHY_ANALOG_TXRF10_SPARE10_SET(x)
(((x) << 0) & 0x00000007) |
| 873 #define PHY_ANALOG_TXRF10_PDOUT5G_3CALTX_MSB
3 |
| 874 #define PHY_ANALOG_TXRF10_PDOUT5G_3CALTX_LSB
3 |
| 875 #define PHY_ANALOG_TXRF10_PDOUT5G_3CALTX_MASK
0x00000008 |
| 876 #define PHY_ANALOG_TXRF10_PDOUT5G_3CALTX_GET(x)
(((x) & 0x00000008) >> 3) |
| 877 #define PHY_ANALOG_TXRF10_PDOUT5G_3CALTX_SET(x)
(((x) << 3) & 0x00000008) |
| 878 #define PHY_ANALOG_TXRF10_D3B5GCALTX_MSB
6 |
| 879 #define PHY_ANALOG_TXRF10_D3B5GCALTX_LSB
4 |
| 880 #define PHY_ANALOG_TXRF10_D3B5GCALTX_MASK
0x00000070 |
| 881 #define PHY_ANALOG_TXRF10_D3B5GCALTX_GET(x)
(((x) & 0x00000070) >> 4) |
| 882 #define PHY_ANALOG_TXRF10_D3B5GCALTX_SET(x)
(((x) << 4) & 0x00000070) |
| 883 #define PHY_ANALOG_TXRF10_D4B5GCALTX_MSB
9 |
| 884 #define PHY_ANALOG_TXRF10_D4B5GCALTX_LSB
7 |
| 885 #define PHY_ANALOG_TXRF10_D4B5GCALTX_MASK
0x00000380 |
| 886 #define PHY_ANALOG_TXRF10_D4B5GCALTX_GET(x)
(((x) & 0x00000380) >> 7) |
| 887 #define PHY_ANALOG_TXRF10_D4B5GCALTX_SET(x)
(((x) << 7) & 0x00000380) |
| 888 #define PHY_ANALOG_TXRF10_PADRVGN2GCALTX_MSB
16 |
| 889 #define PHY_ANALOG_TXRF10_PADRVGN2GCALTX_LSB
10 |
| 890 #define PHY_ANALOG_TXRF10_PADRVGN2GCALTX_MASK
0x0001fc00 |
| 891 #define PHY_ANALOG_TXRF10_PADRVGN2GCALTX_GET(x)
(((x) & 0x0001fc00) >> 10) |
| 892 #define PHY_ANALOG_TXRF10_PADRVGN2GCALTX_SET(x)
(((x) << 10) & 0x0001fc00) |
| 893 #define PHY_ANALOG_TXRF10_DB2GCALTX_MSB
19 |
| 894 #define PHY_ANALOG_TXRF10_DB2GCALTX_LSB
17 |
| 895 #define PHY_ANALOG_TXRF10_DB2GCALTX_MASK
0x000e0000 |
| 896 #define PHY_ANALOG_TXRF10_DB2GCALTX_GET(x)
(((x) & 0x000e0000) >> 17) |
| 897 #define PHY_ANALOG_TXRF10_DB2GCALTX_SET(x)
(((x) << 17) & 0x000e0000) |
| 898 #define PHY_ANALOG_TXRF10_CALTXSHIFT_MSB
20 |
| 899 #define PHY_ANALOG_TXRF10_CALTXSHIFT_LSB
20 |
| 900 #define PHY_ANALOG_TXRF10_CALTXSHIFT_MASK
0x00100000 |
| 901 #define PHY_ANALOG_TXRF10_CALTXSHIFT_GET(x)
(((x) & 0x00100000) >> 20) |
| 902 #define PHY_ANALOG_TXRF10_CALTXSHIFT_SET(x)
(((x) << 20) & 0x00100000) |
| 903 #define PHY_ANALOG_TXRF10_CALTXSHIFTOVR_MSB
21 |
| 904 #define PHY_ANALOG_TXRF10_CALTXSHIFTOVR_LSB
21 |
| 905 #define PHY_ANALOG_TXRF10_CALTXSHIFTOVR_MASK
0x00200000 |
| 906 #define PHY_ANALOG_TXRF10_CALTXSHIFTOVR_GET(x)
(((x) & 0x00200000) >> 21) |
| 907 #define PHY_ANALOG_TXRF10_CALTXSHIFTOVR_SET(x)
(((x) << 21) & 0x00200000) |
| 908 #define PHY_ANALOG_TXRF10_PADRVGN2G_SMOUT_MSB
27 |
| 909 #define PHY_ANALOG_TXRF10_PADRVGN2G_SMOUT_LSB
22 |
| 910 #define PHY_ANALOG_TXRF10_PADRVGN2G_SMOUT_MASK
0x0fc00000 |
| 911 #define PHY_ANALOG_TXRF10_PADRVGN2G_SMOUT_GET(x)
(((x) & 0x0fc00000) >> 22) |
| 912 #define PHY_ANALOG_TXRF10_PADRVGN_INDEX2G_SMOUT_MSB
31 |
| 913 #define PHY_ANALOG_TXRF10_PADRVGN_INDEX2G_SMOUT_LSB
28 |
| 914 #define PHY_ANALOG_TXRF10_PADRVGN_INDEX2G_SMOUT_MASK
0xf0000000 |
| 915 #define PHY_ANALOG_TXRF10_PADRVGN_INDEX2G_SMOUT_GET(x)
(((x) & 0xf0000000) >> 28) |
| 916 |
| 917 /* macros for TXRF11 */ |
| 918 #define PHY_ANALOG_TXRF11_ADDRESS
0x00000068 |
| 919 #define PHY_ANALOG_TXRF11_OFFSET
0x00000068 |
| 920 #define PHY_ANALOG_TXRF11_SPARE11_MSB
1 |
| 921 #define PHY_ANALOG_TXRF11_SPARE11_LSB
0 |
| 922 #define PHY_ANALOG_TXRF11_SPARE11_MASK
0x00000003 |
| 923 #define PHY_ANALOG_TXRF11_SPARE11_GET(x)
(((x) & 0x00000003) >> 0) |
| 924 #define PHY_ANALOG_TXRF11_SPARE11_SET(x)
(((x) << 0) & 0x00000003) |
| 925 #define PHY_ANALOG_TXRF11_PWD_IR25MIXDIV5G_MSB
4 |
| 926 #define PHY_ANALOG_TXRF11_PWD_IR25MIXDIV5G_LSB
2 |
| 927 #define PHY_ANALOG_TXRF11_PWD_IR25MIXDIV5G_MASK
0x0000001c |
| 928 #define PHY_ANALOG_TXRF11_PWD_IR25MIXDIV5G_GET(x)
(((x) & 0x0000001c) >> 2) |
| 929 #define PHY_ANALOG_TXRF11_PWD_IR25MIXDIV5G_SET(x)
(((x) << 2) & 0x0000001c) |
| 930 #define PHY_ANALOG_TXRF11_PWD_IR25PA2G_MSB
7 |
| 931 #define PHY_ANALOG_TXRF11_PWD_IR25PA2G_LSB
5 |
| 932 #define PHY_ANALOG_TXRF11_PWD_IR25PA2G_MASK
0x000000e0 |
| 933 #define PHY_ANALOG_TXRF11_PWD_IR25PA2G_GET(x)
(((x) & 0x000000e0) >> 5) |
| 934 #define PHY_ANALOG_TXRF11_PWD_IR25PA2G_SET(x)
(((x) << 5) & 0x000000e0) |
| 935 #define PHY_ANALOG_TXRF11_PWD_IR25MIXBIAS2G_MSB
10 |
| 936 #define PHY_ANALOG_TXRF11_PWD_IR25MIXBIAS2G_LSB
8 |
| 937 #define PHY_ANALOG_TXRF11_PWD_IR25MIXBIAS2G_MASK
0x00000700 |
| 938 #define PHY_ANALOG_TXRF11_PWD_IR25MIXBIAS2G_GET(x)
(((x) & 0x00000700) >> 8) |
| 939 #define PHY_ANALOG_TXRF11_PWD_IR25MIXBIAS2G_SET(x)
(((x) << 8) & 0x00000700) |
| 940 #define PHY_ANALOG_TXRF11_PWD_IR25MIXDIV2G_MSB
13 |
| 941 #define PHY_ANALOG_TXRF11_PWD_IR25MIXDIV2G_LSB
11 |
| 942 #define PHY_ANALOG_TXRF11_PWD_IR25MIXDIV2G_MASK
0x00003800 |
| 943 #define PHY_ANALOG_TXRF11_PWD_IR25MIXDIV2G_GET(x)
(((x) & 0x00003800) >> 11) |
| 944 #define PHY_ANALOG_TXRF11_PWD_IR25MIXDIV2G_SET(x)
(((x) << 11) & 0x00003800) |
| 945 #define PHY_ANALOG_TXRF11_PWD_ICSPARE_MSB
16 |
| 946 #define PHY_ANALOG_TXRF11_PWD_ICSPARE_LSB
14 |
| 947 #define PHY_ANALOG_TXRF11_PWD_ICSPARE_MASK
0x0001c000 |
| 948 #define PHY_ANALOG_TXRF11_PWD_ICSPARE_GET(x)
(((x) & 0x0001c000) >> 14) |
| 949 #define PHY_ANALOG_TXRF11_PWD_ICSPARE_SET(x)
(((x) << 14) & 0x0001c000) |
| 950 #define PHY_ANALOG_TXRF11_PWD_IC25TEMPSEN_MSB
19 |
| 951 #define PHY_ANALOG_TXRF11_PWD_IC25TEMPSEN_LSB
17 |
| 952 #define PHY_ANALOG_TXRF11_PWD_IC25TEMPSEN_MASK
0x000e0000 |
| 953 #define PHY_ANALOG_TXRF11_PWD_IC25TEMPSEN_GET(x)
(((x) & 0x000e0000) >> 17) |
| 954 #define PHY_ANALOG_TXRF11_PWD_IC25TEMPSEN_SET(x)
(((x) << 17) & 0x000e0000) |
| 955 #define PHY_ANALOG_TXRF11_PWD_IC25PA5G2_MSB
22 |
| 956 #define PHY_ANALOG_TXRF11_PWD_IC25PA5G2_LSB
20 |
| 957 #define PHY_ANALOG_TXRF11_PWD_IC25PA5G2_MASK
0x00700000 |
| 958 #define PHY_ANALOG_TXRF11_PWD_IC25PA5G2_GET(x)
(((x) & 0x00700000) >> 20) |
| 959 #define PHY_ANALOG_TXRF11_PWD_IC25PA5G2_SET(x)
(((x) << 20) & 0x00700000) |
| 960 #define PHY_ANALOG_TXRF11_PWD_IC25PA5G1_MSB
25 |
| 961 #define PHY_ANALOG_TXRF11_PWD_IC25PA5G1_LSB
23 |
| 962 #define PHY_ANALOG_TXRF11_PWD_IC25PA5G1_MASK
0x03800000 |
| 963 #define PHY_ANALOG_TXRF11_PWD_IC25PA5G1_GET(x)
(((x) & 0x03800000) >> 23) |
| 964 #define PHY_ANALOG_TXRF11_PWD_IC25PA5G1_SET(x)
(((x) << 23) & 0x03800000) |
| 965 #define PHY_ANALOG_TXRF11_PWD_IC25MIXBUF5G_MSB
28 |
| 966 #define PHY_ANALOG_TXRF11_PWD_IC25MIXBUF5G_LSB
26 |
| 967 #define PHY_ANALOG_TXRF11_PWD_IC25MIXBUF5G_MASK
0x1c000000 |
| 968 #define PHY_ANALOG_TXRF11_PWD_IC25MIXBUF5G_GET(x)
(((x) & 0x1c000000) >> 26) |
| 969 #define PHY_ANALOG_TXRF11_PWD_IC25MIXBUF5G_SET(x)
(((x) << 26) & 0x1c000000) |
| 970 #define PHY_ANALOG_TXRF11_PWD_IC25PA2G_MSB
31 |
| 971 #define PHY_ANALOG_TXRF11_PWD_IC25PA2G_LSB
29 |
| 972 #define PHY_ANALOG_TXRF11_PWD_IC25PA2G_MASK
0xe0000000 |
| 973 #define PHY_ANALOG_TXRF11_PWD_IC25PA2G_GET(x)
(((x) & 0xe0000000) >> 29) |
| 974 #define PHY_ANALOG_TXRF11_PWD_IC25PA2G_SET(x)
(((x) << 29) & 0xe0000000) |
| 975 |
| 976 /* macros for TXRF12 */ |
| 977 #define PHY_ANALOG_TXRF12_ADDRESS
0x0000006c |
| 978 #define PHY_ANALOG_TXRF12_OFFSET
0x0000006c |
| 979 #define PHY_ANALOG_TXRF12_SPARE12_2_MSB
7 |
| 980 #define PHY_ANALOG_TXRF12_SPARE12_2_LSB
0 |
| 981 #define PHY_ANALOG_TXRF12_SPARE12_2_MASK
0x000000ff |
| 982 #define PHY_ANALOG_TXRF12_SPARE12_2_GET(x)
(((x) & 0x000000ff) >> 0) |
| 983 #define PHY_ANALOG_TXRF12_SPARE12_1_MSB
9 |
| 984 #define PHY_ANALOG_TXRF12_SPARE12_1_LSB
8 |
| 985 #define PHY_ANALOG_TXRF12_SPARE12_1_MASK
0x00000300 |
| 986 #define PHY_ANALOG_TXRF12_SPARE12_1_GET(x)
(((x) & 0x00000300) >> 8) |
| 987 #define PHY_ANALOG_TXRF12_SPARE12_1_SET(x)
(((x) << 8) & 0x00000300) |
| 988 #define PHY_ANALOG_TXRF12_ATBSEL5G_MSB
13 |
| 989 #define PHY_ANALOG_TXRF12_ATBSEL5G_LSB
10 |
| 990 #define PHY_ANALOG_TXRF12_ATBSEL5G_MASK
0x00003c00 |
| 991 #define PHY_ANALOG_TXRF12_ATBSEL5G_GET(x)
(((x) & 0x00003c00) >> 10) |
| 992 #define PHY_ANALOG_TXRF12_ATBSEL5G_SET(x)
(((x) << 10) & 0x00003c00) |
| 993 #define PHY_ANALOG_TXRF12_ATBSEL2G_MSB
16 |
| 994 #define PHY_ANALOG_TXRF12_ATBSEL2G_LSB
14 |
| 995 #define PHY_ANALOG_TXRF12_ATBSEL2G_MASK
0x0001c000 |
| 996 #define PHY_ANALOG_TXRF12_ATBSEL2G_GET(x)
(((x) & 0x0001c000) >> 14) |
| 997 #define PHY_ANALOG_TXRF12_ATBSEL2G_SET(x)
(((x) << 14) & 0x0001c000) |
| 998 #define PHY_ANALOG_TXRF12_PWD_IRSPARE_MSB
19 |
| 999 #define PHY_ANALOG_TXRF12_PWD_IRSPARE_LSB
17 |
| 1000 #define PHY_ANALOG_TXRF12_PWD_IRSPARE_MASK
0x000e0000 |
| 1001 #define PHY_ANALOG_TXRF12_PWD_IRSPARE_GET(x)
(((x) & 0x000e0000) >> 17) |
| 1002 #define PHY_ANALOG_TXRF12_PWD_IRSPARE_SET(x)
(((x) << 17) & 0x000e0000) |
| 1003 #define PHY_ANALOG_TXRF12_PWD_IR25TEMPSEN_MSB
22 |
| 1004 #define PHY_ANALOG_TXRF12_PWD_IR25TEMPSEN_LSB
20 |
| 1005 #define PHY_ANALOG_TXRF12_PWD_IR25TEMPSEN_MASK
0x00700000 |
| 1006 #define PHY_ANALOG_TXRF12_PWD_IR25TEMPSEN_GET(x)
(((x) & 0x00700000) >> 20) |
| 1007 #define PHY_ANALOG_TXRF12_PWD_IR25TEMPSEN_SET(x)
(((x) << 20) & 0x00700000) |
| 1008 #define PHY_ANALOG_TXRF12_PWD_IR25PA5G2_MSB
25 |
| 1009 #define PHY_ANALOG_TXRF12_PWD_IR25PA5G2_LSB
23 |
| 1010 #define PHY_ANALOG_TXRF12_PWD_IR25PA5G2_MASK
0x03800000 |
| 1011 #define PHY_ANALOG_TXRF12_PWD_IR25PA5G2_GET(x)
(((x) & 0x03800000) >> 23) |
| 1012 #define PHY_ANALOG_TXRF12_PWD_IR25PA5G2_SET(x)
(((x) << 23) & 0x03800000) |
| 1013 #define PHY_ANALOG_TXRF12_PWD_IR25PA5G1_MSB
28 |
| 1014 #define PHY_ANALOG_TXRF12_PWD_IR25PA5G1_LSB
26 |
| 1015 #define PHY_ANALOG_TXRF12_PWD_IR25PA5G1_MASK
0x1c000000 |
| 1016 #define PHY_ANALOG_TXRF12_PWD_IR25PA5G1_GET(x)
(((x) & 0x1c000000) >> 26) |
| 1017 #define PHY_ANALOG_TXRF12_PWD_IR25PA5G1_SET(x)
(((x) << 26) & 0x1c000000) |
| 1018 #define PHY_ANALOG_TXRF12_PWD_IR25MIXBIAS5G_MSB
31 |
| 1019 #define PHY_ANALOG_TXRF12_PWD_IR25MIXBIAS5G_LSB
29 |
| 1020 #define PHY_ANALOG_TXRF12_PWD_IR25MIXBIAS5G_MASK
0xe0000000 |
| 1021 #define PHY_ANALOG_TXRF12_PWD_IR25MIXBIAS5G_GET(x)
(((x) & 0xe0000000) >> 29) |
| 1022 #define PHY_ANALOG_TXRF12_PWD_IR25MIXBIAS5G_SET(x)
(((x) << 29) & 0xe0000000) |
| 1023 |
| 1024 /* macros for SYNTH1 */ |
| 1025 #define PHY_ANALOG_SYNTH1_ADDRESS
0x00000080 |
| 1026 #define PHY_ANALOG_SYNTH1_OFFSET
0x00000080 |
| 1027 #define PHY_ANALOG_SYNTH1_SEL_VCMONABUS_MSB
2 |
| 1028 #define PHY_ANALOG_SYNTH1_SEL_VCMONABUS_LSB
0 |
| 1029 #define PHY_ANALOG_SYNTH1_SEL_VCMONABUS_MASK
0x00000007 |
| 1030 #define PHY_ANALOG_SYNTH1_SEL_VCMONABUS_GET(x)
(((x) & 0x00000007) >> 0) |
| 1031 #define PHY_ANALOG_SYNTH1_SEL_VCMONABUS_SET(x)
(((x) << 0) & 0x00000007) |
| 1032 #define PHY_ANALOG_SYNTH1_SEL_VCOABUS_MSB
5 |
| 1033 #define PHY_ANALOG_SYNTH1_SEL_VCOABUS_LSB
3 |
| 1034 #define PHY_ANALOG_SYNTH1_SEL_VCOABUS_MASK
0x00000038 |
| 1035 #define PHY_ANALOG_SYNTH1_SEL_VCOABUS_GET(x)
(((x) & 0x00000038) >> 3) |
| 1036 #define PHY_ANALOG_SYNTH1_SEL_VCOABUS_SET(x)
(((x) << 3) & 0x00000038) |
| 1037 #define PHY_ANALOG_SYNTH1_MONITOR_SYNTHLOCKVCOK_MSB
6 |
| 1038 #define PHY_ANALOG_SYNTH1_MONITOR_SYNTHLOCKVCOK_LSB
6 |
| 1039 #define PHY_ANALOG_SYNTH1_MONITOR_SYNTHLOCKVCOK_MASK
0x00000040 |
| 1040 #define PHY_ANALOG_SYNTH1_MONITOR_SYNTHLOCKVCOK_GET(x)
(((x) & 0x00000040) >> 6) |
| 1041 #define PHY_ANALOG_SYNTH1_MONITOR_SYNTHLOCKVCOK_SET(x)
(((x) << 6) & 0x00000040) |
| 1042 #define PHY_ANALOG_SYNTH1_MONITOR_VC2LOW_MSB
7 |
| 1043 #define PHY_ANALOG_SYNTH1_MONITOR_VC2LOW_LSB
7 |
| 1044 #define PHY_ANALOG_SYNTH1_MONITOR_VC2LOW_MASK
0x00000080 |
| 1045 #define PHY_ANALOG_SYNTH1_MONITOR_VC2LOW_GET(x)
(((x) & 0x00000080) >> 7) |
| 1046 #define PHY_ANALOG_SYNTH1_MONITOR_VC2LOW_SET(x)
(((x) << 7) & 0x00000080) |
| 1047 #define PHY_ANALOG_SYNTH1_MONITOR_VC2HIGH_MSB
8 |
| 1048 #define PHY_ANALOG_SYNTH1_MONITOR_VC2HIGH_LSB
8 |
| 1049 #define PHY_ANALOG_SYNTH1_MONITOR_VC2HIGH_MASK
0x00000100 |
| 1050 #define PHY_ANALOG_SYNTH1_MONITOR_VC2HIGH_GET(x)
(((x) & 0x00000100) >> 8) |
| 1051 #define PHY_ANALOG_SYNTH1_MONITOR_VC2HIGH_SET(x)
(((x) << 8) & 0x00000100) |
| 1052 #define PHY_ANALOG_SYNTH1_MONITOR_FB_DIV2_MSB
9 |
| 1053 #define PHY_ANALOG_SYNTH1_MONITOR_FB_DIV2_LSB
9 |
| 1054 #define PHY_ANALOG_SYNTH1_MONITOR_FB_DIV2_MASK
0x00000200 |
| 1055 #define PHY_ANALOG_SYNTH1_MONITOR_FB_DIV2_GET(x)
(((x) & 0x00000200) >> 9) |
| 1056 #define PHY_ANALOG_SYNTH1_MONITOR_FB_DIV2_SET(x)
(((x) << 9) & 0x00000200) |
| 1057 #define PHY_ANALOG_SYNTH1_MONITOR_REF_MSB
10 |
| 1058 #define PHY_ANALOG_SYNTH1_MONITOR_REF_LSB
10 |
| 1059 #define PHY_ANALOG_SYNTH1_MONITOR_REF_MASK
0x00000400 |
| 1060 #define PHY_ANALOG_SYNTH1_MONITOR_REF_GET(x)
(((x) & 0x00000400) >> 10) |
| 1061 #define PHY_ANALOG_SYNTH1_MONITOR_REF_SET(x)
(((x) << 10) & 0x00000400) |
| 1062 #define PHY_ANALOG_SYNTH1_MONITOR_FB_MSB
11 |
| 1063 #define PHY_ANALOG_SYNTH1_MONITOR_FB_LSB
11 |
| 1064 #define PHY_ANALOG_SYNTH1_MONITOR_FB_MASK
0x00000800 |
| 1065 #define PHY_ANALOG_SYNTH1_MONITOR_FB_GET(x)
(((x) & 0x00000800) >> 11) |
| 1066 #define PHY_ANALOG_SYNTH1_MONITOR_FB_SET(x)
(((x) << 11) & 0x00000800) |
| 1067 #define PHY_ANALOG_SYNTH1_SEVENBITVCOCAP_MSB
12 |
| 1068 #define PHY_ANALOG_SYNTH1_SEVENBITVCOCAP_LSB
12 |
| 1069 #define PHY_ANALOG_SYNTH1_SEVENBITVCOCAP_MASK
0x00001000 |
| 1070 #define PHY_ANALOG_SYNTH1_SEVENBITVCOCAP_GET(x)
(((x) & 0x00001000) >> 12) |
| 1071 #define PHY_ANALOG_SYNTH1_SEVENBITVCOCAP_SET(x)
(((x) << 12) & 0x00001000) |
| 1072 #define PHY_ANALOG_SYNTH1_PWUP_PD_MSB
15 |
| 1073 #define PHY_ANALOG_SYNTH1_PWUP_PD_LSB
13 |
| 1074 #define PHY_ANALOG_SYNTH1_PWUP_PD_MASK
0x0000e000 |
| 1075 #define PHY_ANALOG_SYNTH1_PWUP_PD_GET(x)
(((x) & 0x0000e000) >> 13) |
| 1076 #define PHY_ANALOG_SYNTH1_PWUP_PD_SET(x)
(((x) << 13) & 0x0000e000) |
| 1077 #define PHY_ANALOG_SYNTH1_PWD_VCOBUF_MSB
16 |
| 1078 #define PHY_ANALOG_SYNTH1_PWD_VCOBUF_LSB
16 |
| 1079 #define PHY_ANALOG_SYNTH1_PWD_VCOBUF_MASK
0x00010000 |
| 1080 #define PHY_ANALOG_SYNTH1_PWD_VCOBUF_GET(x)
(((x) & 0x00010000) >> 16) |
| 1081 #define PHY_ANALOG_SYNTH1_PWD_VCOBUF_SET(x)
(((x) << 16) & 0x00010000) |
| 1082 #define PHY_ANALOG_SYNTH1_VCOBUFGAIN_MSB
18 |
| 1083 #define PHY_ANALOG_SYNTH1_VCOBUFGAIN_LSB
17 |
| 1084 #define PHY_ANALOG_SYNTH1_VCOBUFGAIN_MASK
0x00060000 |
| 1085 #define PHY_ANALOG_SYNTH1_VCOBUFGAIN_GET(x)
(((x) & 0x00060000) >> 17) |
| 1086 #define PHY_ANALOG_SYNTH1_VCOBUFGAIN_SET(x)
(((x) << 17) & 0x00060000) |
| 1087 #define PHY_ANALOG_SYNTH1_VCOREGLEVEL_MSB
20 |
| 1088 #define PHY_ANALOG_SYNTH1_VCOREGLEVEL_LSB
19 |
| 1089 #define PHY_ANALOG_SYNTH1_VCOREGLEVEL_MASK
0x00180000 |
| 1090 #define PHY_ANALOG_SYNTH1_VCOREGLEVEL_GET(x)
(((x) & 0x00180000) >> 19) |
| 1091 #define PHY_ANALOG_SYNTH1_VCOREGLEVEL_SET(x)
(((x) << 19) & 0x00180000) |
| 1092 #define PHY_ANALOG_SYNTH1_VCOREGBYPASS_MSB
21 |
| 1093 #define PHY_ANALOG_SYNTH1_VCOREGBYPASS_LSB
21 |
| 1094 #define PHY_ANALOG_SYNTH1_VCOREGBYPASS_MASK
0x00200000 |
| 1095 #define PHY_ANALOG_SYNTH1_VCOREGBYPASS_GET(x)
(((x) & 0x00200000) >> 21) |
| 1096 #define PHY_ANALOG_SYNTH1_VCOREGBYPASS_SET(x)
(((x) << 21) & 0x00200000) |
| 1097 #define PHY_ANALOG_SYNTH1_PWUP_LOREF_MSB
22 |
| 1098 #define PHY_ANALOG_SYNTH1_PWUP_LOREF_LSB
22 |
| 1099 #define PHY_ANALOG_SYNTH1_PWUP_LOREF_MASK
0x00400000 |
| 1100 #define PHY_ANALOG_SYNTH1_PWUP_LOREF_GET(x)
(((x) & 0x00400000) >> 22) |
| 1101 #define PHY_ANALOG_SYNTH1_PWUP_LOREF_SET(x)
(((x) << 22) & 0x00400000) |
| 1102 #define PHY_ANALOG_SYNTH1_PWD_LOMIX_MSB
23 |
| 1103 #define PHY_ANALOG_SYNTH1_PWD_LOMIX_LSB
23 |
| 1104 #define PHY_ANALOG_SYNTH1_PWD_LOMIX_MASK
0x00800000 |
| 1105 #define PHY_ANALOG_SYNTH1_PWD_LOMIX_GET(x)
(((x) & 0x00800000) >> 23) |
| 1106 #define PHY_ANALOG_SYNTH1_PWD_LOMIX_SET(x)
(((x) << 23) & 0x00800000) |
| 1107 #define PHY_ANALOG_SYNTH1_PWD_LODIV_MSB
24 |
| 1108 #define PHY_ANALOG_SYNTH1_PWD_LODIV_LSB
24 |
| 1109 #define PHY_ANALOG_SYNTH1_PWD_LODIV_MASK
0x01000000 |
| 1110 #define PHY_ANALOG_SYNTH1_PWD_LODIV_GET(x)
(((x) & 0x01000000) >> 24) |
| 1111 #define PHY_ANALOG_SYNTH1_PWD_LODIV_SET(x)
(((x) << 24) & 0x01000000) |
| 1112 #define PHY_ANALOG_SYNTH1_PWD_LOBUF5G_MSB
25 |
| 1113 #define PHY_ANALOG_SYNTH1_PWD_LOBUF5G_LSB
25 |
| 1114 #define PHY_ANALOG_SYNTH1_PWD_LOBUF5G_MASK
0x02000000 |
| 1115 #define PHY_ANALOG_SYNTH1_PWD_LOBUF5G_GET(x)
(((x) & 0x02000000) >> 25) |
| 1116 #define PHY_ANALOG_SYNTH1_PWD_LOBUF5G_SET(x)
(((x) << 25) & 0x02000000) |
| 1117 #define PHY_ANALOG_SYNTH1_PWD_LOBUF2G_MSB
26 |
| 1118 #define PHY_ANALOG_SYNTH1_PWD_LOBUF2G_LSB
26 |
| 1119 #define PHY_ANALOG_SYNTH1_PWD_LOBUF2G_MASK
0x04000000 |
| 1120 #define PHY_ANALOG_SYNTH1_PWD_LOBUF2G_GET(x)
(((x) & 0x04000000) >> 26) |
| 1121 #define PHY_ANALOG_SYNTH1_PWD_LOBUF2G_SET(x)
(((x) << 26) & 0x04000000) |
| 1122 #define PHY_ANALOG_SYNTH1_PWD_PRESC_MSB
27 |
| 1123 #define PHY_ANALOG_SYNTH1_PWD_PRESC_LSB
27 |
| 1124 #define PHY_ANALOG_SYNTH1_PWD_PRESC_MASK
0x08000000 |
| 1125 #define PHY_ANALOG_SYNTH1_PWD_PRESC_GET(x)
(((x) & 0x08000000) >> 27) |
| 1126 #define PHY_ANALOG_SYNTH1_PWD_PRESC_SET(x)
(((x) << 27) & 0x08000000) |
| 1127 #define PHY_ANALOG_SYNTH1_PWD_VCO_MSB
28 |
| 1128 #define PHY_ANALOG_SYNTH1_PWD_VCO_LSB
28 |
| 1129 #define PHY_ANALOG_SYNTH1_PWD_VCO_MASK
0x10000000 |
| 1130 #define PHY_ANALOG_SYNTH1_PWD_VCO_GET(x)
(((x) & 0x10000000) >> 28) |
| 1131 #define PHY_ANALOG_SYNTH1_PWD_VCO_SET(x)
(((x) << 28) & 0x10000000) |
| 1132 #define PHY_ANALOG_SYNTH1_PWD_VCMON_MSB
29 |
| 1133 #define PHY_ANALOG_SYNTH1_PWD_VCMON_LSB
29 |
| 1134 #define PHY_ANALOG_SYNTH1_PWD_VCMON_MASK
0x20000000 |
| 1135 #define PHY_ANALOG_SYNTH1_PWD_VCMON_GET(x)
(((x) & 0x20000000) >> 29) |
| 1136 #define PHY_ANALOG_SYNTH1_PWD_VCMON_SET(x)
(((x) << 29) & 0x20000000) |
| 1137 #define PHY_ANALOG_SYNTH1_PWD_CP_MSB
30 |
| 1138 #define PHY_ANALOG_SYNTH1_PWD_CP_LSB
30 |
| 1139 #define PHY_ANALOG_SYNTH1_PWD_CP_MASK
0x40000000 |
| 1140 #define PHY_ANALOG_SYNTH1_PWD_CP_GET(x)
(((x) & 0x40000000) >> 30) |
| 1141 #define PHY_ANALOG_SYNTH1_PWD_CP_SET(x)
(((x) << 30) & 0x40000000) |
| 1142 #define PHY_ANALOG_SYNTH1_PWD_BIAS_MSB
31 |
| 1143 #define PHY_ANALOG_SYNTH1_PWD_BIAS_LSB
31 |
| 1144 #define PHY_ANALOG_SYNTH1_PWD_BIAS_MASK
0x80000000 |
| 1145 #define PHY_ANALOG_SYNTH1_PWD_BIAS_GET(x)
(((x) & 0x80000000) >> 31) |
| 1146 #define PHY_ANALOG_SYNTH1_PWD_BIAS_SET(x)
(((x) << 31) & 0x80000000) |
| 1147 |
| 1148 /* macros for SYNTH2 */ |
| 1149 #define PHY_ANALOG_SYNTH2_ADDRESS
0x00000084 |
| 1150 #define PHY_ANALOG_SYNTH2_OFFSET
0x00000084 |
| 1151 #define PHY_ANALOG_SYNTH2_CAPRANGE3_MSB
3 |
| 1152 #define PHY_ANALOG_SYNTH2_CAPRANGE3_LSB
0 |
| 1153 #define PHY_ANALOG_SYNTH2_CAPRANGE3_MASK
0x0000000f |
| 1154 #define PHY_ANALOG_SYNTH2_CAPRANGE3_GET(x)
(((x) & 0x0000000f) >> 0) |
| 1155 #define PHY_ANALOG_SYNTH2_CAPRANGE3_SET(x)
(((x) << 0) & 0x0000000f) |
| 1156 #define PHY_ANALOG_SYNTH2_CAPRANGE2_MSB
7 |
| 1157 #define PHY_ANALOG_SYNTH2_CAPRANGE2_LSB
4 |
| 1158 #define PHY_ANALOG_SYNTH2_CAPRANGE2_MASK
0x000000f0 |
| 1159 #define PHY_ANALOG_SYNTH2_CAPRANGE2_GET(x)
(((x) & 0x000000f0) >> 4) |
| 1160 #define PHY_ANALOG_SYNTH2_CAPRANGE2_SET(x)
(((x) << 4) & 0x000000f0) |
| 1161 #define PHY_ANALOG_SYNTH2_CAPRANGE1_MSB
11 |
| 1162 #define PHY_ANALOG_SYNTH2_CAPRANGE1_LSB
8 |
| 1163 #define PHY_ANALOG_SYNTH2_CAPRANGE1_MASK
0x00000f00 |
| 1164 #define PHY_ANALOG_SYNTH2_CAPRANGE1_GET(x)
(((x) & 0x00000f00) >> 8) |
| 1165 #define PHY_ANALOG_SYNTH2_CAPRANGE1_SET(x)
(((x) << 8) & 0x00000f00) |
| 1166 #define PHY_ANALOG_SYNTH2_LOOPLEAKCUR_INTN_MSB
15 |
| 1167 #define PHY_ANALOG_SYNTH2_LOOPLEAKCUR_INTN_LSB
12 |
| 1168 #define PHY_ANALOG_SYNTH2_LOOPLEAKCUR_INTN_MASK
0x0000f000 |
| 1169 #define PHY_ANALOG_SYNTH2_LOOPLEAKCUR_INTN_GET(x)
(((x) & 0x0000f000) >> 12) |
| 1170 #define PHY_ANALOG_SYNTH2_LOOPLEAKCUR_INTN_SET(x)
(((x) << 12) & 0x0000f000) |
| 1171 #define PHY_ANALOG_SYNTH2_CPLOWLK_INTN_MSB
16 |
| 1172 #define PHY_ANALOG_SYNTH2_CPLOWLK_INTN_LSB
16 |
| 1173 #define PHY_ANALOG_SYNTH2_CPLOWLK_INTN_MASK
0x00010000 |
| 1174 #define PHY_ANALOG_SYNTH2_CPLOWLK_INTN_GET(x)
(((x) & 0x00010000) >> 16) |
| 1175 #define PHY_ANALOG_SYNTH2_CPLOWLK_INTN_SET(x)
(((x) << 16) & 0x00010000) |
| 1176 #define PHY_ANALOG_SYNTH2_CPSTEERING_EN_INTN_MSB
17 |
| 1177 #define PHY_ANALOG_SYNTH2_CPSTEERING_EN_INTN_LSB
17 |
| 1178 #define PHY_ANALOG_SYNTH2_CPSTEERING_EN_INTN_MASK
0x00020000 |
| 1179 #define PHY_ANALOG_SYNTH2_CPSTEERING_EN_INTN_GET(x)
(((x) & 0x00020000) >> 17) |
| 1180 #define PHY_ANALOG_SYNTH2_CPSTEERING_EN_INTN_SET(x)
(((x) << 17) & 0x00020000) |
| 1181 #define PHY_ANALOG_SYNTH2_CPBIAS_INTN_MSB
19 |
| 1182 #define PHY_ANALOG_SYNTH2_CPBIAS_INTN_LSB
18 |
| 1183 #define PHY_ANALOG_SYNTH2_CPBIAS_INTN_MASK
0x000c0000 |
| 1184 #define PHY_ANALOG_SYNTH2_CPBIAS_INTN_GET(x)
(((x) & 0x000c0000) >> 18) |
| 1185 #define PHY_ANALOG_SYNTH2_CPBIAS_INTN_SET(x)
(((x) << 18) & 0x000c0000) |
| 1186 #define PHY_ANALOG_SYNTH2_VC_LOW_REF_MSB
22 |
| 1187 #define PHY_ANALOG_SYNTH2_VC_LOW_REF_LSB
20 |
| 1188 #define PHY_ANALOG_SYNTH2_VC_LOW_REF_MASK
0x00700000 |
| 1189 #define PHY_ANALOG_SYNTH2_VC_LOW_REF_GET(x)
(((x) & 0x00700000) >> 20) |
| 1190 #define PHY_ANALOG_SYNTH2_VC_LOW_REF_SET(x)
(((x) << 20) & 0x00700000) |
| 1191 #define PHY_ANALOG_SYNTH2_VC_MID_REF_MSB
25 |
| 1192 #define PHY_ANALOG_SYNTH2_VC_MID_REF_LSB
23 |
| 1193 #define PHY_ANALOG_SYNTH2_VC_MID_REF_MASK
0x03800000 |
| 1194 #define PHY_ANALOG_SYNTH2_VC_MID_REF_GET(x)
(((x) & 0x03800000) >> 23) |
| 1195 #define PHY_ANALOG_SYNTH2_VC_MID_REF_SET(x)
(((x) << 23) & 0x03800000) |
| 1196 #define PHY_ANALOG_SYNTH2_VC_HI_REF_MSB
28 |
| 1197 #define PHY_ANALOG_SYNTH2_VC_HI_REF_LSB
26 |
| 1198 #define PHY_ANALOG_SYNTH2_VC_HI_REF_MASK
0x1c000000 |
| 1199 #define PHY_ANALOG_SYNTH2_VC_HI_REF_GET(x)
(((x) & 0x1c000000) >> 26) |
| 1200 #define PHY_ANALOG_SYNTH2_VC_HI_REF_SET(x)
(((x) << 26) & 0x1c000000) |
| 1201 #define PHY_ANALOG_SYNTH2_VC_CAL_REF_MSB
31 |
| 1202 #define PHY_ANALOG_SYNTH2_VC_CAL_REF_LSB
29 |
| 1203 #define PHY_ANALOG_SYNTH2_VC_CAL_REF_MASK
0xe0000000 |
| 1204 #define PHY_ANALOG_SYNTH2_VC_CAL_REF_GET(x)
(((x) & 0xe0000000) >> 29) |
| 1205 #define PHY_ANALOG_SYNTH2_VC_CAL_REF_SET(x)
(((x) << 29) & 0xe0000000) |
| 1206 |
| 1207 /* macros for SYNTH3 */ |
| 1208 #define PHY_ANALOG_SYNTH3_ADDRESS
0x00000088 |
| 1209 #define PHY_ANALOG_SYNTH3_OFFSET
0x00000088 |
| 1210 #define PHY_ANALOG_SYNTH3_WAIT_VC_CHECK_MSB
5 |
| 1211 #define PHY_ANALOG_SYNTH3_WAIT_VC_CHECK_LSB
0 |
| 1212 #define PHY_ANALOG_SYNTH3_WAIT_VC_CHECK_MASK
0x0000003f |
| 1213 #define PHY_ANALOG_SYNTH3_WAIT_VC_CHECK_GET(x)
(((x) & 0x0000003f) >> 0) |
| 1214 #define PHY_ANALOG_SYNTH3_WAIT_VC_CHECK_SET(x)
(((x) << 0) & 0x0000003f) |
| 1215 #define PHY_ANALOG_SYNTH3_WAIT_CAL_LIN_MSB
11 |
| 1216 #define PHY_ANALOG_SYNTH3_WAIT_CAL_LIN_LSB
6 |
| 1217 #define PHY_ANALOG_SYNTH3_WAIT_CAL_LIN_MASK
0x00000fc0 |
| 1218 #define PHY_ANALOG_SYNTH3_WAIT_CAL_LIN_GET(x)
(((x) & 0x00000fc0) >> 6) |
| 1219 #define PHY_ANALOG_SYNTH3_WAIT_CAL_LIN_SET(x)
(((x) << 6) & 0x00000fc0) |
| 1220 #define PHY_ANALOG_SYNTH3_WAIT_CAL_BIN_MSB
17 |
| 1221 #define PHY_ANALOG_SYNTH3_WAIT_CAL_BIN_LSB
12 |
| 1222 #define PHY_ANALOG_SYNTH3_WAIT_CAL_BIN_MASK
0x0003f000 |
| 1223 #define PHY_ANALOG_SYNTH3_WAIT_CAL_BIN_GET(x)
(((x) & 0x0003f000) >> 12) |
| 1224 #define PHY_ANALOG_SYNTH3_WAIT_CAL_BIN_SET(x)
(((x) << 12) & 0x0003f000) |
| 1225 #define PHY_ANALOG_SYNTH3_WAIT_PWRUP_MSB
23 |
| 1226 #define PHY_ANALOG_SYNTH3_WAIT_PWRUP_LSB
18 |
| 1227 #define PHY_ANALOG_SYNTH3_WAIT_PWRUP_MASK
0x00fc0000 |
| 1228 #define PHY_ANALOG_SYNTH3_WAIT_PWRUP_GET(x)
(((x) & 0x00fc0000) >> 18) |
| 1229 #define PHY_ANALOG_SYNTH3_WAIT_PWRUP_SET(x)
(((x) << 18) & 0x00fc0000) |
| 1230 #define PHY_ANALOG_SYNTH3_WAIT_SHORTR_PWRUP_MSB
29 |
| 1231 #define PHY_ANALOG_SYNTH3_WAIT_SHORTR_PWRUP_LSB
24 |
| 1232 #define PHY_ANALOG_SYNTH3_WAIT_SHORTR_PWRUP_MASK
0x3f000000 |
| 1233 #define PHY_ANALOG_SYNTH3_WAIT_SHORTR_PWRUP_GET(x)
(((x) & 0x3f000000) >> 24) |
| 1234 #define PHY_ANALOG_SYNTH3_WAIT_SHORTR_PWRUP_SET(x)
(((x) << 24) & 0x3f000000) |
| 1235 #define PHY_ANALOG_SYNTH3_SEL_CLK_DIV2_MSB
30 |
| 1236 #define PHY_ANALOG_SYNTH3_SEL_CLK_DIV2_LSB
30 |
| 1237 #define PHY_ANALOG_SYNTH3_SEL_CLK_DIV2_MASK
0x40000000 |
| 1238 #define PHY_ANALOG_SYNTH3_SEL_CLK_DIV2_GET(x)
(((x) & 0x40000000) >> 30) |
| 1239 #define PHY_ANALOG_SYNTH3_SEL_CLK_DIV2_SET(x)
(((x) << 30) & 0x40000000) |
| 1240 #define PHY_ANALOG_SYNTH3_DIS_CLK_XTAL_MSB
31 |
| 1241 #define PHY_ANALOG_SYNTH3_DIS_CLK_XTAL_LSB
31 |
| 1242 #define PHY_ANALOG_SYNTH3_DIS_CLK_XTAL_MASK
0x80000000 |
| 1243 #define PHY_ANALOG_SYNTH3_DIS_CLK_XTAL_GET(x)
(((x) & 0x80000000) >> 31) |
| 1244 #define PHY_ANALOG_SYNTH3_DIS_CLK_XTAL_SET(x)
(((x) << 31) & 0x80000000) |
| 1245 |
| 1246 /* macros for SYNTH4 */ |
| 1247 #define PHY_ANALOG_SYNTH4_ADDRESS
0x0000008c |
| 1248 #define PHY_ANALOG_SYNTH4_OFFSET
0x0000008c |
| 1249 #define PHY_ANALOG_SYNTH4_PS_SINGLE_PULSE_MSB
0 |
| 1250 #define PHY_ANALOG_SYNTH4_PS_SINGLE_PULSE_LSB
0 |
| 1251 #define PHY_ANALOG_SYNTH4_PS_SINGLE_PULSE_MASK
0x00000001 |
| 1252 #define PHY_ANALOG_SYNTH4_PS_SINGLE_PULSE_GET(x)
(((x) & 0x00000001) >> 0) |
| 1253 #define PHY_ANALOG_SYNTH4_PS_SINGLE_PULSE_SET(x)
(((x) << 0) & 0x00000001) |
| 1254 #define PHY_ANALOG_SYNTH4_LONGSHIFTSEL_MSB
1 |
| 1255 #define PHY_ANALOG_SYNTH4_LONGSHIFTSEL_LSB
1 |
| 1256 #define PHY_ANALOG_SYNTH4_LONGSHIFTSEL_MASK
0x00000002 |
| 1257 #define PHY_ANALOG_SYNTH4_LONGSHIFTSEL_GET(x)
(((x) & 0x00000002) >> 1) |
| 1258 #define PHY_ANALOG_SYNTH4_LONGSHIFTSEL_SET(x)
(((x) << 1) & 0x00000002) |
| 1259 #define PHY_ANALOG_SYNTH4_LOBUF5GTUNE_OVR_MSB
3 |
| 1260 #define PHY_ANALOG_SYNTH4_LOBUF5GTUNE_OVR_LSB
2 |
| 1261 #define PHY_ANALOG_SYNTH4_LOBUF5GTUNE_OVR_MASK
0x0000000c |
| 1262 #define PHY_ANALOG_SYNTH4_LOBUF5GTUNE_OVR_GET(x)
(((x) & 0x0000000c) >> 2) |
| 1263 #define PHY_ANALOG_SYNTH4_LOBUF5GTUNE_OVR_SET(x)
(((x) << 2) & 0x0000000c) |
| 1264 #define PHY_ANALOG_SYNTH4_FORCE_LOBUF5GTUNE_MSB
4 |
| 1265 #define PHY_ANALOG_SYNTH4_FORCE_LOBUF5GTUNE_LSB
4 |
| 1266 #define PHY_ANALOG_SYNTH4_FORCE_LOBUF5GTUNE_MASK
0x00000010 |
| 1267 #define PHY_ANALOG_SYNTH4_FORCE_LOBUF5GTUNE_GET(x)
(((x) & 0x00000010) >> 4) |
| 1268 #define PHY_ANALOG_SYNTH4_FORCE_LOBUF5GTUNE_SET(x)
(((x) << 4) & 0x00000010) |
| 1269 #define PHY_ANALOG_SYNTH4_PSCOUNT_FBSEL_MSB
5 |
| 1270 #define PHY_ANALOG_SYNTH4_PSCOUNT_FBSEL_LSB
5 |
| 1271 #define PHY_ANALOG_SYNTH4_PSCOUNT_FBSEL_MASK
0x00000020 |
| 1272 #define PHY_ANALOG_SYNTH4_PSCOUNT_FBSEL_GET(x)
(((x) & 0x00000020) >> 5) |
| 1273 #define PHY_ANALOG_SYNTH4_PSCOUNT_FBSEL_SET(x)
(((x) << 5) & 0x00000020) |
| 1274 #define PHY_ANALOG_SYNTH4_SDM_DITHER1_MSB
7 |
| 1275 #define PHY_ANALOG_SYNTH4_SDM_DITHER1_LSB
6 |
| 1276 #define PHY_ANALOG_SYNTH4_SDM_DITHER1_MASK
0x000000c0 |
| 1277 #define PHY_ANALOG_SYNTH4_SDM_DITHER1_GET(x)
(((x) & 0x000000c0) >> 6) |
| 1278 #define PHY_ANALOG_SYNTH4_SDM_DITHER1_SET(x)
(((x) << 6) & 0x000000c0) |
| 1279 #define PHY_ANALOG_SYNTH4_SDM_MODE_MSB
8 |
| 1280 #define PHY_ANALOG_SYNTH4_SDM_MODE_LSB
8 |
| 1281 #define PHY_ANALOG_SYNTH4_SDM_MODE_MASK
0x00000100 |
| 1282 #define PHY_ANALOG_SYNTH4_SDM_MODE_GET(x)
(((x) & 0x00000100) >> 8) |
| 1283 #define PHY_ANALOG_SYNTH4_SDM_MODE_SET(x)
(((x) << 8) & 0x00000100) |
| 1284 #define PHY_ANALOG_SYNTH4_SDM_DISABLE_MSB
9 |
| 1285 #define PHY_ANALOG_SYNTH4_SDM_DISABLE_LSB
9 |
| 1286 #define PHY_ANALOG_SYNTH4_SDM_DISABLE_MASK
0x00000200 |
| 1287 #define PHY_ANALOG_SYNTH4_SDM_DISABLE_GET(x)
(((x) & 0x00000200) >> 9) |
| 1288 #define PHY_ANALOG_SYNTH4_SDM_DISABLE_SET(x)
(((x) << 9) & 0x00000200) |
| 1289 #define PHY_ANALOG_SYNTH4_RESET_PRESC_MSB
10 |
| 1290 #define PHY_ANALOG_SYNTH4_RESET_PRESC_LSB
10 |
| 1291 #define PHY_ANALOG_SYNTH4_RESET_PRESC_MASK
0x00000400 |
| 1292 #define PHY_ANALOG_SYNTH4_RESET_PRESC_GET(x)
(((x) & 0x00000400) >> 10) |
| 1293 #define PHY_ANALOG_SYNTH4_RESET_PRESC_SET(x)
(((x) << 10) & 0x00000400) |
| 1294 #define PHY_ANALOG_SYNTH4_PRESCSEL_MSB
12 |
| 1295 #define PHY_ANALOG_SYNTH4_PRESCSEL_LSB
11 |
| 1296 #define PHY_ANALOG_SYNTH4_PRESCSEL_MASK
0x00001800 |
| 1297 #define PHY_ANALOG_SYNTH4_PRESCSEL_GET(x)
(((x) & 0x00001800) >> 11) |
| 1298 #define PHY_ANALOG_SYNTH4_PRESCSEL_SET(x)
(((x) << 11) & 0x00001800) |
| 1299 #define PHY_ANALOG_SYNTH4_PFD_DISABLE_MSB
13 |
| 1300 #define PHY_ANALOG_SYNTH4_PFD_DISABLE_LSB
13 |
| 1301 #define PHY_ANALOG_SYNTH4_PFD_DISABLE_MASK
0x00002000 |
| 1302 #define PHY_ANALOG_SYNTH4_PFD_DISABLE_GET(x)
(((x) & 0x00002000) >> 13) |
| 1303 #define PHY_ANALOG_SYNTH4_PFD_DISABLE_SET(x)
(((x) << 13) & 0x00002000) |
| 1304 #define PHY_ANALOG_SYNTH4_PFDDELAY_FRACN_MSB
14 |
| 1305 #define PHY_ANALOG_SYNTH4_PFDDELAY_FRACN_LSB
14 |
| 1306 #define PHY_ANALOG_SYNTH4_PFDDELAY_FRACN_MASK
0x00004000 |
| 1307 #define PHY_ANALOG_SYNTH4_PFDDELAY_FRACN_GET(x)
(((x) & 0x00004000) >> 14) |
| 1308 #define PHY_ANALOG_SYNTH4_PFDDELAY_FRACN_SET(x)
(((x) << 14) & 0x00004000) |
| 1309 #define PHY_ANALOG_SYNTH4_FORCE_LO_ON_MSB
15 |
| 1310 #define PHY_ANALOG_SYNTH4_FORCE_LO_ON_LSB
15 |
| 1311 #define PHY_ANALOG_SYNTH4_FORCE_LO_ON_MASK
0x00008000 |
| 1312 #define PHY_ANALOG_SYNTH4_FORCE_LO_ON_GET(x)
(((x) & 0x00008000) >> 15) |
| 1313 #define PHY_ANALOG_SYNTH4_FORCE_LO_ON_SET(x)
(((x) << 15) & 0x00008000) |
| 1314 #define PHY_ANALOG_SYNTH4_CLKXTAL_EDGE_SEL_MSB
16 |
| 1315 #define PHY_ANALOG_SYNTH4_CLKXTAL_EDGE_SEL_LSB
16 |
| 1316 #define PHY_ANALOG_SYNTH4_CLKXTAL_EDGE_SEL_MASK
0x00010000 |
| 1317 #define PHY_ANALOG_SYNTH4_CLKXTAL_EDGE_SEL_GET(x)
(((x) & 0x00010000) >> 16) |
| 1318 #define PHY_ANALOG_SYNTH4_CLKXTAL_EDGE_SEL_SET(x)
(((x) << 16) & 0x00010000) |
| 1319 #define PHY_ANALOG_SYNTH4_VCOCAPPULLUP_MSB
17 |
| 1320 #define PHY_ANALOG_SYNTH4_VCOCAPPULLUP_LSB
17 |
| 1321 #define PHY_ANALOG_SYNTH4_VCOCAPPULLUP_MASK
0x00020000 |
| 1322 #define PHY_ANALOG_SYNTH4_VCOCAPPULLUP_GET(x)
(((x) & 0x00020000) >> 17) |
| 1323 #define PHY_ANALOG_SYNTH4_VCOCAPPULLUP_SET(x)
(((x) << 17) & 0x00020000) |
| 1324 #define PHY_ANALOG_SYNTH4_VCOCAP_OVR_MSB
25 |
| 1325 #define PHY_ANALOG_SYNTH4_VCOCAP_OVR_LSB
18 |
| 1326 #define PHY_ANALOG_SYNTH4_VCOCAP_OVR_MASK
0x03fc0000 |
| 1327 #define PHY_ANALOG_SYNTH4_VCOCAP_OVR_GET(x)
(((x) & 0x03fc0000) >> 18) |
| 1328 #define PHY_ANALOG_SYNTH4_VCOCAP_OVR_SET(x)
(((x) << 18) & 0x03fc0000) |
| 1329 #define PHY_ANALOG_SYNTH4_FORCE_VCOCAP_MSB
26 |
| 1330 #define PHY_ANALOG_SYNTH4_FORCE_VCOCAP_LSB
26 |
| 1331 #define PHY_ANALOG_SYNTH4_FORCE_VCOCAP_MASK
0x04000000 |
| 1332 #define PHY_ANALOG_SYNTH4_FORCE_VCOCAP_GET(x)
(((x) & 0x04000000) >> 26) |
| 1333 #define PHY_ANALOG_SYNTH4_FORCE_VCOCAP_SET(x)
(((x) << 26) & 0x04000000) |
| 1334 #define PHY_ANALOG_SYNTH4_FORCE_PINVC_MSB
27 |
| 1335 #define PHY_ANALOG_SYNTH4_FORCE_PINVC_LSB
27 |
| 1336 #define PHY_ANALOG_SYNTH4_FORCE_PINVC_MASK
0x08000000 |
| 1337 #define PHY_ANALOG_SYNTH4_FORCE_PINVC_GET(x)
(((x) & 0x08000000) >> 27) |
| 1338 #define PHY_ANALOG_SYNTH4_FORCE_PINVC_SET(x)
(((x) << 27) & 0x08000000) |
| 1339 #define PHY_ANALOG_SYNTH4_SHORTR_UNTIL_LOCKED_MSB
28 |
| 1340 #define PHY_ANALOG_SYNTH4_SHORTR_UNTIL_LOCKED_LSB
28 |
| 1341 #define PHY_ANALOG_SYNTH4_SHORTR_UNTIL_LOCKED_MASK
0x10000000 |
| 1342 #define PHY_ANALOG_SYNTH4_SHORTR_UNTIL_LOCKED_GET(x)
(((x) & 0x10000000) >> 28) |
| 1343 #define PHY_ANALOG_SYNTH4_SHORTR_UNTIL_LOCKED_SET(x)
(((x) << 28) & 0x10000000) |
| 1344 #define PHY_ANALOG_SYNTH4_ALWAYS_SHORTR_MSB
29 |
| 1345 #define PHY_ANALOG_SYNTH4_ALWAYS_SHORTR_LSB
29 |
| 1346 #define PHY_ANALOG_SYNTH4_ALWAYS_SHORTR_MASK
0x20000000 |
| 1347 #define PHY_ANALOG_SYNTH4_ALWAYS_SHORTR_GET(x)
(((x) & 0x20000000) >> 29) |
| 1348 #define PHY_ANALOG_SYNTH4_ALWAYS_SHORTR_SET(x)
(((x) << 29) & 0x20000000) |
| 1349 #define PHY_ANALOG_SYNTH4_DIS_LOSTVC_MSB
30 |
| 1350 #define PHY_ANALOG_SYNTH4_DIS_LOSTVC_LSB
30 |
| 1351 #define PHY_ANALOG_SYNTH4_DIS_LOSTVC_MASK
0x40000000 |
| 1352 #define PHY_ANALOG_SYNTH4_DIS_LOSTVC_GET(x)
(((x) & 0x40000000) >> 30) |
| 1353 #define PHY_ANALOG_SYNTH4_DIS_LOSTVC_SET(x)
(((x) << 30) & 0x40000000) |
| 1354 #define PHY_ANALOG_SYNTH4_DIS_LIN_CAPSEARCH_MSB
31 |
| 1355 #define PHY_ANALOG_SYNTH4_DIS_LIN_CAPSEARCH_LSB
31 |
| 1356 #define PHY_ANALOG_SYNTH4_DIS_LIN_CAPSEARCH_MASK
0x80000000 |
| 1357 #define PHY_ANALOG_SYNTH4_DIS_LIN_CAPSEARCH_GET(x)
(((x) & 0x80000000) >> 31) |
| 1358 #define PHY_ANALOG_SYNTH4_DIS_LIN_CAPSEARCH_SET(x)
(((x) << 31) & 0x80000000) |
| 1359 |
| 1360 /* macros for SYNTH5 */ |
| 1361 #define PHY_ANALOG_SYNTH5_ADDRESS
0x00000090 |
| 1362 #define PHY_ANALOG_SYNTH5_OFFSET
0x00000090 |
| 1363 #define PHY_ANALOG_SYNTH5_VCOBIAS_MSB
1 |
| 1364 #define PHY_ANALOG_SYNTH5_VCOBIAS_LSB
0 |
| 1365 #define PHY_ANALOG_SYNTH5_VCOBIAS_MASK
0x00000003 |
| 1366 #define PHY_ANALOG_SYNTH5_VCOBIAS_GET(x)
(((x) & 0x00000003) >> 0) |
| 1367 #define PHY_ANALOG_SYNTH5_VCOBIAS_SET(x)
(((x) << 0) & 0x00000003) |
| 1368 #define PHY_ANALOG_SYNTH5_PWDB_ICLOBUF5G50_MSB
4 |
| 1369 #define PHY_ANALOG_SYNTH5_PWDB_ICLOBUF5G50_LSB
2 |
| 1370 #define PHY_ANALOG_SYNTH5_PWDB_ICLOBUF5G50_MASK
0x0000001c |
| 1371 #define PHY_ANALOG_SYNTH5_PWDB_ICLOBUF5G50_GET(x)
(((x) & 0x0000001c) >> 2) |
| 1372 #define PHY_ANALOG_SYNTH5_PWDB_ICLOBUF5G50_SET(x)
(((x) << 2) & 0x0000001c) |
| 1373 #define PHY_ANALOG_SYNTH5_PWDB_ICLOBUF2G50_MSB
7 |
| 1374 #define PHY_ANALOG_SYNTH5_PWDB_ICLOBUF2G50_LSB
5 |
| 1375 #define PHY_ANALOG_SYNTH5_PWDB_ICLOBUF2G50_MASK
0x000000e0 |
| 1376 #define PHY_ANALOG_SYNTH5_PWDB_ICLOBUF2G50_GET(x)
(((x) & 0x000000e0) >> 5) |
| 1377 #define PHY_ANALOG_SYNTH5_PWDB_ICLOBUF2G50_SET(x)
(((x) << 5) & 0x000000e0) |
| 1378 #define PHY_ANALOG_SYNTH5_PWDB_ICVCO25_MSB
10 |
| 1379 #define PHY_ANALOG_SYNTH5_PWDB_ICVCO25_LSB
8 |
| 1380 #define PHY_ANALOG_SYNTH5_PWDB_ICVCO25_MASK
0x00000700 |
| 1381 #define PHY_ANALOG_SYNTH5_PWDB_ICVCO25_GET(x)
(((x) & 0x00000700) >> 8) |
| 1382 #define PHY_ANALOG_SYNTH5_PWDB_ICVCO25_SET(x)
(((x) << 8) & 0x00000700) |
| 1383 #define PHY_ANALOG_SYNTH5_PWDB_ICVCOREG25_MSB
13 |
| 1384 #define PHY_ANALOG_SYNTH5_PWDB_ICVCOREG25_LSB
11 |
| 1385 #define PHY_ANALOG_SYNTH5_PWDB_ICVCOREG25_MASK
0x00003800 |
| 1386 #define PHY_ANALOG_SYNTH5_PWDB_ICVCOREG25_GET(x)
(((x) & 0x00003800) >> 11) |
| 1387 #define PHY_ANALOG_SYNTH5_PWDB_ICVCOREG25_SET(x)
(((x) << 11) & 0x00003800) |
| 1388 #define PHY_ANALOG_SYNTH5_PWDB_IRVCOREG50_MSB
14 |
| 1389 #define PHY_ANALOG_SYNTH5_PWDB_IRVCOREG50_LSB
14 |
| 1390 #define PHY_ANALOG_SYNTH5_PWDB_IRVCOREG50_MASK
0x00004000 |
| 1391 #define PHY_ANALOG_SYNTH5_PWDB_IRVCOREG50_GET(x)
(((x) & 0x00004000) >> 14) |
| 1392 #define PHY_ANALOG_SYNTH5_PWDB_IRVCOREG50_SET(x)
(((x) << 14) & 0x00004000) |
| 1393 #define PHY_ANALOG_SYNTH5_PWDB_ICLOMIX_MSB
17 |
| 1394 #define PHY_ANALOG_SYNTH5_PWDB_ICLOMIX_LSB
15 |
| 1395 #define PHY_ANALOG_SYNTH5_PWDB_ICLOMIX_MASK
0x00038000 |
| 1396 #define PHY_ANALOG_SYNTH5_PWDB_ICLOMIX_GET(x)
(((x) & 0x00038000) >> 15) |
| 1397 #define PHY_ANALOG_SYNTH5_PWDB_ICLOMIX_SET(x)
(((x) << 15) & 0x00038000) |
| 1398 #define PHY_ANALOG_SYNTH5_PWDB_ICLODIV50_MSB
20 |
| 1399 #define PHY_ANALOG_SYNTH5_PWDB_ICLODIV50_LSB
18 |
| 1400 #define PHY_ANALOG_SYNTH5_PWDB_ICLODIV50_MASK
0x001c0000 |
| 1401 #define PHY_ANALOG_SYNTH5_PWDB_ICLODIV50_GET(x)
(((x) & 0x001c0000) >> 18) |
| 1402 #define PHY_ANALOG_SYNTH5_PWDB_ICLODIV50_SET(x)
(((x) << 18) & 0x001c0000) |
| 1403 #define PHY_ANALOG_SYNTH5_PWDB_ICPRESC50_MSB
23 |
| 1404 #define PHY_ANALOG_SYNTH5_PWDB_ICPRESC50_LSB
21 |
| 1405 #define PHY_ANALOG_SYNTH5_PWDB_ICPRESC50_MASK
0x00e00000 |
| 1406 #define PHY_ANALOG_SYNTH5_PWDB_ICPRESC50_GET(x)
(((x) & 0x00e00000) >> 21) |
| 1407 #define PHY_ANALOG_SYNTH5_PWDB_ICPRESC50_SET(x)
(((x) << 21) & 0x00e00000) |
| 1408 #define PHY_ANALOG_SYNTH5_PWDB_IRVCMON25_MSB
26 |
| 1409 #define PHY_ANALOG_SYNTH5_PWDB_IRVCMON25_LSB
24 |
| 1410 #define PHY_ANALOG_SYNTH5_PWDB_IRVCMON25_MASK
0x07000000 |
| 1411 #define PHY_ANALOG_SYNTH5_PWDB_IRVCMON25_GET(x)
(((x) & 0x07000000) >> 24) |
| 1412 #define PHY_ANALOG_SYNTH5_PWDB_IRVCMON25_SET(x)
(((x) << 24) & 0x07000000) |
| 1413 #define PHY_ANALOG_SYNTH5_PWDB_IRPFDCP_MSB
29 |
| 1414 #define PHY_ANALOG_SYNTH5_PWDB_IRPFDCP_LSB
27 |
| 1415 #define PHY_ANALOG_SYNTH5_PWDB_IRPFDCP_MASK
0x38000000 |
| 1416 #define PHY_ANALOG_SYNTH5_PWDB_IRPFDCP_GET(x)
(((x) & 0x38000000) >> 27) |
| 1417 #define PHY_ANALOG_SYNTH5_PWDB_IRPFDCP_SET(x)
(((x) << 27) & 0x38000000) |
| 1418 #define PHY_ANALOG_SYNTH5_SDM_DITHER2_MSB
31 |
| 1419 #define PHY_ANALOG_SYNTH5_SDM_DITHER2_LSB
30 |
| 1420 #define PHY_ANALOG_SYNTH5_SDM_DITHER2_MASK
0xc0000000 |
| 1421 #define PHY_ANALOG_SYNTH5_SDM_DITHER2_GET(x)
(((x) & 0xc0000000) >> 30) |
| 1422 #define PHY_ANALOG_SYNTH5_SDM_DITHER2_SET(x)
(((x) << 30) & 0xc0000000) |
| 1423 |
| 1424 /* macros for SYNTH6 */ |
| 1425 #define PHY_ANALOG_SYNTH6_ADDRESS
0x00000094 |
| 1426 #define PHY_ANALOG_SYNTH6_OFFSET
0x00000094 |
| 1427 #define PHY_ANALOG_SYNTH6_LOBUF5GTUNE_MSB
1 |
| 1428 #define PHY_ANALOG_SYNTH6_LOBUF5GTUNE_LSB
0 |
| 1429 #define PHY_ANALOG_SYNTH6_LOBUF5GTUNE_MASK
0x00000003 |
| 1430 #define PHY_ANALOG_SYNTH6_LOBUF5GTUNE_GET(x)
(((x) & 0x00000003) >> 0) |
| 1431 #define PHY_ANALOG_SYNTH6_LOOP_IP_MSB
8 |
| 1432 #define PHY_ANALOG_SYNTH6_LOOP_IP_LSB
2 |
| 1433 #define PHY_ANALOG_SYNTH6_LOOP_IP_MASK
0x000001fc |
| 1434 #define PHY_ANALOG_SYNTH6_LOOP_IP_GET(x)
(((x) & 0x000001fc) >> 2) |
| 1435 #define PHY_ANALOG_SYNTH6_VC2LOW_MSB
9 |
| 1436 #define PHY_ANALOG_SYNTH6_VC2LOW_LSB
9 |
| 1437 #define PHY_ANALOG_SYNTH6_VC2LOW_MASK
0x00000200 |
| 1438 #define PHY_ANALOG_SYNTH6_VC2LOW_GET(x)
(((x) & 0x00000200) >> 9) |
| 1439 #define PHY_ANALOG_SYNTH6_VC2HIGH_MSB
10 |
| 1440 #define PHY_ANALOG_SYNTH6_VC2HIGH_LSB
10 |
| 1441 #define PHY_ANALOG_SYNTH6_VC2HIGH_MASK
0x00000400 |
| 1442 #define PHY_ANALOG_SYNTH6_VC2HIGH_GET(x)
(((x) & 0x00000400) >> 10) |
| 1443 #define PHY_ANALOG_SYNTH6_RESET_SDM_B_MSB
11 |
| 1444 #define PHY_ANALOG_SYNTH6_RESET_SDM_B_LSB
11 |
| 1445 #define PHY_ANALOG_SYNTH6_RESET_SDM_B_MASK
0x00000800 |
| 1446 #define PHY_ANALOG_SYNTH6_RESET_SDM_B_GET(x)
(((x) & 0x00000800) >> 11) |
| 1447 #define PHY_ANALOG_SYNTH6_RESET_PSCOUNTERS_MSB
12 |
| 1448 #define PHY_ANALOG_SYNTH6_RESET_PSCOUNTERS_LSB
12 |
| 1449 #define PHY_ANALOG_SYNTH6_RESET_PSCOUNTERS_MASK
0x00001000 |
| 1450 #define PHY_ANALOG_SYNTH6_RESET_PSCOUNTERS_GET(x)
(((x) & 0x00001000) >> 12) |
| 1451 #define PHY_ANALOG_SYNTH6_RESET_PFD_MSB
13 |
| 1452 #define PHY_ANALOG_SYNTH6_RESET_PFD_LSB
13 |
| 1453 #define PHY_ANALOG_SYNTH6_RESET_PFD_MASK
0x00002000 |
| 1454 #define PHY_ANALOG_SYNTH6_RESET_PFD_GET(x)
(((x) & 0x00002000) >> 13) |
| 1455 #define PHY_ANALOG_SYNTH6_RESET_RFD_MSB
14 |
| 1456 #define PHY_ANALOG_SYNTH6_RESET_RFD_LSB
14 |
| 1457 #define PHY_ANALOG_SYNTH6_RESET_RFD_MASK
0x00004000 |
| 1458 #define PHY_ANALOG_SYNTH6_RESET_RFD_GET(x)
(((x) & 0x00004000) >> 14) |
| 1459 #define PHY_ANALOG_SYNTH6_SHORT_R_MSB
15 |
| 1460 #define PHY_ANALOG_SYNTH6_SHORT_R_LSB
15 |
| 1461 #define PHY_ANALOG_SYNTH6_SHORT_R_MASK
0x00008000 |
| 1462 #define PHY_ANALOG_SYNTH6_SHORT_R_GET(x)
(((x) & 0x00008000) >> 15) |
| 1463 #define PHY_ANALOG_SYNTH6_VCO_CAP_ST_MSB
23 |
| 1464 #define PHY_ANALOG_SYNTH6_VCO_CAP_ST_LSB
16 |
| 1465 #define PHY_ANALOG_SYNTH6_VCO_CAP_ST_MASK
0x00ff0000 |
| 1466 #define PHY_ANALOG_SYNTH6_VCO_CAP_ST_GET(x)
(((x) & 0x00ff0000) >> 16) |
| 1467 #define PHY_ANALOG_SYNTH6_PIN_VC_MSB
24 |
| 1468 #define PHY_ANALOG_SYNTH6_PIN_VC_LSB
24 |
| 1469 #define PHY_ANALOG_SYNTH6_PIN_VC_MASK
0x01000000 |
| 1470 #define PHY_ANALOG_SYNTH6_PIN_VC_GET(x)
(((x) & 0x01000000) >> 24) |
| 1471 #define PHY_ANALOG_SYNTH6_SYNTH_LOCK_VC_OK_MSB
25 |
| 1472 #define PHY_ANALOG_SYNTH6_SYNTH_LOCK_VC_OK_LSB
25 |
| 1473 #define PHY_ANALOG_SYNTH6_SYNTH_LOCK_VC_OK_MASK
0x02000000 |
| 1474 #define PHY_ANALOG_SYNTH6_SYNTH_LOCK_VC_OK_GET(x)
(((x) & 0x02000000) >> 25) |
| 1475 #define PHY_ANALOG_SYNTH6_CAP_SEARCH_MSB
26 |
| 1476 #define PHY_ANALOG_SYNTH6_CAP_SEARCH_LSB
26 |
| 1477 #define PHY_ANALOG_SYNTH6_CAP_SEARCH_MASK
0x04000000 |
| 1478 #define PHY_ANALOG_SYNTH6_CAP_SEARCH_GET(x)
(((x) & 0x04000000) >> 26) |
| 1479 #define PHY_ANALOG_SYNTH6_SYNTH_SM_STATE_MSB
30 |
| 1480 #define PHY_ANALOG_SYNTH6_SYNTH_SM_STATE_LSB
27 |
| 1481 #define PHY_ANALOG_SYNTH6_SYNTH_SM_STATE_MASK
0x78000000 |
| 1482 #define PHY_ANALOG_SYNTH6_SYNTH_SM_STATE_GET(x)
(((x) & 0x78000000) >> 27) |
| 1483 #define PHY_ANALOG_SYNTH6_SYNTH_ON_MSB
31 |
| 1484 #define PHY_ANALOG_SYNTH6_SYNTH_ON_LSB
31 |
| 1485 #define PHY_ANALOG_SYNTH6_SYNTH_ON_MASK
0x80000000 |
| 1486 #define PHY_ANALOG_SYNTH6_SYNTH_ON_GET(x)
(((x) & 0x80000000) >> 31) |
| 1487 |
| 1488 /* macros for SYNTH7 */ |
| 1489 #define PHY_ANALOG_SYNTH7_ADDRESS
0x00000098 |
| 1490 #define PHY_ANALOG_SYNTH7_OFFSET
0x00000098 |
| 1491 #define PHY_ANALOG_SYNTH7_OVRCHANDECODER_MSB
0 |
| 1492 #define PHY_ANALOG_SYNTH7_OVRCHANDECODER_LSB
0 |
| 1493 #define PHY_ANALOG_SYNTH7_OVRCHANDECODER_MASK
0x00000001 |
| 1494 #define PHY_ANALOG_SYNTH7_OVRCHANDECODER_GET(x)
(((x) & 0x00000001) >> 0) |
| 1495 #define PHY_ANALOG_SYNTH7_OVRCHANDECODER_SET(x)
(((x) << 0) & 0x00000001) |
| 1496 #define PHY_ANALOG_SYNTH7_FORCE_FRACLSB_MSB
1 |
| 1497 #define PHY_ANALOG_SYNTH7_FORCE_FRACLSB_LSB
1 |
| 1498 #define PHY_ANALOG_SYNTH7_FORCE_FRACLSB_MASK
0x00000002 |
| 1499 #define PHY_ANALOG_SYNTH7_FORCE_FRACLSB_GET(x)
(((x) & 0x00000002) >> 1) |
| 1500 #define PHY_ANALOG_SYNTH7_FORCE_FRACLSB_SET(x)
(((x) << 1) & 0x00000002) |
| 1501 #define PHY_ANALOG_SYNTH7_CHANFRAC_MSB
18 |
| 1502 #define PHY_ANALOG_SYNTH7_CHANFRAC_LSB
2 |
| 1503 #define PHY_ANALOG_SYNTH7_CHANFRAC_MASK
0x0007fffc |
| 1504 #define PHY_ANALOG_SYNTH7_CHANFRAC_GET(x)
(((x) & 0x0007fffc) >> 2) |
| 1505 #define PHY_ANALOG_SYNTH7_CHANFRAC_SET(x)
(((x) << 2) & 0x0007fffc) |
| 1506 #define PHY_ANALOG_SYNTH7_CHANSEL_MSB
27 |
| 1507 #define PHY_ANALOG_SYNTH7_CHANSEL_LSB
19 |
| 1508 #define PHY_ANALOG_SYNTH7_CHANSEL_MASK
0x0ff80000 |
| 1509 #define PHY_ANALOG_SYNTH7_CHANSEL_GET(x)
(((x) & 0x0ff80000) >> 19) |
| 1510 #define PHY_ANALOG_SYNTH7_CHANSEL_SET(x)
(((x) << 19) & 0x0ff80000) |
| 1511 #define PHY_ANALOG_SYNTH7_AMODEREFSEL_MSB
29 |
| 1512 #define PHY_ANALOG_SYNTH7_AMODEREFSEL_LSB
28 |
| 1513 #define PHY_ANALOG_SYNTH7_AMODEREFSEL_MASK
0x30000000 |
| 1514 #define PHY_ANALOG_SYNTH7_AMODEREFSEL_GET(x)
(((x) & 0x30000000) >> 28) |
| 1515 #define PHY_ANALOG_SYNTH7_AMODEREFSEL_SET(x)
(((x) << 28) & 0x30000000) |
| 1516 #define PHY_ANALOG_SYNTH7_FRACMODE_MSB
30 |
| 1517 #define PHY_ANALOG_SYNTH7_FRACMODE_LSB
30 |
| 1518 #define PHY_ANALOG_SYNTH7_FRACMODE_MASK
0x40000000 |
| 1519 #define PHY_ANALOG_SYNTH7_FRACMODE_GET(x)
(((x) & 0x40000000) >> 30) |
| 1520 #define PHY_ANALOG_SYNTH7_FRACMODE_SET(x)
(((x) << 30) & 0x40000000) |
| 1521 #define PHY_ANALOG_SYNTH7_LOADSYNTHCHANNEL_MSB
31 |
| 1522 #define PHY_ANALOG_SYNTH7_LOADSYNTHCHANNEL_LSB
31 |
| 1523 #define PHY_ANALOG_SYNTH7_LOADSYNTHCHANNEL_MASK
0x80000000 |
| 1524 #define PHY_ANALOG_SYNTH7_LOADSYNTHCHANNEL_GET(x)
(((x) & 0x80000000) >> 31) |
| 1525 #define PHY_ANALOG_SYNTH7_LOADSYNTHCHANNEL_SET(x)
(((x) << 31) & 0x80000000) |
| 1526 |
| 1527 /* macros for SYNTH8 */ |
| 1528 #define PHY_ANALOG_SYNTH8_ADDRESS
0x0000009c |
| 1529 #define PHY_ANALOG_SYNTH8_OFFSET
0x0000009c |
| 1530 #define PHY_ANALOG_SYNTH8_CPSTEERING_EN_FRACN_MSB
0 |
| 1531 #define PHY_ANALOG_SYNTH8_CPSTEERING_EN_FRACN_LSB
0 |
| 1532 #define PHY_ANALOG_SYNTH8_CPSTEERING_EN_FRACN_MASK
0x00000001 |
| 1533 #define PHY_ANALOG_SYNTH8_CPSTEERING_EN_FRACN_GET(x)
(((x) & 0x00000001) >> 0) |
| 1534 #define PHY_ANALOG_SYNTH8_CPSTEERING_EN_FRACN_SET(x)
(((x) << 0) & 0x00000001) |
| 1535 #define PHY_ANALOG_SYNTH8_LOOP_ICPB_MSB
7 |
| 1536 #define PHY_ANALOG_SYNTH8_LOOP_ICPB_LSB
1 |
| 1537 #define PHY_ANALOG_SYNTH8_LOOP_ICPB_MASK
0x000000fe |
| 1538 #define PHY_ANALOG_SYNTH8_LOOP_ICPB_GET(x)
(((x) & 0x000000fe) >> 1) |
| 1539 #define PHY_ANALOG_SYNTH8_LOOP_ICPB_SET(x)
(((x) << 1) & 0x000000fe) |
| 1540 #define PHY_ANALOG_SYNTH8_LOOP_CSB_MSB
11 |
| 1541 #define PHY_ANALOG_SYNTH8_LOOP_CSB_LSB
8 |
| 1542 #define PHY_ANALOG_SYNTH8_LOOP_CSB_MASK
0x00000f00 |
| 1543 #define PHY_ANALOG_SYNTH8_LOOP_CSB_GET(x)
(((x) & 0x00000f00) >> 8) |
| 1544 #define PHY_ANALOG_SYNTH8_LOOP_CSB_SET(x)
(((x) << 8) & 0x00000f00) |
| 1545 #define PHY_ANALOG_SYNTH8_LOOP_RSB_MSB
16 |
| 1546 #define PHY_ANALOG_SYNTH8_LOOP_RSB_LSB
12 |
| 1547 #define PHY_ANALOG_SYNTH8_LOOP_RSB_MASK
0x0001f000 |
| 1548 #define PHY_ANALOG_SYNTH8_LOOP_RSB_GET(x)
(((x) & 0x0001f000) >> 12) |
| 1549 #define PHY_ANALOG_SYNTH8_LOOP_RSB_SET(x)
(((x) << 12) & 0x0001f000) |
| 1550 #define PHY_ANALOG_SYNTH8_LOOP_CPB_MSB
21 |
| 1551 #define PHY_ANALOG_SYNTH8_LOOP_CPB_LSB
17 |
| 1552 #define PHY_ANALOG_SYNTH8_LOOP_CPB_MASK
0x003e0000 |
| 1553 #define PHY_ANALOG_SYNTH8_LOOP_CPB_GET(x)
(((x) & 0x003e0000) >> 17) |
| 1554 #define PHY_ANALOG_SYNTH8_LOOP_CPB_SET(x)
(((x) << 17) & 0x003e0000) |
| 1555 #define PHY_ANALOG_SYNTH8_LOOP_3RD_ORDER_RB_MSB
26 |
| 1556 #define PHY_ANALOG_SYNTH8_LOOP_3RD_ORDER_RB_LSB
22 |
| 1557 #define PHY_ANALOG_SYNTH8_LOOP_3RD_ORDER_RB_MASK
0x07c00000 |
| 1558 #define PHY_ANALOG_SYNTH8_LOOP_3RD_ORDER_RB_GET(x)
(((x) & 0x07c00000) >> 22) |
| 1559 #define PHY_ANALOG_SYNTH8_LOOP_3RD_ORDER_RB_SET(x)
(((x) << 22) & 0x07c00000) |
| 1560 #define PHY_ANALOG_SYNTH8_REFDIVB_MSB
31 |
| 1561 #define PHY_ANALOG_SYNTH8_REFDIVB_LSB
27 |
| 1562 #define PHY_ANALOG_SYNTH8_REFDIVB_MASK
0xf8000000 |
| 1563 #define PHY_ANALOG_SYNTH8_REFDIVB_GET(x)
(((x) & 0xf8000000) >> 27) |
| 1564 #define PHY_ANALOG_SYNTH8_REFDIVB_SET(x)
(((x) << 27) & 0xf8000000) |
| 1565 |
| 1566 /* macros for SYNTH9 */ |
| 1567 #define PHY_ANALOG_SYNTH9_ADDRESS
0x000000a0 |
| 1568 #define PHY_ANALOG_SYNTH9_OFFSET
0x000000a0 |
| 1569 #define PHY_ANALOG_SYNTH9_PFDDELAY_INTN_MSB
0 |
| 1570 #define PHY_ANALOG_SYNTH9_PFDDELAY_INTN_LSB
0 |
| 1571 #define PHY_ANALOG_SYNTH9_PFDDELAY_INTN_MASK
0x00000001 |
| 1572 #define PHY_ANALOG_SYNTH9_PFDDELAY_INTN_GET(x)
(((x) & 0x00000001) >> 0) |
| 1573 #define PHY_ANALOG_SYNTH9_PFDDELAY_INTN_SET(x)
(((x) << 0) & 0x00000001) |
| 1574 #define PHY_ANALOG_SYNTH9_SLOPE_ICPA0_MSB
3 |
| 1575 #define PHY_ANALOG_SYNTH9_SLOPE_ICPA0_LSB
1 |
| 1576 #define PHY_ANALOG_SYNTH9_SLOPE_ICPA0_MASK
0x0000000e |
| 1577 #define PHY_ANALOG_SYNTH9_SLOPE_ICPA0_GET(x)
(((x) & 0x0000000e) >> 1) |
| 1578 #define PHY_ANALOG_SYNTH9_SLOPE_ICPA0_SET(x)
(((x) << 1) & 0x0000000e) |
| 1579 #define PHY_ANALOG_SYNTH9_LOOP_ICPA0_MSB
7 |
| 1580 #define PHY_ANALOG_SYNTH9_LOOP_ICPA0_LSB
4 |
| 1581 #define PHY_ANALOG_SYNTH9_LOOP_ICPA0_MASK
0x000000f0 |
| 1582 #define PHY_ANALOG_SYNTH9_LOOP_ICPA0_GET(x)
(((x) & 0x000000f0) >> 4) |
| 1583 #define PHY_ANALOG_SYNTH9_LOOP_ICPA0_SET(x)
(((x) << 4) & 0x000000f0) |
| 1584 #define PHY_ANALOG_SYNTH9_LOOP_CSA0_MSB
11 |
| 1585 #define PHY_ANALOG_SYNTH9_LOOP_CSA0_LSB
8 |
| 1586 #define PHY_ANALOG_SYNTH9_LOOP_CSA0_MASK
0x00000f00 |
| 1587 #define PHY_ANALOG_SYNTH9_LOOP_CSA0_GET(x)
(((x) & 0x00000f00) >> 8) |
| 1588 #define PHY_ANALOG_SYNTH9_LOOP_CSA0_SET(x)
(((x) << 8) & 0x00000f00) |
| 1589 #define PHY_ANALOG_SYNTH9_LOOP_RSA0_MSB
16 |
| 1590 #define PHY_ANALOG_SYNTH9_LOOP_RSA0_LSB
12 |
| 1591 #define PHY_ANALOG_SYNTH9_LOOP_RSA0_MASK
0x0001f000 |
| 1592 #define PHY_ANALOG_SYNTH9_LOOP_RSA0_GET(x)
(((x) & 0x0001f000) >> 12) |
| 1593 #define PHY_ANALOG_SYNTH9_LOOP_RSA0_SET(x)
(((x) << 12) & 0x0001f000) |
| 1594 #define PHY_ANALOG_SYNTH9_LOOP_CPA0_MSB
21 |
| 1595 #define PHY_ANALOG_SYNTH9_LOOP_CPA0_LSB
17 |
| 1596 #define PHY_ANALOG_SYNTH9_LOOP_CPA0_MASK
0x003e0000 |
| 1597 #define PHY_ANALOG_SYNTH9_LOOP_CPA0_GET(x)
(((x) & 0x003e0000) >> 17) |
| 1598 #define PHY_ANALOG_SYNTH9_LOOP_CPA0_SET(x)
(((x) << 17) & 0x003e0000) |
| 1599 #define PHY_ANALOG_SYNTH9_LOOP_3RD_ORDER_RA_MSB
26 |
| 1600 #define PHY_ANALOG_SYNTH9_LOOP_3RD_ORDER_RA_LSB
22 |
| 1601 #define PHY_ANALOG_SYNTH9_LOOP_3RD_ORDER_RA_MASK
0x07c00000 |
| 1602 #define PHY_ANALOG_SYNTH9_LOOP_3RD_ORDER_RA_GET(x)
(((x) & 0x07c00000) >> 22) |
| 1603 #define PHY_ANALOG_SYNTH9_LOOP_3RD_ORDER_RA_SET(x)
(((x) << 22) & 0x07c00000) |
| 1604 #define PHY_ANALOG_SYNTH9_REFDIVA_MSB
31 |
| 1605 #define PHY_ANALOG_SYNTH9_REFDIVA_LSB
27 |
| 1606 #define PHY_ANALOG_SYNTH9_REFDIVA_MASK
0xf8000000 |
| 1607 #define PHY_ANALOG_SYNTH9_REFDIVA_GET(x)
(((x) & 0xf8000000) >> 27) |
| 1608 #define PHY_ANALOG_SYNTH9_REFDIVA_SET(x)
(((x) << 27) & 0xf8000000) |
| 1609 |
| 1610 /* macros for SYNTH10 */ |
| 1611 #define PHY_ANALOG_SYNTH10_ADDRESS
0x000000a4 |
| 1612 #define PHY_ANALOG_SYNTH10_OFFSET
0x000000a4 |
| 1613 #define PHY_ANALOG_SYNTH10_SPARE10A_MSB
1 |
| 1614 #define PHY_ANALOG_SYNTH10_SPARE10A_LSB
0 |
| 1615 #define PHY_ANALOG_SYNTH10_SPARE10A_MASK
0x00000003 |
| 1616 #define PHY_ANALOG_SYNTH10_SPARE10A_GET(x)
(((x) & 0x00000003) >> 0) |
| 1617 #define PHY_ANALOG_SYNTH10_SPARE10A_SET(x)
(((x) << 0) & 0x00000003) |
| 1618 #define PHY_ANALOG_SYNTH10_PWDB_ICLOBIAS50_MSB
4 |
| 1619 #define PHY_ANALOG_SYNTH10_PWDB_ICLOBIAS50_LSB
2 |
| 1620 #define PHY_ANALOG_SYNTH10_PWDB_ICLOBIAS50_MASK
0x0000001c |
| 1621 #define PHY_ANALOG_SYNTH10_PWDB_ICLOBIAS50_GET(x)
(((x) & 0x0000001c) >> 2) |
| 1622 #define PHY_ANALOG_SYNTH10_PWDB_ICLOBIAS50_SET(x)
(((x) << 2) & 0x0000001c) |
| 1623 #define PHY_ANALOG_SYNTH10_PWDB_IRSPARE25_MSB
7 |
| 1624 #define PHY_ANALOG_SYNTH10_PWDB_IRSPARE25_LSB
5 |
| 1625 #define PHY_ANALOG_SYNTH10_PWDB_IRSPARE25_MASK
0x000000e0 |
| 1626 #define PHY_ANALOG_SYNTH10_PWDB_IRSPARE25_GET(x)
(((x) & 0x000000e0) >> 5) |
| 1627 #define PHY_ANALOG_SYNTH10_PWDB_IRSPARE25_SET(x)
(((x) << 5) & 0x000000e0) |
| 1628 #define PHY_ANALOG_SYNTH10_PWDB_ICSPARE25_MSB
10 |
| 1629 #define PHY_ANALOG_SYNTH10_PWDB_ICSPARE25_LSB
8 |
| 1630 #define PHY_ANALOG_SYNTH10_PWDB_ICSPARE25_MASK
0x00000700 |
| 1631 #define PHY_ANALOG_SYNTH10_PWDB_ICSPARE25_GET(x)
(((x) & 0x00000700) >> 8) |
| 1632 #define PHY_ANALOG_SYNTH10_PWDB_ICSPARE25_SET(x)
(((x) << 8) & 0x00000700) |
| 1633 #define PHY_ANALOG_SYNTH10_SLOPE_ICPA1_MSB
13 |
| 1634 #define PHY_ANALOG_SYNTH10_SLOPE_ICPA1_LSB
11 |
| 1635 #define PHY_ANALOG_SYNTH10_SLOPE_ICPA1_MASK
0x00003800 |
| 1636 #define PHY_ANALOG_SYNTH10_SLOPE_ICPA1_GET(x)
(((x) & 0x00003800) >> 11) |
| 1637 #define PHY_ANALOG_SYNTH10_SLOPE_ICPA1_SET(x)
(((x) << 11) & 0x00003800) |
| 1638 #define PHY_ANALOG_SYNTH10_LOOP_ICPA1_MSB
17 |
| 1639 #define PHY_ANALOG_SYNTH10_LOOP_ICPA1_LSB
14 |
| 1640 #define PHY_ANALOG_SYNTH10_LOOP_ICPA1_MASK
0x0003c000 |
| 1641 #define PHY_ANALOG_SYNTH10_LOOP_ICPA1_GET(x)
(((x) & 0x0003c000) >> 14) |
| 1642 #define PHY_ANALOG_SYNTH10_LOOP_ICPA1_SET(x)
(((x) << 14) & 0x0003c000) |
| 1643 #define PHY_ANALOG_SYNTH10_LOOP_CSA1_MSB
21 |
| 1644 #define PHY_ANALOG_SYNTH10_LOOP_CSA1_LSB
18 |
| 1645 #define PHY_ANALOG_SYNTH10_LOOP_CSA1_MASK
0x003c0000 |
| 1646 #define PHY_ANALOG_SYNTH10_LOOP_CSA1_GET(x)
(((x) & 0x003c0000) >> 18) |
| 1647 #define PHY_ANALOG_SYNTH10_LOOP_CSA1_SET(x)
(((x) << 18) & 0x003c0000) |
| 1648 #define PHY_ANALOG_SYNTH10_LOOP_RSA1_MSB
26 |
| 1649 #define PHY_ANALOG_SYNTH10_LOOP_RSA1_LSB
22 |
| 1650 #define PHY_ANALOG_SYNTH10_LOOP_RSA1_MASK
0x07c00000 |
| 1651 #define PHY_ANALOG_SYNTH10_LOOP_RSA1_GET(x)
(((x) & 0x07c00000) >> 22) |
| 1652 #define PHY_ANALOG_SYNTH10_LOOP_RSA1_SET(x)
(((x) << 22) & 0x07c00000) |
| 1653 #define PHY_ANALOG_SYNTH10_LOOP_CPA1_MSB
31 |
| 1654 #define PHY_ANALOG_SYNTH10_LOOP_CPA1_LSB
27 |
| 1655 #define PHY_ANALOG_SYNTH10_LOOP_CPA1_MASK
0xf8000000 |
| 1656 #define PHY_ANALOG_SYNTH10_LOOP_CPA1_GET(x)
(((x) & 0xf8000000) >> 27) |
| 1657 #define PHY_ANALOG_SYNTH10_LOOP_CPA1_SET(x)
(((x) << 27) & 0xf8000000) |
| 1658 |
| 1659 /* macros for SYNTH11 */ |
| 1660 #define PHY_ANALOG_SYNTH11_ADDRESS
0x000000a8 |
| 1661 #define PHY_ANALOG_SYNTH11_OFFSET
0x000000a8 |
| 1662 #define PHY_ANALOG_SYNTH11_SPARE11A_MSB
4 |
| 1663 #define PHY_ANALOG_SYNTH11_SPARE11A_LSB
0 |
| 1664 #define PHY_ANALOG_SYNTH11_SPARE11A_MASK
0x0000001f |
| 1665 #define PHY_ANALOG_SYNTH11_SPARE11A_GET(x)
(((x) & 0x0000001f) >> 0) |
| 1666 #define PHY_ANALOG_SYNTH11_SPARE11A_SET(x)
(((x) << 0) & 0x0000001f) |
| 1667 #define PHY_ANALOG_SYNTH11_FORCE_LOBUF5G_ON_MSB
5 |
| 1668 #define PHY_ANALOG_SYNTH11_FORCE_LOBUF5G_ON_LSB
5 |
| 1669 #define PHY_ANALOG_SYNTH11_FORCE_LOBUF5G_ON_MASK
0x00000020 |
| 1670 #define PHY_ANALOG_SYNTH11_FORCE_LOBUF5G_ON_GET(x)
(((x) & 0x00000020) >> 5) |
| 1671 #define PHY_ANALOG_SYNTH11_FORCE_LOBUF5G_ON_SET(x)
(((x) << 5) & 0x00000020) |
| 1672 #define PHY_ANALOG_SYNTH11_LOREFSEL_MSB
7 |
| 1673 #define PHY_ANALOG_SYNTH11_LOREFSEL_LSB
6 |
| 1674 #define PHY_ANALOG_SYNTH11_LOREFSEL_MASK
0x000000c0 |
| 1675 #define PHY_ANALOG_SYNTH11_LOREFSEL_GET(x)
(((x) & 0x000000c0) >> 6) |
| 1676 #define PHY_ANALOG_SYNTH11_LOREFSEL_SET(x)
(((x) << 6) & 0x000000c0) |
| 1677 #define PHY_ANALOG_SYNTH11_LOBUF2GTUNE_MSB
9 |
| 1678 #define PHY_ANALOG_SYNTH11_LOBUF2GTUNE_LSB
8 |
| 1679 #define PHY_ANALOG_SYNTH11_LOBUF2GTUNE_MASK
0x00000300 |
| 1680 #define PHY_ANALOG_SYNTH11_LOBUF2GTUNE_GET(x)
(((x) & 0x00000300) >> 8) |
| 1681 #define PHY_ANALOG_SYNTH11_LOBUF2GTUNE_SET(x)
(((x) << 8) & 0x00000300) |
| 1682 #define PHY_ANALOG_SYNTH11_CPSTEERING_MODE_MSB
10 |
| 1683 #define PHY_ANALOG_SYNTH11_CPSTEERING_MODE_LSB
10 |
| 1684 #define PHY_ANALOG_SYNTH11_CPSTEERING_MODE_MASK
0x00000400 |
| 1685 #define PHY_ANALOG_SYNTH11_CPSTEERING_MODE_GET(x)
(((x) & 0x00000400) >> 10) |
| 1686 #define PHY_ANALOG_SYNTH11_CPSTEERING_MODE_SET(x)
(((x) << 10) & 0x00000400) |
| 1687 #define PHY_ANALOG_SYNTH11_SLOPE_ICPA2_MSB
13 |
| 1688 #define PHY_ANALOG_SYNTH11_SLOPE_ICPA2_LSB
11 |
| 1689 #define PHY_ANALOG_SYNTH11_SLOPE_ICPA2_MASK
0x00003800 |
| 1690 #define PHY_ANALOG_SYNTH11_SLOPE_ICPA2_GET(x)
(((x) & 0x00003800) >> 11) |
| 1691 #define PHY_ANALOG_SYNTH11_SLOPE_ICPA2_SET(x)
(((x) << 11) & 0x00003800) |
| 1692 #define PHY_ANALOG_SYNTH11_LOOP_ICPA2_MSB
17 |
| 1693 #define PHY_ANALOG_SYNTH11_LOOP_ICPA2_LSB
14 |
| 1694 #define PHY_ANALOG_SYNTH11_LOOP_ICPA2_MASK
0x0003c000 |
| 1695 #define PHY_ANALOG_SYNTH11_LOOP_ICPA2_GET(x)
(((x) & 0x0003c000) >> 14) |
| 1696 #define PHY_ANALOG_SYNTH11_LOOP_ICPA2_SET(x)
(((x) << 14) & 0x0003c000) |
| 1697 #define PHY_ANALOG_SYNTH11_LOOP_CSA2_MSB
21 |
| 1698 #define PHY_ANALOG_SYNTH11_LOOP_CSA2_LSB
18 |
| 1699 #define PHY_ANALOG_SYNTH11_LOOP_CSA2_MASK
0x003c0000 |
| 1700 #define PHY_ANALOG_SYNTH11_LOOP_CSA2_GET(x)
(((x) & 0x003c0000) >> 18) |
| 1701 #define PHY_ANALOG_SYNTH11_LOOP_CSA2_SET(x)
(((x) << 18) & 0x003c0000) |
| 1702 #define PHY_ANALOG_SYNTH11_LOOP_RSA2_MSB
26 |
| 1703 #define PHY_ANALOG_SYNTH11_LOOP_RSA2_LSB
22 |
| 1704 #define PHY_ANALOG_SYNTH11_LOOP_RSA2_MASK
0x07c00000 |
| 1705 #define PHY_ANALOG_SYNTH11_LOOP_RSA2_GET(x)
(((x) & 0x07c00000) >> 22) |
| 1706 #define PHY_ANALOG_SYNTH11_LOOP_RSA2_SET(x)
(((x) << 22) & 0x07c00000) |
| 1707 #define PHY_ANALOG_SYNTH11_LOOP_CPA2_MSB
31 |
| 1708 #define PHY_ANALOG_SYNTH11_LOOP_CPA2_LSB
27 |
| 1709 #define PHY_ANALOG_SYNTH11_LOOP_CPA2_MASK
0xf8000000 |
| 1710 #define PHY_ANALOG_SYNTH11_LOOP_CPA2_GET(x)
(((x) & 0xf8000000) >> 27) |
| 1711 #define PHY_ANALOG_SYNTH11_LOOP_CPA2_SET(x)
(((x) << 27) & 0xf8000000) |
| 1712 |
| 1713 /* macros for SYNTH12 */ |
| 1714 #define PHY_ANALOG_SYNTH12_ADDRESS
0x000000ac |
| 1715 #define PHY_ANALOG_SYNTH12_OFFSET
0x000000ac |
| 1716 #define PHY_ANALOG_SYNTH12_SPARE12A_MSB
9 |
| 1717 #define PHY_ANALOG_SYNTH12_SPARE12A_LSB
0 |
| 1718 #define PHY_ANALOG_SYNTH12_SPARE12A_MASK
0x000003ff |
| 1719 #define PHY_ANALOG_SYNTH12_SPARE12A_GET(x)
(((x) & 0x000003ff) >> 0) |
| 1720 #define PHY_ANALOG_SYNTH12_SPARE12A_SET(x)
(((x) << 0) & 0x000003ff) |
| 1721 #define PHY_ANALOG_SYNTH12_LOOPLEAKCUR_FRACN_MSB
13 |
| 1722 #define PHY_ANALOG_SYNTH12_LOOPLEAKCUR_FRACN_LSB
10 |
| 1723 #define PHY_ANALOG_SYNTH12_LOOPLEAKCUR_FRACN_MASK
0x00003c00 |
| 1724 #define PHY_ANALOG_SYNTH12_LOOPLEAKCUR_FRACN_GET(x)
(((x) & 0x00003c00) >> 10) |
| 1725 #define PHY_ANALOG_SYNTH12_LOOPLEAKCUR_FRACN_SET(x)
(((x) << 10) & 0x00003c00) |
| 1726 #define PHY_ANALOG_SYNTH12_CPLOWLK_FRACN_MSB
14 |
| 1727 #define PHY_ANALOG_SYNTH12_CPLOWLK_FRACN_LSB
14 |
| 1728 #define PHY_ANALOG_SYNTH12_CPLOWLK_FRACN_MASK
0x00004000 |
| 1729 #define PHY_ANALOG_SYNTH12_CPLOWLK_FRACN_GET(x)
(((x) & 0x00004000) >> 14) |
| 1730 #define PHY_ANALOG_SYNTH12_CPLOWLK_FRACN_SET(x)
(((x) << 14) & 0x00004000) |
| 1731 #define PHY_ANALOG_SYNTH12_CPBIAS_FRACN_MSB
16 |
| 1732 #define PHY_ANALOG_SYNTH12_CPBIAS_FRACN_LSB
15 |
| 1733 #define PHY_ANALOG_SYNTH12_CPBIAS_FRACN_MASK
0x00018000 |
| 1734 #define PHY_ANALOG_SYNTH12_CPBIAS_FRACN_GET(x)
(((x) & 0x00018000) >> 15) |
| 1735 #define PHY_ANALOG_SYNTH12_CPBIAS_FRACN_SET(x)
(((x) << 15) & 0x00018000) |
| 1736 #define PHY_ANALOG_SYNTH12_SYNTHDIGOUTEN_MSB
17 |
| 1737 #define PHY_ANALOG_SYNTH12_SYNTHDIGOUTEN_LSB
17 |
| 1738 #define PHY_ANALOG_SYNTH12_SYNTHDIGOUTEN_MASK
0x00020000 |
| 1739 #define PHY_ANALOG_SYNTH12_SYNTHDIGOUTEN_GET(x)
(((x) & 0x00020000) >> 17) |
| 1740 #define PHY_ANALOG_SYNTH12_SYNTHDIGOUTEN_SET(x)
(((x) << 17) & 0x00020000) |
| 1741 #define PHY_ANALOG_SYNTH12_STRCONT_MSB
18 |
| 1742 #define PHY_ANALOG_SYNTH12_STRCONT_LSB
18 |
| 1743 #define PHY_ANALOG_SYNTH12_STRCONT_MASK
0x00040000 |
| 1744 #define PHY_ANALOG_SYNTH12_STRCONT_GET(x)
(((x) & 0x00040000) >> 18) |
| 1745 #define PHY_ANALOG_SYNTH12_STRCONT_SET(x)
(((x) << 18) & 0x00040000) |
| 1746 #define PHY_ANALOG_SYNTH12_VREFMUL3_MSB
22 |
| 1747 #define PHY_ANALOG_SYNTH12_VREFMUL3_LSB
19 |
| 1748 #define PHY_ANALOG_SYNTH12_VREFMUL3_MASK
0x00780000 |
| 1749 #define PHY_ANALOG_SYNTH12_VREFMUL3_GET(x)
(((x) & 0x00780000) >> 19) |
| 1750 #define PHY_ANALOG_SYNTH12_VREFMUL3_SET(x)
(((x) << 19) & 0x00780000) |
| 1751 #define PHY_ANALOG_SYNTH12_VREFMUL2_MSB
26 |
| 1752 #define PHY_ANALOG_SYNTH12_VREFMUL2_LSB
23 |
| 1753 #define PHY_ANALOG_SYNTH12_VREFMUL2_MASK
0x07800000 |
| 1754 #define PHY_ANALOG_SYNTH12_VREFMUL2_GET(x)
(((x) & 0x07800000) >> 23) |
| 1755 #define PHY_ANALOG_SYNTH12_VREFMUL2_SET(x)
(((x) << 23) & 0x07800000) |
| 1756 #define PHY_ANALOG_SYNTH12_VREFMUL1_MSB
30 |
| 1757 #define PHY_ANALOG_SYNTH12_VREFMUL1_LSB
27 |
| 1758 #define PHY_ANALOG_SYNTH12_VREFMUL1_MASK
0x78000000 |
| 1759 #define PHY_ANALOG_SYNTH12_VREFMUL1_GET(x)
(((x) & 0x78000000) >> 27) |
| 1760 #define PHY_ANALOG_SYNTH12_VREFMUL1_SET(x)
(((x) << 27) & 0x78000000) |
| 1761 #define PHY_ANALOG_SYNTH12_CLK_DOUBLER_EN_MSB
31 |
| 1762 #define PHY_ANALOG_SYNTH12_CLK_DOUBLER_EN_LSB
31 |
| 1763 #define PHY_ANALOG_SYNTH12_CLK_DOUBLER_EN_MASK
0x80000000 |
| 1764 #define PHY_ANALOG_SYNTH12_CLK_DOUBLER_EN_GET(x)
(((x) & 0x80000000) >> 31) |
| 1765 #define PHY_ANALOG_SYNTH12_CLK_DOUBLER_EN_SET(x)
(((x) << 31) & 0x80000000) |
| 1766 |
| 1767 /* macros for SYNTH13 */ |
| 1768 #define PHY_ANALOG_SYNTH13_ADDRESS
0x000000b0 |
| 1769 #define PHY_ANALOG_SYNTH13_OFFSET
0x000000b0 |
| 1770 #define PHY_ANALOG_SYNTH13_SPARE13A_MSB
0 |
| 1771 #define PHY_ANALOG_SYNTH13_SPARE13A_LSB
0 |
| 1772 #define PHY_ANALOG_SYNTH13_SPARE13A_MASK
0x00000001 |
| 1773 #define PHY_ANALOG_SYNTH13_SPARE13A_GET(x)
(((x) & 0x00000001) >> 0) |
| 1774 #define PHY_ANALOG_SYNTH13_SPARE13A_SET(x)
(((x) << 0) & 0x00000001) |
| 1775 #define PHY_ANALOG_SYNTH13_SLOPE_ICPA_FRACN_MSB
3 |
| 1776 #define PHY_ANALOG_SYNTH13_SLOPE_ICPA_FRACN_LSB
1 |
| 1777 #define PHY_ANALOG_SYNTH13_SLOPE_ICPA_FRACN_MASK
0x0000000e |
| 1778 #define PHY_ANALOG_SYNTH13_SLOPE_ICPA_FRACN_GET(x)
(((x) & 0x0000000e) >> 1) |
| 1779 #define PHY_ANALOG_SYNTH13_SLOPE_ICPA_FRACN_SET(x)
(((x) << 1) & 0x0000000e) |
| 1780 #define PHY_ANALOG_SYNTH13_LOOP_ICPA_FRACN_MSB
7 |
| 1781 #define PHY_ANALOG_SYNTH13_LOOP_ICPA_FRACN_LSB
4 |
| 1782 #define PHY_ANALOG_SYNTH13_LOOP_ICPA_FRACN_MASK
0x000000f0 |
| 1783 #define PHY_ANALOG_SYNTH13_LOOP_ICPA_FRACN_GET(x)
(((x) & 0x000000f0) >> 4) |
| 1784 #define PHY_ANALOG_SYNTH13_LOOP_ICPA_FRACN_SET(x)
(((x) << 4) & 0x000000f0) |
| 1785 #define PHY_ANALOG_SYNTH13_LOOP_CSA_FRACN_MSB
11 |
| 1786 #define PHY_ANALOG_SYNTH13_LOOP_CSA_FRACN_LSB
8 |
| 1787 #define PHY_ANALOG_SYNTH13_LOOP_CSA_FRACN_MASK
0x00000f00 |
| 1788 #define PHY_ANALOG_SYNTH13_LOOP_CSA_FRACN_GET(x)
(((x) & 0x00000f00) >> 8) |
| 1789 #define PHY_ANALOG_SYNTH13_LOOP_CSA_FRACN_SET(x)
(((x) << 8) & 0x00000f00) |
| 1790 #define PHY_ANALOG_SYNTH13_LOOP_RSA_FRACN_MSB
16 |
| 1791 #define PHY_ANALOG_SYNTH13_LOOP_RSA_FRACN_LSB
12 |
| 1792 #define PHY_ANALOG_SYNTH13_LOOP_RSA_FRACN_MASK
0x0001f000 |
| 1793 #define PHY_ANALOG_SYNTH13_LOOP_RSA_FRACN_GET(x)
(((x) & 0x0001f000) >> 12) |
| 1794 #define PHY_ANALOG_SYNTH13_LOOP_RSA_FRACN_SET(x)
(((x) << 12) & 0x0001f000) |
| 1795 #define PHY_ANALOG_SYNTH13_LOOP_CPA_FRACN_MSB
21 |
| 1796 #define PHY_ANALOG_SYNTH13_LOOP_CPA_FRACN_LSB
17 |
| 1797 #define PHY_ANALOG_SYNTH13_LOOP_CPA_FRACN_MASK
0x003e0000 |
| 1798 #define PHY_ANALOG_SYNTH13_LOOP_CPA_FRACN_GET(x)
(((x) & 0x003e0000) >> 17) |
| 1799 #define PHY_ANALOG_SYNTH13_LOOP_CPA_FRACN_SET(x)
(((x) << 17) & 0x003e0000) |
| 1800 #define PHY_ANALOG_SYNTH13_LOOP_3RD_ORDER_RA_FRACN_MSB
26 |
| 1801 #define PHY_ANALOG_SYNTH13_LOOP_3RD_ORDER_RA_FRACN_LSB
22 |
| 1802 #define PHY_ANALOG_SYNTH13_LOOP_3RD_ORDER_RA_FRACN_MASK
0x07c00000 |
| 1803 #define PHY_ANALOG_SYNTH13_LOOP_3RD_ORDER_RA_FRACN_GET(x)
(((x) & 0x07c00000) >> 22) |
| 1804 #define PHY_ANALOG_SYNTH13_LOOP_3RD_ORDER_RA_FRACN_SET(x)
(((x) << 22) & 0x07c00000) |
| 1805 #define PHY_ANALOG_SYNTH13_REFDIVA_FRACN_MSB
31 |
| 1806 #define PHY_ANALOG_SYNTH13_REFDIVA_FRACN_LSB
27 |
| 1807 #define PHY_ANALOG_SYNTH13_REFDIVA_FRACN_MASK
0xf8000000 |
| 1808 #define PHY_ANALOG_SYNTH13_REFDIVA_FRACN_GET(x)
(((x) & 0xf8000000) >> 27) |
| 1809 #define PHY_ANALOG_SYNTH13_REFDIVA_FRACN_SET(x)
(((x) << 27) & 0xf8000000) |
| 1810 |
| 1811 /* macros for SYNTH14 */ |
| 1812 #define PHY_ANALOG_SYNTH14_ADDRESS
0x000000b4 |
| 1813 #define PHY_ANALOG_SYNTH14_OFFSET
0x000000b4 |
| 1814 #define PHY_ANALOG_SYNTH14_SPARE14A_MSB
1 |
| 1815 #define PHY_ANALOG_SYNTH14_SPARE14A_LSB
0 |
| 1816 #define PHY_ANALOG_SYNTH14_SPARE14A_MASK
0x00000003 |
| 1817 #define PHY_ANALOG_SYNTH14_SPARE14A_GET(x)
(((x) & 0x00000003) >> 0) |
| 1818 #define PHY_ANALOG_SYNTH14_SPARE14A_SET(x)
(((x) << 0) & 0x00000003) |
| 1819 #define PHY_ANALOG_SYNTH14_LOBUF5GTUNE_3_MSB
3 |
| 1820 #define PHY_ANALOG_SYNTH14_LOBUF5GTUNE_3_LSB
2 |
| 1821 #define PHY_ANALOG_SYNTH14_LOBUF5GTUNE_3_MASK
0x0000000c |
| 1822 #define PHY_ANALOG_SYNTH14_LOBUF5GTUNE_3_GET(x)
(((x) & 0x0000000c) >> 2) |
| 1823 #define PHY_ANALOG_SYNTH14_LOBUF5GTUNE_3_SET(x)
(((x) << 2) & 0x0000000c) |
| 1824 #define PHY_ANALOG_SYNTH14_LOBUF2GTUNE_3_MSB
5 |
| 1825 #define PHY_ANALOG_SYNTH14_LOBUF2GTUNE_3_LSB
4 |
| 1826 #define PHY_ANALOG_SYNTH14_LOBUF2GTUNE_3_MASK
0x00000030 |
| 1827 #define PHY_ANALOG_SYNTH14_LOBUF2GTUNE_3_GET(x)
(((x) & 0x00000030) >> 4) |
| 1828 #define PHY_ANALOG_SYNTH14_LOBUF2GTUNE_3_SET(x)
(((x) << 4) & 0x00000030) |
| 1829 #define PHY_ANALOG_SYNTH14_LOBUF5GTUNE_2_MSB
7 |
| 1830 #define PHY_ANALOG_SYNTH14_LOBUF5GTUNE_2_LSB
6 |
| 1831 #define PHY_ANALOG_SYNTH14_LOBUF5GTUNE_2_MASK
0x000000c0 |
| 1832 #define PHY_ANALOG_SYNTH14_LOBUF5GTUNE_2_GET(x)
(((x) & 0x000000c0) >> 6) |
| 1833 #define PHY_ANALOG_SYNTH14_LOBUF5GTUNE_2_SET(x)
(((x) << 6) & 0x000000c0) |
| 1834 #define PHY_ANALOG_SYNTH14_LOBUF2GTUNE_2_MSB
9 |
| 1835 #define PHY_ANALOG_SYNTH14_LOBUF2GTUNE_2_LSB
8 |
| 1836 #define PHY_ANALOG_SYNTH14_LOBUF2GTUNE_2_MASK
0x00000300 |
| 1837 #define PHY_ANALOG_SYNTH14_LOBUF2GTUNE_2_GET(x)
(((x) & 0x00000300) >> 8) |
| 1838 #define PHY_ANALOG_SYNTH14_LOBUF2GTUNE_2_SET(x)
(((x) << 8) & 0x00000300) |
| 1839 #define PHY_ANALOG_SYNTH14_PWD_LOBUF5G_3_MSB
10 |
| 1840 #define PHY_ANALOG_SYNTH14_PWD_LOBUF5G_3_LSB
10 |
| 1841 #define PHY_ANALOG_SYNTH14_PWD_LOBUF5G_3_MASK
0x00000400 |
| 1842 #define PHY_ANALOG_SYNTH14_PWD_LOBUF5G_3_GET(x)
(((x) & 0x00000400) >> 10) |
| 1843 #define PHY_ANALOG_SYNTH14_PWD_LOBUF5G_3_SET(x)
(((x) << 10) & 0x00000400) |
| 1844 #define PHY_ANALOG_SYNTH14_PWD_LOBUF2G_3_MSB
11 |
| 1845 #define PHY_ANALOG_SYNTH14_PWD_LOBUF2G_3_LSB
11 |
| 1846 #define PHY_ANALOG_SYNTH14_PWD_LOBUF2G_3_MASK
0x00000800 |
| 1847 #define PHY_ANALOG_SYNTH14_PWD_LOBUF2G_3_GET(x)
(((x) & 0x00000800) >> 11) |
| 1848 #define PHY_ANALOG_SYNTH14_PWD_LOBUF2G_3_SET(x)
(((x) << 11) & 0x00000800) |
| 1849 #define PHY_ANALOG_SYNTH14_PWD_LOBUF5G_2_MSB
12 |
| 1850 #define PHY_ANALOG_SYNTH14_PWD_LOBUF5G_2_LSB
12 |
| 1851 #define PHY_ANALOG_SYNTH14_PWD_LOBUF5G_2_MASK
0x00001000 |
| 1852 #define PHY_ANALOG_SYNTH14_PWD_LOBUF5G_2_GET(x)
(((x) & 0x00001000) >> 12) |
| 1853 #define PHY_ANALOG_SYNTH14_PWD_LOBUF5G_2_SET(x)
(((x) << 12) & 0x00001000) |
| 1854 #define PHY_ANALOG_SYNTH14_PWD_LOBUF2G_2_MSB
13 |
| 1855 #define PHY_ANALOG_SYNTH14_PWD_LOBUF2G_2_LSB
13 |
| 1856 #define PHY_ANALOG_SYNTH14_PWD_LOBUF2G_2_MASK
0x00002000 |
| 1857 #define PHY_ANALOG_SYNTH14_PWD_LOBUF2G_2_GET(x)
(((x) & 0x00002000) >> 13) |
| 1858 #define PHY_ANALOG_SYNTH14_PWD_LOBUF2G_2_SET(x)
(((x) << 13) & 0x00002000) |
| 1859 #define PHY_ANALOG_SYNTH14_PWUPLO23_PD_MSB
16 |
| 1860 #define PHY_ANALOG_SYNTH14_PWUPLO23_PD_LSB
14 |
| 1861 #define PHY_ANALOG_SYNTH14_PWUPLO23_PD_MASK
0x0001c000 |
| 1862 #define PHY_ANALOG_SYNTH14_PWUPLO23_PD_GET(x)
(((x) & 0x0001c000) >> 14) |
| 1863 #define PHY_ANALOG_SYNTH14_PWUPLO23_PD_SET(x)
(((x) << 14) & 0x0001c000) |
| 1864 #define PHY_ANALOG_SYNTH14_PWDB_ICLOBUF5G50_3_MSB
19 |
| 1865 #define PHY_ANALOG_SYNTH14_PWDB_ICLOBUF5G50_3_LSB
17 |
| 1866 #define PHY_ANALOG_SYNTH14_PWDB_ICLOBUF5G50_3_MASK
0x000e0000 |
| 1867 #define PHY_ANALOG_SYNTH14_PWDB_ICLOBUF5G50_3_GET(x)
(((x) & 0x000e0000) >> 17) |
| 1868 #define PHY_ANALOG_SYNTH14_PWDB_ICLOBUF5G50_3_SET(x)
(((x) << 17) & 0x000e0000) |
| 1869 #define PHY_ANALOG_SYNTH14_PWDB_ICLOBUF2G50_3_MSB
22 |
| 1870 #define PHY_ANALOG_SYNTH14_PWDB_ICLOBUF2G50_3_LSB
20 |
| 1871 #define PHY_ANALOG_SYNTH14_PWDB_ICLOBUF2G50_3_MASK
0x00700000 |
| 1872 #define PHY_ANALOG_SYNTH14_PWDB_ICLOBUF2G50_3_GET(x)
(((x) & 0x00700000) >> 20) |
| 1873 #define PHY_ANALOG_SYNTH14_PWDB_ICLOBUF2G50_3_SET(x)
(((x) << 20) & 0x00700000) |
| 1874 #define PHY_ANALOG_SYNTH14_PWDB_ICLOBUF5G50_2_MSB
25 |
| 1875 #define PHY_ANALOG_SYNTH14_PWDB_ICLOBUF5G50_2_LSB
23 |
| 1876 #define PHY_ANALOG_SYNTH14_PWDB_ICLOBUF5G50_2_MASK
0x03800000 |
| 1877 #define PHY_ANALOG_SYNTH14_PWDB_ICLOBUF5G50_2_GET(x)
(((x) & 0x03800000) >> 23) |
| 1878 #define PHY_ANALOG_SYNTH14_PWDB_ICLOBUF5G50_2_SET(x)
(((x) << 23) & 0x03800000) |
| 1879 #define PHY_ANALOG_SYNTH14_PWDB_ICLOBUF2G50_2_MSB
28 |
| 1880 #define PHY_ANALOG_SYNTH14_PWDB_ICLOBUF2G50_2_LSB
26 |
| 1881 #define PHY_ANALOG_SYNTH14_PWDB_ICLOBUF2G50_2_MASK
0x1c000000 |
| 1882 #define PHY_ANALOG_SYNTH14_PWDB_ICLOBUF2G50_2_GET(x)
(((x) & 0x1c000000) >> 26) |
| 1883 #define PHY_ANALOG_SYNTH14_PWDB_ICLOBUF2G50_2_SET(x)
(((x) << 26) & 0x1c000000) |
| 1884 #define PHY_ANALOG_SYNTH14_PWDB_ICLVLSHFT_MSB
31 |
| 1885 #define PHY_ANALOG_SYNTH14_PWDB_ICLVLSHFT_LSB
29 |
| 1886 #define PHY_ANALOG_SYNTH14_PWDB_ICLVLSHFT_MASK
0xe0000000 |
| 1887 #define PHY_ANALOG_SYNTH14_PWDB_ICLVLSHFT_GET(x)
(((x) & 0xe0000000) >> 29) |
| 1888 #define PHY_ANALOG_SYNTH14_PWDB_ICLVLSHFT_SET(x)
(((x) << 29) & 0xe0000000) |
| 1889 |
| 1890 /* macros for BIAS1 */ |
| 1891 #define PHY_ANALOG_BIAS1_ADDRESS
0x000000c0 |
| 1892 #define PHY_ANALOG_BIAS1_OFFSET
0x000000c0 |
| 1893 #define PHY_ANALOG_BIAS1_SPARE1_MSB
6 |
| 1894 #define PHY_ANALOG_BIAS1_SPARE1_LSB
0 |
| 1895 #define PHY_ANALOG_BIAS1_SPARE1_MASK
0x0000007f |
| 1896 #define PHY_ANALOG_BIAS1_SPARE1_GET(x)
(((x) & 0x0000007f) >> 0) |
| 1897 #define PHY_ANALOG_BIAS1_SPARE1_SET(x)
(((x) << 0) & 0x0000007f) |
| 1898 #define PHY_ANALOG_BIAS1_PWD_IC25V2IQ_MSB
9 |
| 1899 #define PHY_ANALOG_BIAS1_PWD_IC25V2IQ_LSB
7 |
| 1900 #define PHY_ANALOG_BIAS1_PWD_IC25V2IQ_MASK
0x00000380 |
| 1901 #define PHY_ANALOG_BIAS1_PWD_IC25V2IQ_GET(x)
(((x) & 0x00000380) >> 7) |
| 1902 #define PHY_ANALOG_BIAS1_PWD_IC25V2IQ_SET(x)
(((x) << 7) & 0x00000380) |
| 1903 #define PHY_ANALOG_BIAS1_PWD_IC25V2II_MSB
12 |
| 1904 #define PHY_ANALOG_BIAS1_PWD_IC25V2II_LSB
10 |
| 1905 #define PHY_ANALOG_BIAS1_PWD_IC25V2II_MASK
0x00001c00 |
| 1906 #define PHY_ANALOG_BIAS1_PWD_IC25V2II_GET(x)
(((x) & 0x00001c00) >> 10) |
| 1907 #define PHY_ANALOG_BIAS1_PWD_IC25V2II_SET(x)
(((x) << 10) & 0x00001c00) |
| 1908 #define PHY_ANALOG_BIAS1_PWD_IC25BB_MSB
15 |
| 1909 #define PHY_ANALOG_BIAS1_PWD_IC25BB_LSB
13 |
| 1910 #define PHY_ANALOG_BIAS1_PWD_IC25BB_MASK
0x0000e000 |
| 1911 #define PHY_ANALOG_BIAS1_PWD_IC25BB_GET(x)
(((x) & 0x0000e000) >> 13) |
| 1912 #define PHY_ANALOG_BIAS1_PWD_IC25BB_SET(x)
(((x) << 13) & 0x0000e000) |
| 1913 #define PHY_ANALOG_BIAS1_PWD_IC25DAC_MSB
18 |
| 1914 #define PHY_ANALOG_BIAS1_PWD_IC25DAC_LSB
16 |
| 1915 #define PHY_ANALOG_BIAS1_PWD_IC25DAC_MASK
0x00070000 |
| 1916 #define PHY_ANALOG_BIAS1_PWD_IC25DAC_GET(x)
(((x) & 0x00070000) >> 16) |
| 1917 #define PHY_ANALOG_BIAS1_PWD_IC25DAC_SET(x)
(((x) << 16) & 0x00070000) |
| 1918 #define PHY_ANALOG_BIAS1_PWD_IC25FIR_MSB
21 |
| 1919 #define PHY_ANALOG_BIAS1_PWD_IC25FIR_LSB
19 |
| 1920 #define PHY_ANALOG_BIAS1_PWD_IC25FIR_MASK
0x00380000 |
| 1921 #define PHY_ANALOG_BIAS1_PWD_IC25FIR_GET(x)
(((x) & 0x00380000) >> 19) |
| 1922 #define PHY_ANALOG_BIAS1_PWD_IC25FIR_SET(x)
(((x) << 19) & 0x00380000) |
| 1923 #define PHY_ANALOG_BIAS1_PWD_IC25ADC_MSB
24 |
| 1924 #define PHY_ANALOG_BIAS1_PWD_IC25ADC_LSB
22 |
| 1925 #define PHY_ANALOG_BIAS1_PWD_IC25ADC_MASK
0x01c00000 |
| 1926 #define PHY_ANALOG_BIAS1_PWD_IC25ADC_GET(x)
(((x) & 0x01c00000) >> 22) |
| 1927 #define PHY_ANALOG_BIAS1_PWD_IC25ADC_SET(x)
(((x) << 22) & 0x01c00000) |
| 1928 #define PHY_ANALOG_BIAS1_BIAS_SEL_MSB
31 |
| 1929 #define PHY_ANALOG_BIAS1_BIAS_SEL_LSB
25 |
| 1930 #define PHY_ANALOG_BIAS1_BIAS_SEL_MASK
0xfe000000 |
| 1931 #define PHY_ANALOG_BIAS1_BIAS_SEL_GET(x)
(((x) & 0xfe000000) >> 25) |
| 1932 #define PHY_ANALOG_BIAS1_BIAS_SEL_SET(x)
(((x) << 25) & 0xfe000000) |
| 1933 |
| 1934 /* macros for BIAS2 */ |
| 1935 #define PHY_ANALOG_BIAS2_ADDRESS
0x000000c4 |
| 1936 #define PHY_ANALOG_BIAS2_OFFSET
0x000000c4 |
| 1937 #define PHY_ANALOG_BIAS2_SPARE2_MSB
4 |
| 1938 #define PHY_ANALOG_BIAS2_SPARE2_LSB
0 |
| 1939 #define PHY_ANALOG_BIAS2_SPARE2_MASK
0x0000001f |
| 1940 #define PHY_ANALOG_BIAS2_SPARE2_GET(x)
(((x) & 0x0000001f) >> 0) |
| 1941 #define PHY_ANALOG_BIAS2_SPARE2_SET(x)
(((x) << 0) & 0x0000001f) |
| 1942 #define PHY_ANALOG_BIAS2_PWD_IC25XPA_MSB
7 |
| 1943 #define PHY_ANALOG_BIAS2_PWD_IC25XPA_LSB
5 |
| 1944 #define PHY_ANALOG_BIAS2_PWD_IC25XPA_MASK
0x000000e0 |
| 1945 #define PHY_ANALOG_BIAS2_PWD_IC25XPA_GET(x)
(((x) & 0x000000e0) >> 5) |
| 1946 #define PHY_ANALOG_BIAS2_PWD_IC25XPA_SET(x)
(((x) << 5) & 0x000000e0) |
| 1947 #define PHY_ANALOG_BIAS2_PWD_IC25XTAL_MSB
10 |
| 1948 #define PHY_ANALOG_BIAS2_PWD_IC25XTAL_LSB
8 |
| 1949 #define PHY_ANALOG_BIAS2_PWD_IC25XTAL_MASK
0x00000700 |
| 1950 #define PHY_ANALOG_BIAS2_PWD_IC25XTAL_GET(x)
(((x) & 0x00000700) >> 8) |
| 1951 #define PHY_ANALOG_BIAS2_PWD_IC25XTAL_SET(x)
(((x) << 8) & 0x00000700) |
| 1952 #define PHY_ANALOG_BIAS2_PWD_IC25TXRF_MSB
13 |
| 1953 #define PHY_ANALOG_BIAS2_PWD_IC25TXRF_LSB
11 |
| 1954 #define PHY_ANALOG_BIAS2_PWD_IC25TXRF_MASK
0x00003800 |
| 1955 #define PHY_ANALOG_BIAS2_PWD_IC25TXRF_GET(x)
(((x) & 0x00003800) >> 11) |
| 1956 #define PHY_ANALOG_BIAS2_PWD_IC25TXRF_SET(x)
(((x) << 11) & 0x00003800) |
| 1957 #define PHY_ANALOG_BIAS2_PWD_IC25RXRF_MSB
16 |
| 1958 #define PHY_ANALOG_BIAS2_PWD_IC25RXRF_LSB
14 |
| 1959 #define PHY_ANALOG_BIAS2_PWD_IC25RXRF_MASK
0x0001c000 |
| 1960 #define PHY_ANALOG_BIAS2_PWD_IC25RXRF_GET(x)
(((x) & 0x0001c000) >> 14) |
| 1961 #define PHY_ANALOG_BIAS2_PWD_IC25RXRF_SET(x)
(((x) << 14) & 0x0001c000) |
| 1962 #define PHY_ANALOG_BIAS2_PWD_IC25SYNTH_MSB
19 |
| 1963 #define PHY_ANALOG_BIAS2_PWD_IC25SYNTH_LSB
17 |
| 1964 #define PHY_ANALOG_BIAS2_PWD_IC25SYNTH_MASK
0x000e0000 |
| 1965 #define PHY_ANALOG_BIAS2_PWD_IC25SYNTH_GET(x)
(((x) & 0x000e0000) >> 17) |
| 1966 #define PHY_ANALOG_BIAS2_PWD_IC25SYNTH_SET(x)
(((x) << 17) & 0x000e0000) |
| 1967 #define PHY_ANALOG_BIAS2_PWD_IC25PLLREG_MSB
22 |
| 1968 #define PHY_ANALOG_BIAS2_PWD_IC25PLLREG_LSB
20 |
| 1969 #define PHY_ANALOG_BIAS2_PWD_IC25PLLREG_MASK
0x00700000 |
| 1970 #define PHY_ANALOG_BIAS2_PWD_IC25PLLREG_GET(x)
(((x) & 0x00700000) >> 20) |
| 1971 #define PHY_ANALOG_BIAS2_PWD_IC25PLLREG_SET(x)
(((x) << 20) & 0x00700000) |
| 1972 #define PHY_ANALOG_BIAS2_PWD_IC25PLLCP2_MSB
25 |
| 1973 #define PHY_ANALOG_BIAS2_PWD_IC25PLLCP2_LSB
23 |
| 1974 #define PHY_ANALOG_BIAS2_PWD_IC25PLLCP2_MASK
0x03800000 |
| 1975 #define PHY_ANALOG_BIAS2_PWD_IC25PLLCP2_GET(x)
(((x) & 0x03800000) >> 23) |
| 1976 #define PHY_ANALOG_BIAS2_PWD_IC25PLLCP2_SET(x)
(((x) << 23) & 0x03800000) |
| 1977 #define PHY_ANALOG_BIAS2_PWD_IC25PLLCP_MSB
28 |
| 1978 #define PHY_ANALOG_BIAS2_PWD_IC25PLLCP_LSB
26 |
| 1979 #define PHY_ANALOG_BIAS2_PWD_IC25PLLCP_MASK
0x1c000000 |
| 1980 #define PHY_ANALOG_BIAS2_PWD_IC25PLLCP_GET(x)
(((x) & 0x1c000000) >> 26) |
| 1981 #define PHY_ANALOG_BIAS2_PWD_IC25PLLCP_SET(x)
(((x) << 26) & 0x1c000000) |
| 1982 #define PHY_ANALOG_BIAS2_PWD_IC25PLLGM_MSB
31 |
| 1983 #define PHY_ANALOG_BIAS2_PWD_IC25PLLGM_LSB
29 |
| 1984 #define PHY_ANALOG_BIAS2_PWD_IC25PLLGM_MASK
0xe0000000 |
| 1985 #define PHY_ANALOG_BIAS2_PWD_IC25PLLGM_GET(x)
(((x) & 0xe0000000) >> 29) |
| 1986 #define PHY_ANALOG_BIAS2_PWD_IC25PLLGM_SET(x)
(((x) << 29) & 0xe0000000) |
| 1987 |
| 1988 /* macros for BIAS3 */ |
| 1989 #define PHY_ANALOG_BIAS3_ADDRESS
0x000000c8 |
| 1990 #define PHY_ANALOG_BIAS3_OFFSET
0x000000c8 |
| 1991 #define PHY_ANALOG_BIAS3_SPARE3_MSB
1 |
| 1992 #define PHY_ANALOG_BIAS3_SPARE3_LSB
0 |
| 1993 #define PHY_ANALOG_BIAS3_SPARE3_MASK
0x00000003 |
| 1994 #define PHY_ANALOG_BIAS3_SPARE3_GET(x)
(((x) & 0x00000003) >> 0) |
| 1995 #define PHY_ANALOG_BIAS3_SPARE3_SET(x)
(((x) << 0) & 0x00000003) |
| 1996 #define PHY_ANALOG_BIAS3_PWD_IR25SAR_MSB
4 |
| 1997 #define PHY_ANALOG_BIAS3_PWD_IR25SAR_LSB
2 |
| 1998 #define PHY_ANALOG_BIAS3_PWD_IR25SAR_MASK
0x0000001c |
| 1999 #define PHY_ANALOG_BIAS3_PWD_IR25SAR_GET(x)
(((x) & 0x0000001c) >> 2) |
| 2000 #define PHY_ANALOG_BIAS3_PWD_IR25SAR_SET(x)
(((x) << 2) & 0x0000001c) |
| 2001 #define PHY_ANALOG_BIAS3_PWD_IR25TXRF_MSB
7 |
| 2002 #define PHY_ANALOG_BIAS3_PWD_IR25TXRF_LSB
5 |
| 2003 #define PHY_ANALOG_BIAS3_PWD_IR25TXRF_MASK
0x000000e0 |
| 2004 #define PHY_ANALOG_BIAS3_PWD_IR25TXRF_GET(x)
(((x) & 0x000000e0) >> 5) |
| 2005 #define PHY_ANALOG_BIAS3_PWD_IR25TXRF_SET(x)
(((x) << 5) & 0x000000e0) |
| 2006 #define PHY_ANALOG_BIAS3_PWD_IR25RXRF_MSB
10 |
| 2007 #define PHY_ANALOG_BIAS3_PWD_IR25RXRF_LSB
8 |
| 2008 #define PHY_ANALOG_BIAS3_PWD_IR25RXRF_MASK
0x00000700 |
| 2009 #define PHY_ANALOG_BIAS3_PWD_IR25RXRF_GET(x)
(((x) & 0x00000700) >> 8) |
| 2010 #define PHY_ANALOG_BIAS3_PWD_IR25RXRF_SET(x)
(((x) << 8) & 0x00000700) |
| 2011 #define PHY_ANALOG_BIAS3_PWD_IR25SYNTH_MSB
13 |
| 2012 #define PHY_ANALOG_BIAS3_PWD_IR25SYNTH_LSB
11 |
| 2013 #define PHY_ANALOG_BIAS3_PWD_IR25SYNTH_MASK
0x00003800 |
| 2014 #define PHY_ANALOG_BIAS3_PWD_IR25SYNTH_GET(x)
(((x) & 0x00003800) >> 11) |
| 2015 #define PHY_ANALOG_BIAS3_PWD_IR25SYNTH_SET(x)
(((x) << 11) & 0x00003800) |
| 2016 #define PHY_ANALOG_BIAS3_PWD_IR25PLLREG_MSB
16 |
| 2017 #define PHY_ANALOG_BIAS3_PWD_IR25PLLREG_LSB
14 |
| 2018 #define PHY_ANALOG_BIAS3_PWD_IR25PLLREG_MASK
0x0001c000 |
| 2019 #define PHY_ANALOG_BIAS3_PWD_IR25PLLREG_GET(x)
(((x) & 0x0001c000) >> 14) |
| 2020 #define PHY_ANALOG_BIAS3_PWD_IR25PLLREG_SET(x)
(((x) << 14) & 0x0001c000) |
| 2021 #define PHY_ANALOG_BIAS3_PWD_IR25BB_MSB
19 |
| 2022 #define PHY_ANALOG_BIAS3_PWD_IR25BB_LSB
17 |
| 2023 #define PHY_ANALOG_BIAS3_PWD_IR25BB_MASK
0x000e0000 |
| 2024 #define PHY_ANALOG_BIAS3_PWD_IR25BB_GET(x)
(((x) & 0x000e0000) >> 17) |
| 2025 #define PHY_ANALOG_BIAS3_PWD_IR25BB_SET(x)
(((x) << 17) & 0x000e0000) |
| 2026 #define PHY_ANALOG_BIAS3_PWD_IR50DAC_MSB
22 |
| 2027 #define PHY_ANALOG_BIAS3_PWD_IR50DAC_LSB
20 |
| 2028 #define PHY_ANALOG_BIAS3_PWD_IR50DAC_MASK
0x00700000 |
| 2029 #define PHY_ANALOG_BIAS3_PWD_IR50DAC_GET(x)
(((x) & 0x00700000) >> 20) |
| 2030 #define PHY_ANALOG_BIAS3_PWD_IR50DAC_SET(x)
(((x) << 20) & 0x00700000) |
| 2031 #define PHY_ANALOG_BIAS3_PWD_IR25DAC_MSB
25 |
| 2032 #define PHY_ANALOG_BIAS3_PWD_IR25DAC_LSB
23 |
| 2033 #define PHY_ANALOG_BIAS3_PWD_IR25DAC_MASK
0x03800000 |
| 2034 #define PHY_ANALOG_BIAS3_PWD_IR25DAC_GET(x)
(((x) & 0x03800000) >> 23) |
| 2035 #define PHY_ANALOG_BIAS3_PWD_IR25DAC_SET(x)
(((x) << 23) & 0x03800000) |
| 2036 #define PHY_ANALOG_BIAS3_PWD_IR25FIR_MSB
28 |
| 2037 #define PHY_ANALOG_BIAS3_PWD_IR25FIR_LSB
26 |
| 2038 #define PHY_ANALOG_BIAS3_PWD_IR25FIR_MASK
0x1c000000 |
| 2039 #define PHY_ANALOG_BIAS3_PWD_IR25FIR_GET(x)
(((x) & 0x1c000000) >> 26) |
| 2040 #define PHY_ANALOG_BIAS3_PWD_IR25FIR_SET(x)
(((x) << 26) & 0x1c000000) |
| 2041 #define PHY_ANALOG_BIAS3_PWD_IR50ADC_MSB
31 |
| 2042 #define PHY_ANALOG_BIAS3_PWD_IR50ADC_LSB
29 |
| 2043 #define PHY_ANALOG_BIAS3_PWD_IR50ADC_MASK
0xe0000000 |
| 2044 #define PHY_ANALOG_BIAS3_PWD_IR50ADC_GET(x)
(((x) & 0xe0000000) >> 29) |
| 2045 #define PHY_ANALOG_BIAS3_PWD_IR50ADC_SET(x)
(((x) << 29) & 0xe0000000) |
| 2046 |
| 2047 /* macros for BIAS4 */ |
| 2048 #define PHY_ANALOG_BIAS4_ADDRESS
0x000000cc |
| 2049 #define PHY_ANALOG_BIAS4_OFFSET
0x000000cc |
| 2050 #define PHY_ANALOG_BIAS4_SPARE4_MSB
10 |
| 2051 #define PHY_ANALOG_BIAS4_SPARE4_LSB
0 |
| 2052 #define PHY_ANALOG_BIAS4_SPARE4_MASK
0x000007ff |
| 2053 #define PHY_ANALOG_BIAS4_SPARE4_GET(x)
(((x) & 0x000007ff) >> 0) |
| 2054 #define PHY_ANALOG_BIAS4_SPARE4_SET(x)
(((x) << 0) & 0x000007ff) |
| 2055 #define PHY_ANALOG_BIAS4_PWD_IR25SPARED_MSB
13 |
| 2056 #define PHY_ANALOG_BIAS4_PWD_IR25SPARED_LSB
11 |
| 2057 #define PHY_ANALOG_BIAS4_PWD_IR25SPARED_MASK
0x00003800 |
| 2058 #define PHY_ANALOG_BIAS4_PWD_IR25SPARED_GET(x)
(((x) & 0x00003800) >> 11) |
| 2059 #define PHY_ANALOG_BIAS4_PWD_IR25SPARED_SET(x)
(((x) << 11) & 0x00003800) |
| 2060 #define PHY_ANALOG_BIAS4_PWD_IR25SPAREC_MSB
16 |
| 2061 #define PHY_ANALOG_BIAS4_PWD_IR25SPAREC_LSB
14 |
| 2062 #define PHY_ANALOG_BIAS4_PWD_IR25SPAREC_MASK
0x0001c000 |
| 2063 #define PHY_ANALOG_BIAS4_PWD_IR25SPAREC_GET(x)
(((x) & 0x0001c000) >> 14) |
| 2064 #define PHY_ANALOG_BIAS4_PWD_IR25SPAREC_SET(x)
(((x) << 14) & 0x0001c000) |
| 2065 #define PHY_ANALOG_BIAS4_PWD_IR25SPAREB_MSB
19 |
| 2066 #define PHY_ANALOG_BIAS4_PWD_IR25SPAREB_LSB
17 |
| 2067 #define PHY_ANALOG_BIAS4_PWD_IR25SPAREB_MASK
0x000e0000 |
| 2068 #define PHY_ANALOG_BIAS4_PWD_IR25SPAREB_GET(x)
(((x) & 0x000e0000) >> 17) |
| 2069 #define PHY_ANALOG_BIAS4_PWD_IR25SPAREB_SET(x)
(((x) << 17) & 0x000e0000) |
| 2070 #define PHY_ANALOG_BIAS4_PWD_IR25XPA_MSB
22 |
| 2071 #define PHY_ANALOG_BIAS4_PWD_IR25XPA_LSB
20 |
| 2072 #define PHY_ANALOG_BIAS4_PWD_IR25XPA_MASK
0x00700000 |
| 2073 #define PHY_ANALOG_BIAS4_PWD_IR25XPA_GET(x)
(((x) & 0x00700000) >> 20) |
| 2074 #define PHY_ANALOG_BIAS4_PWD_IR25XPA_SET(x)
(((x) << 20) & 0x00700000) |
| 2075 #define PHY_ANALOG_BIAS4_PWD_IC25SPAREC_MSB
25 |
| 2076 #define PHY_ANALOG_BIAS4_PWD_IC25SPAREC_LSB
23 |
| 2077 #define PHY_ANALOG_BIAS4_PWD_IC25SPAREC_MASK
0x03800000 |
| 2078 #define PHY_ANALOG_BIAS4_PWD_IC25SPAREC_GET(x)
(((x) & 0x03800000) >> 23) |
| 2079 #define PHY_ANALOG_BIAS4_PWD_IC25SPAREC_SET(x)
(((x) << 23) & 0x03800000) |
| 2080 #define PHY_ANALOG_BIAS4_PWD_IC25SPAREB_MSB
28 |
| 2081 #define PHY_ANALOG_BIAS4_PWD_IC25SPAREB_LSB
26 |
| 2082 #define PHY_ANALOG_BIAS4_PWD_IC25SPAREB_MASK
0x1c000000 |
| 2083 #define PHY_ANALOG_BIAS4_PWD_IC25SPAREB_GET(x)
(((x) & 0x1c000000) >> 26) |
| 2084 #define PHY_ANALOG_BIAS4_PWD_IC25SPAREB_SET(x)
(((x) << 26) & 0x1c000000) |
| 2085 #define PHY_ANALOG_BIAS4_PWD_IC25SPAREA_MSB
31 |
| 2086 #define PHY_ANALOG_BIAS4_PWD_IC25SPAREA_LSB
29 |
| 2087 #define PHY_ANALOG_BIAS4_PWD_IC25SPAREA_MASK
0xe0000000 |
| 2088 #define PHY_ANALOG_BIAS4_PWD_IC25SPAREA_GET(x)
(((x) & 0xe0000000) >> 29) |
| 2089 #define PHY_ANALOG_BIAS4_PWD_IC25SPAREA_SET(x)
(((x) << 29) & 0xe0000000) |
| 2090 |
| 2091 /* macros for RXTX1 */ |
| 2092 #define PHY_ANALOG_RXTX1_ADDRESS
0x00000100 |
| 2093 #define PHY_ANALOG_RXTX1_OFFSET
0x00000100 |
| 2094 #define PHY_ANALOG_RXTX1_SCFIR_GAIN_MSB
0 |
| 2095 #define PHY_ANALOG_RXTX1_SCFIR_GAIN_LSB
0 |
| 2096 #define PHY_ANALOG_RXTX1_SCFIR_GAIN_MASK
0x00000001 |
| 2097 #define PHY_ANALOG_RXTX1_SCFIR_GAIN_GET(x)
(((x) & 0x00000001) >> 0) |
| 2098 #define PHY_ANALOG_RXTX1_SCFIR_GAIN_SET(x)
(((x) << 0) & 0x00000001) |
| 2099 #define PHY_ANALOG_RXTX1_MANRXGAIN_MSB
1 |
| 2100 #define PHY_ANALOG_RXTX1_MANRXGAIN_LSB
1 |
| 2101 #define PHY_ANALOG_RXTX1_MANRXGAIN_MASK
0x00000002 |
| 2102 #define PHY_ANALOG_RXTX1_MANRXGAIN_GET(x)
(((x) & 0x00000002) >> 1) |
| 2103 #define PHY_ANALOG_RXTX1_MANRXGAIN_SET(x)
(((x) << 1) & 0x00000002) |
| 2104 #define PHY_ANALOG_RXTX1_AGC_DBDAC_MSB
5 |
| 2105 #define PHY_ANALOG_RXTX1_AGC_DBDAC_LSB
2 |
| 2106 #define PHY_ANALOG_RXTX1_AGC_DBDAC_MASK
0x0000003c |
| 2107 #define PHY_ANALOG_RXTX1_AGC_DBDAC_GET(x)
(((x) & 0x0000003c) >> 2) |
| 2108 #define PHY_ANALOG_RXTX1_AGC_DBDAC_SET(x)
(((x) << 2) & 0x0000003c) |
| 2109 #define PHY_ANALOG_RXTX1_OVR_AGC_DBDAC_MSB
6 |
| 2110 #define PHY_ANALOG_RXTX1_OVR_AGC_DBDAC_LSB
6 |
| 2111 #define PHY_ANALOG_RXTX1_OVR_AGC_DBDAC_MASK
0x00000040 |
| 2112 #define PHY_ANALOG_RXTX1_OVR_AGC_DBDAC_GET(x)
(((x) & 0x00000040) >> 6) |
| 2113 #define PHY_ANALOG_RXTX1_OVR_AGC_DBDAC_SET(x)
(((x) << 6) & 0x00000040) |
| 2114 #define PHY_ANALOG_RXTX1_ENABLE_PAL_MSB
7 |
| 2115 #define PHY_ANALOG_RXTX1_ENABLE_PAL_LSB
7 |
| 2116 #define PHY_ANALOG_RXTX1_ENABLE_PAL_MASK
0x00000080 |
| 2117 #define PHY_ANALOG_RXTX1_ENABLE_PAL_GET(x)
(((x) & 0x00000080) >> 7) |
| 2118 #define PHY_ANALOG_RXTX1_ENABLE_PAL_SET(x)
(((x) << 7) & 0x00000080) |
| 2119 #define PHY_ANALOG_RXTX1_ENABLE_PAL_OVR_MSB
8 |
| 2120 #define PHY_ANALOG_RXTX1_ENABLE_PAL_OVR_LSB
8 |
| 2121 #define PHY_ANALOG_RXTX1_ENABLE_PAL_OVR_MASK
0x00000100 |
| 2122 #define PHY_ANALOG_RXTX1_ENABLE_PAL_OVR_GET(x)
(((x) & 0x00000100) >> 8) |
| 2123 #define PHY_ANALOG_RXTX1_ENABLE_PAL_OVR_SET(x)
(((x) << 8) & 0x00000100) |
| 2124 #define PHY_ANALOG_RXTX1_TX1DB_BIQUAD_MSB
11 |
| 2125 #define PHY_ANALOG_RXTX1_TX1DB_BIQUAD_LSB
9 |
| 2126 #define PHY_ANALOG_RXTX1_TX1DB_BIQUAD_MASK
0x00000e00 |
| 2127 #define PHY_ANALOG_RXTX1_TX1DB_BIQUAD_GET(x)
(((x) & 0x00000e00) >> 9) |
| 2128 #define PHY_ANALOG_RXTX1_TX1DB_BIQUAD_SET(x)
(((x) << 9) & 0x00000e00) |
| 2129 #define PHY_ANALOG_RXTX1_TX6DB_BIQUAD_MSB
13 |
| 2130 #define PHY_ANALOG_RXTX1_TX6DB_BIQUAD_LSB
12 |
| 2131 #define PHY_ANALOG_RXTX1_TX6DB_BIQUAD_MASK
0x00003000 |
| 2132 #define PHY_ANALOG_RXTX1_TX6DB_BIQUAD_GET(x)
(((x) & 0x00003000) >> 12) |
| 2133 #define PHY_ANALOG_RXTX1_TX6DB_BIQUAD_SET(x)
(((x) << 12) & 0x00003000) |
| 2134 #define PHY_ANALOG_RXTX1_PADRVHALFGN2G_MSB
14 |
| 2135 #define PHY_ANALOG_RXTX1_PADRVHALFGN2G_LSB
14 |
| 2136 #define PHY_ANALOG_RXTX1_PADRVHALFGN2G_MASK
0x00004000 |
| 2137 #define PHY_ANALOG_RXTX1_PADRVHALFGN2G_GET(x)
(((x) & 0x00004000) >> 14) |
| 2138 #define PHY_ANALOG_RXTX1_PADRVHALFGN2G_SET(x)
(((x) << 14) & 0x00004000) |
| 2139 #define PHY_ANALOG_RXTX1_PADRV2GN_MSB
18 |
| 2140 #define PHY_ANALOG_RXTX1_PADRV2GN_LSB
15 |
| 2141 #define PHY_ANALOG_RXTX1_PADRV2GN_MASK
0x00078000 |
| 2142 #define PHY_ANALOG_RXTX1_PADRV2GN_GET(x)
(((x) & 0x00078000) >> 15) |
| 2143 #define PHY_ANALOG_RXTX1_PADRV2GN_SET(x)
(((x) << 15) & 0x00078000) |
| 2144 #define PHY_ANALOG_RXTX1_PADRV3GN5G_MSB
22 |
| 2145 #define PHY_ANALOG_RXTX1_PADRV3GN5G_LSB
19 |
| 2146 #define PHY_ANALOG_RXTX1_PADRV3GN5G_MASK
0x00780000 |
| 2147 #define PHY_ANALOG_RXTX1_PADRV3GN5G_GET(x)
(((x) & 0x00780000) >> 19) |
| 2148 #define PHY_ANALOG_RXTX1_PADRV3GN5G_SET(x)
(((x) << 19) & 0x00780000) |
| 2149 #define PHY_ANALOG_RXTX1_PADRV4GN5G_MSB
26 |
| 2150 #define PHY_ANALOG_RXTX1_PADRV4GN5G_LSB
23 |
| 2151 #define PHY_ANALOG_RXTX1_PADRV4GN5G_MASK
0x07800000 |
| 2152 #define PHY_ANALOG_RXTX1_PADRV4GN5G_GET(x)
(((x) & 0x07800000) >> 23) |
| 2153 #define PHY_ANALOG_RXTX1_PADRV4GN5G_SET(x)
(((x) << 23) & 0x07800000) |
| 2154 #define PHY_ANALOG_RXTX1_TXBB_GC_MSB
30 |
| 2155 #define PHY_ANALOG_RXTX1_TXBB_GC_LSB
27 |
| 2156 #define PHY_ANALOG_RXTX1_TXBB_GC_MASK
0x78000000 |
| 2157 #define PHY_ANALOG_RXTX1_TXBB_GC_GET(x)
(((x) & 0x78000000) >> 27) |
| 2158 #define PHY_ANALOG_RXTX1_TXBB_GC_SET(x)
(((x) << 27) & 0x78000000) |
| 2159 #define PHY_ANALOG_RXTX1_MANTXGAIN_MSB
31 |
| 2160 #define PHY_ANALOG_RXTX1_MANTXGAIN_LSB
31 |
| 2161 #define PHY_ANALOG_RXTX1_MANTXGAIN_MASK
0x80000000 |
| 2162 #define PHY_ANALOG_RXTX1_MANTXGAIN_GET(x)
(((x) & 0x80000000) >> 31) |
| 2163 #define PHY_ANALOG_RXTX1_MANTXGAIN_SET(x)
(((x) << 31) & 0x80000000) |
| 2164 |
| 2165 /* macros for RXTX2 */ |
| 2166 #define PHY_ANALOG_RXTX2_ADDRESS
0x00000104 |
| 2167 #define PHY_ANALOG_RXTX2_OFFSET
0x00000104 |
| 2168 #define PHY_ANALOG_RXTX2_BMODE_MSB
0 |
| 2169 #define PHY_ANALOG_RXTX2_BMODE_LSB
0 |
| 2170 #define PHY_ANALOG_RXTX2_BMODE_MASK
0x00000001 |
| 2171 #define PHY_ANALOG_RXTX2_BMODE_GET(x)
(((x) & 0x00000001) >> 0) |
| 2172 #define PHY_ANALOG_RXTX2_BMODE_SET(x)
(((x) << 0) & 0x00000001) |
| 2173 #define PHY_ANALOG_RXTX2_BMODE_OVR_MSB
1 |
| 2174 #define PHY_ANALOG_RXTX2_BMODE_OVR_LSB
1 |
| 2175 #define PHY_ANALOG_RXTX2_BMODE_OVR_MASK
0x00000002 |
| 2176 #define PHY_ANALOG_RXTX2_BMODE_OVR_GET(x)
(((x) & 0x00000002) >> 1) |
| 2177 #define PHY_ANALOG_RXTX2_BMODE_OVR_SET(x)
(((x) << 1) & 0x00000002) |
| 2178 #define PHY_ANALOG_RXTX2_SYNTHON_MSB
2 |
| 2179 #define PHY_ANALOG_RXTX2_SYNTHON_LSB
2 |
| 2180 #define PHY_ANALOG_RXTX2_SYNTHON_MASK
0x00000004 |
| 2181 #define PHY_ANALOG_RXTX2_SYNTHON_GET(x)
(((x) & 0x00000004) >> 2) |
| 2182 #define PHY_ANALOG_RXTX2_SYNTHON_SET(x)
(((x) << 2) & 0x00000004) |
| 2183 #define PHY_ANALOG_RXTX2_SYNTHON_OVR_MSB
3 |
| 2184 #define PHY_ANALOG_RXTX2_SYNTHON_OVR_LSB
3 |
| 2185 #define PHY_ANALOG_RXTX2_SYNTHON_OVR_MASK
0x00000008 |
| 2186 #define PHY_ANALOG_RXTX2_SYNTHON_OVR_GET(x)
(((x) & 0x00000008) >> 3) |
| 2187 #define PHY_ANALOG_RXTX2_SYNTHON_OVR_SET(x)
(((x) << 3) & 0x00000008) |
| 2188 #define PHY_ANALOG_RXTX2_BW_ST_MSB
5 |
| 2189 #define PHY_ANALOG_RXTX2_BW_ST_LSB
4 |
| 2190 #define PHY_ANALOG_RXTX2_BW_ST_MASK
0x00000030 |
| 2191 #define PHY_ANALOG_RXTX2_BW_ST_GET(x)
(((x) & 0x00000030) >> 4) |
| 2192 #define PHY_ANALOG_RXTX2_BW_ST_SET(x)
(((x) << 4) & 0x00000030) |
| 2193 #define PHY_ANALOG_RXTX2_BW_ST_OVR_MSB
6 |
| 2194 #define PHY_ANALOG_RXTX2_BW_ST_OVR_LSB
6 |
| 2195 #define PHY_ANALOG_RXTX2_BW_ST_OVR_MASK
0x00000040 |
| 2196 #define PHY_ANALOG_RXTX2_BW_ST_OVR_GET(x)
(((x) & 0x00000040) >> 6) |
| 2197 #define PHY_ANALOG_RXTX2_BW_ST_OVR_SET(x)
(((x) << 6) & 0x00000040) |
| 2198 #define PHY_ANALOG_RXTX2_TXON_MSB
7 |
| 2199 #define PHY_ANALOG_RXTX2_TXON_LSB
7 |
| 2200 #define PHY_ANALOG_RXTX2_TXON_MASK
0x00000080 |
| 2201 #define PHY_ANALOG_RXTX2_TXON_GET(x)
(((x) & 0x00000080) >> 7) |
| 2202 #define PHY_ANALOG_RXTX2_TXON_SET(x)
(((x) << 7) & 0x00000080) |
| 2203 #define PHY_ANALOG_RXTX2_TXON_OVR_MSB
8 |
| 2204 #define PHY_ANALOG_RXTX2_TXON_OVR_LSB
8 |
| 2205 #define PHY_ANALOG_RXTX2_TXON_OVR_MASK
0x00000100 |
| 2206 #define PHY_ANALOG_RXTX2_TXON_OVR_GET(x)
(((x) & 0x00000100) >> 8) |
| 2207 #define PHY_ANALOG_RXTX2_TXON_OVR_SET(x)
(((x) << 8) & 0x00000100) |
| 2208 #define PHY_ANALOG_RXTX2_PAON_MSB
9 |
| 2209 #define PHY_ANALOG_RXTX2_PAON_LSB
9 |
| 2210 #define PHY_ANALOG_RXTX2_PAON_MASK
0x00000200 |
| 2211 #define PHY_ANALOG_RXTX2_PAON_GET(x)
(((x) & 0x00000200) >> 9) |
| 2212 #define PHY_ANALOG_RXTX2_PAON_SET(x)
(((x) << 9) & 0x00000200) |
| 2213 #define PHY_ANALOG_RXTX2_PAON_OVR_MSB
10 |
| 2214 #define PHY_ANALOG_RXTX2_PAON_OVR_LSB
10 |
| 2215 #define PHY_ANALOG_RXTX2_PAON_OVR_MASK
0x00000400 |
| 2216 #define PHY_ANALOG_RXTX2_PAON_OVR_GET(x)
(((x) & 0x00000400) >> 10) |
| 2217 #define PHY_ANALOG_RXTX2_PAON_OVR_SET(x)
(((x) << 10) & 0x00000400) |
| 2218 #define PHY_ANALOG_RXTX2_RXON_MSB
11 |
| 2219 #define PHY_ANALOG_RXTX2_RXON_LSB
11 |
| 2220 #define PHY_ANALOG_RXTX2_RXON_MASK
0x00000800 |
| 2221 #define PHY_ANALOG_RXTX2_RXON_GET(x)
(((x) & 0x00000800) >> 11) |
| 2222 #define PHY_ANALOG_RXTX2_RXON_SET(x)
(((x) << 11) & 0x00000800) |
| 2223 #define PHY_ANALOG_RXTX2_RXON_OVR_MSB
12 |
| 2224 #define PHY_ANALOG_RXTX2_RXON_OVR_LSB
12 |
| 2225 #define PHY_ANALOG_RXTX2_RXON_OVR_MASK
0x00001000 |
| 2226 #define PHY_ANALOG_RXTX2_RXON_OVR_GET(x)
(((x) & 0x00001000) >> 12) |
| 2227 #define PHY_ANALOG_RXTX2_RXON_OVR_SET(x)
(((x) << 12) & 0x00001000) |
| 2228 #define PHY_ANALOG_RXTX2_AGCON_MSB
13 |
| 2229 #define PHY_ANALOG_RXTX2_AGCON_LSB
13 |
| 2230 #define PHY_ANALOG_RXTX2_AGCON_MASK
0x00002000 |
| 2231 #define PHY_ANALOG_RXTX2_AGCON_GET(x)
(((x) & 0x00002000) >> 13) |
| 2232 #define PHY_ANALOG_RXTX2_AGCON_SET(x)
(((x) << 13) & 0x00002000) |
| 2233 #define PHY_ANALOG_RXTX2_AGCON_OVR_MSB
14 |
| 2234 #define PHY_ANALOG_RXTX2_AGCON_OVR_LSB
14 |
| 2235 #define PHY_ANALOG_RXTX2_AGCON_OVR_MASK
0x00004000 |
| 2236 #define PHY_ANALOG_RXTX2_AGCON_OVR_GET(x)
(((x) & 0x00004000) >> 14) |
| 2237 #define PHY_ANALOG_RXTX2_AGCON_OVR_SET(x)
(((x) << 14) & 0x00004000) |
| 2238 #define PHY_ANALOG_RXTX2_TXMOD_MSB
17 |
| 2239 #define PHY_ANALOG_RXTX2_TXMOD_LSB
15 |
| 2240 #define PHY_ANALOG_RXTX2_TXMOD_MASK
0x00038000 |
| 2241 #define PHY_ANALOG_RXTX2_TXMOD_GET(x)
(((x) & 0x00038000) >> 15) |
| 2242 #define PHY_ANALOG_RXTX2_TXMOD_SET(x)
(((x) << 15) & 0x00038000) |
| 2243 #define PHY_ANALOG_RXTX2_TXMOD_OVR_MSB
18 |
| 2244 #define PHY_ANALOG_RXTX2_TXMOD_OVR_LSB
18 |
| 2245 #define PHY_ANALOG_RXTX2_TXMOD_OVR_MASK
0x00040000 |
| 2246 #define PHY_ANALOG_RXTX2_TXMOD_OVR_GET(x)
(((x) & 0x00040000) >> 18) |
| 2247 #define PHY_ANALOG_RXTX2_TXMOD_OVR_SET(x)
(((x) << 18) & 0x00040000) |
| 2248 #define PHY_ANALOG_RXTX2_RX1DB_BIQUAD_MSB
21 |
| 2249 #define PHY_ANALOG_RXTX2_RX1DB_BIQUAD_LSB
19 |
| 2250 #define PHY_ANALOG_RXTX2_RX1DB_BIQUAD_MASK
0x00380000 |
| 2251 #define PHY_ANALOG_RXTX2_RX1DB_BIQUAD_GET(x)
(((x) & 0x00380000) >> 19) |
| 2252 #define PHY_ANALOG_RXTX2_RX1DB_BIQUAD_SET(x)
(((x) << 19) & 0x00380000) |
| 2253 #define PHY_ANALOG_RXTX2_RX6DB_BIQUAD_MSB
23 |
| 2254 #define PHY_ANALOG_RXTX2_RX6DB_BIQUAD_LSB
22 |
| 2255 #define PHY_ANALOG_RXTX2_RX6DB_BIQUAD_MASK
0x00c00000 |
| 2256 #define PHY_ANALOG_RXTX2_RX6DB_BIQUAD_GET(x)
(((x) & 0x00c00000) >> 22) |
| 2257 #define PHY_ANALOG_RXTX2_RX6DB_BIQUAD_SET(x)
(((x) << 22) & 0x00c00000) |
| 2258 #define PHY_ANALOG_RXTX2_MXRGAIN_MSB
25 |
| 2259 #define PHY_ANALOG_RXTX2_MXRGAIN_LSB
24 |
| 2260 #define PHY_ANALOG_RXTX2_MXRGAIN_MASK
0x03000000 |
| 2261 #define PHY_ANALOG_RXTX2_MXRGAIN_GET(x)
(((x) & 0x03000000) >> 24) |
| 2262 #define PHY_ANALOG_RXTX2_MXRGAIN_SET(x)
(((x) << 24) & 0x03000000) |
| 2263 #define PHY_ANALOG_RXTX2_VGAGAIN_MSB
28 |
| 2264 #define PHY_ANALOG_RXTX2_VGAGAIN_LSB
26 |
| 2265 #define PHY_ANALOG_RXTX2_VGAGAIN_MASK
0x1c000000 |
| 2266 #define PHY_ANALOG_RXTX2_VGAGAIN_GET(x)
(((x) & 0x1c000000) >> 26) |
| 2267 #define PHY_ANALOG_RXTX2_VGAGAIN_SET(x)
(((x) << 26) & 0x1c000000) |
| 2268 #define PHY_ANALOG_RXTX2_LNAGAIN_MSB
31 |
| 2269 #define PHY_ANALOG_RXTX2_LNAGAIN_LSB
29 |
| 2270 #define PHY_ANALOG_RXTX2_LNAGAIN_MASK
0xe0000000 |
| 2271 #define PHY_ANALOG_RXTX2_LNAGAIN_GET(x)
(((x) & 0xe0000000) >> 29) |
| 2272 #define PHY_ANALOG_RXTX2_LNAGAIN_SET(x)
(((x) << 29) & 0xe0000000) |
| 2273 |
| 2274 /* macros for RXTX3 */ |
| 2275 #define PHY_ANALOG_RXTX3_ADDRESS
0x00000108 |
| 2276 #define PHY_ANALOG_RXTX3_OFFSET
0x00000108 |
| 2277 #define PHY_ANALOG_RXTX3_SPARE3_MSB
2 |
| 2278 #define PHY_ANALOG_RXTX3_SPARE3_LSB
0 |
| 2279 #define PHY_ANALOG_RXTX3_SPARE3_MASK
0x00000007 |
| 2280 #define PHY_ANALOG_RXTX3_SPARE3_GET(x)
(((x) & 0x00000007) >> 0) |
| 2281 #define PHY_ANALOG_RXTX3_SPARE3_SET(x)
(((x) << 0) & 0x00000007) |
| 2282 #define PHY_ANALOG_RXTX3_SPURON_MSB
3 |
| 2283 #define PHY_ANALOG_RXTX3_SPURON_LSB
3 |
| 2284 #define PHY_ANALOG_RXTX3_SPURON_MASK
0x00000008 |
| 2285 #define PHY_ANALOG_RXTX3_SPURON_GET(x)
(((x) & 0x00000008) >> 3) |
| 2286 #define PHY_ANALOG_RXTX3_SPURON_SET(x)
(((x) << 3) & 0x00000008) |
| 2287 #define PHY_ANALOG_RXTX3_PAL_LOCKEDEN_MSB
4 |
| 2288 #define PHY_ANALOG_RXTX3_PAL_LOCKEDEN_LSB
4 |
| 2289 #define PHY_ANALOG_RXTX3_PAL_LOCKEDEN_MASK
0x00000010 |
| 2290 #define PHY_ANALOG_RXTX3_PAL_LOCKEDEN_GET(x)
(((x) & 0x00000010) >> 4) |
| 2291 #define PHY_ANALOG_RXTX3_PAL_LOCKEDEN_SET(x)
(((x) << 4) & 0x00000010) |
| 2292 #define PHY_ANALOG_RXTX3_DACFULLSCALE_MSB
5 |
| 2293 #define PHY_ANALOG_RXTX3_DACFULLSCALE_LSB
5 |
| 2294 #define PHY_ANALOG_RXTX3_DACFULLSCALE_MASK
0x00000020 |
| 2295 #define PHY_ANALOG_RXTX3_DACFULLSCALE_GET(x)
(((x) & 0x00000020) >> 5) |
| 2296 #define PHY_ANALOG_RXTX3_DACFULLSCALE_SET(x)
(((x) << 5) & 0x00000020) |
| 2297 #define PHY_ANALOG_RXTX3_ADCSHORT_MSB
6 |
| 2298 #define PHY_ANALOG_RXTX3_ADCSHORT_LSB
6 |
| 2299 #define PHY_ANALOG_RXTX3_ADCSHORT_MASK
0x00000040 |
| 2300 #define PHY_ANALOG_RXTX3_ADCSHORT_GET(x)
(((x) & 0x00000040) >> 6) |
| 2301 #define PHY_ANALOG_RXTX3_ADCSHORT_SET(x)
(((x) << 6) & 0x00000040) |
| 2302 #define PHY_ANALOG_RXTX3_DACPWD_MSB
7 |
| 2303 #define PHY_ANALOG_RXTX3_DACPWD_LSB
7 |
| 2304 #define PHY_ANALOG_RXTX3_DACPWD_MASK
0x00000080 |
| 2305 #define PHY_ANALOG_RXTX3_DACPWD_GET(x)
(((x) & 0x00000080) >> 7) |
| 2306 #define PHY_ANALOG_RXTX3_DACPWD_SET(x)
(((x) << 7) & 0x00000080) |
| 2307 #define PHY_ANALOG_RXTX3_DACPWD_OVR_MSB
8 |
| 2308 #define PHY_ANALOG_RXTX3_DACPWD_OVR_LSB
8 |
| 2309 #define PHY_ANALOG_RXTX3_DACPWD_OVR_MASK
0x00000100 |
| 2310 #define PHY_ANALOG_RXTX3_DACPWD_OVR_GET(x)
(((x) & 0x00000100) >> 8) |
| 2311 #define PHY_ANALOG_RXTX3_DACPWD_OVR_SET(x)
(((x) << 8) & 0x00000100) |
| 2312 #define PHY_ANALOG_RXTX3_ADCPWD_MSB
9 |
| 2313 #define PHY_ANALOG_RXTX3_ADCPWD_LSB
9 |
| 2314 #define PHY_ANALOG_RXTX3_ADCPWD_MASK
0x00000200 |
| 2315 #define PHY_ANALOG_RXTX3_ADCPWD_GET(x)
(((x) & 0x00000200) >> 9) |
| 2316 #define PHY_ANALOG_RXTX3_ADCPWD_SET(x)
(((x) << 9) & 0x00000200) |
| 2317 #define PHY_ANALOG_RXTX3_ADCPWD_OVR_MSB
10 |
| 2318 #define PHY_ANALOG_RXTX3_ADCPWD_OVR_LSB
10 |
| 2319 #define PHY_ANALOG_RXTX3_ADCPWD_OVR_MASK
0x00000400 |
| 2320 #define PHY_ANALOG_RXTX3_ADCPWD_OVR_GET(x)
(((x) & 0x00000400) >> 10) |
| 2321 #define PHY_ANALOG_RXTX3_ADCPWD_OVR_SET(x)
(((x) << 10) & 0x00000400) |
| 2322 #define PHY_ANALOG_RXTX3_AGC_CALDAC_MSB
16 |
| 2323 #define PHY_ANALOG_RXTX3_AGC_CALDAC_LSB
11 |
| 2324 #define PHY_ANALOG_RXTX3_AGC_CALDAC_MASK
0x0001f800 |
| 2325 #define PHY_ANALOG_RXTX3_AGC_CALDAC_GET(x)
(((x) & 0x0001f800) >> 11) |
| 2326 #define PHY_ANALOG_RXTX3_AGC_CALDAC_SET(x)
(((x) << 11) & 0x0001f800) |
| 2327 #define PHY_ANALOG_RXTX3_AGC_CAL_MSB
17 |
| 2328 #define PHY_ANALOG_RXTX3_AGC_CAL_LSB
17 |
| 2329 #define PHY_ANALOG_RXTX3_AGC_CAL_MASK
0x00020000 |
| 2330 #define PHY_ANALOG_RXTX3_AGC_CAL_GET(x)
(((x) & 0x00020000) >> 17) |
| 2331 #define PHY_ANALOG_RXTX3_AGC_CAL_SET(x)
(((x) << 17) & 0x00020000) |
| 2332 #define PHY_ANALOG_RXTX3_AGC_CAL_OVR_MSB
18 |
| 2333 #define PHY_ANALOG_RXTX3_AGC_CAL_OVR_LSB
18 |
| 2334 #define PHY_ANALOG_RXTX3_AGC_CAL_OVR_MASK
0x00040000 |
| 2335 #define PHY_ANALOG_RXTX3_AGC_CAL_OVR_GET(x)
(((x) & 0x00040000) >> 18) |
| 2336 #define PHY_ANALOG_RXTX3_AGC_CAL_OVR_SET(x)
(((x) << 18) & 0x00040000) |
| 2337 #define PHY_ANALOG_RXTX3_LOFORCEDON_MSB
19 |
| 2338 #define PHY_ANALOG_RXTX3_LOFORCEDON_LSB
19 |
| 2339 #define PHY_ANALOG_RXTX3_LOFORCEDON_MASK
0x00080000 |
| 2340 #define PHY_ANALOG_RXTX3_LOFORCEDON_GET(x)
(((x) & 0x00080000) >> 19) |
| 2341 #define PHY_ANALOG_RXTX3_LOFORCEDON_SET(x)
(((x) << 19) & 0x00080000) |
| 2342 #define PHY_ANALOG_RXTX3_CALRESIDUE_MSB
20 |
| 2343 #define PHY_ANALOG_RXTX3_CALRESIDUE_LSB
20 |
| 2344 #define PHY_ANALOG_RXTX3_CALRESIDUE_MASK
0x00100000 |
| 2345 #define PHY_ANALOG_RXTX3_CALRESIDUE_GET(x)
(((x) & 0x00100000) >> 20) |
| 2346 #define PHY_ANALOG_RXTX3_CALRESIDUE_SET(x)
(((x) << 20) & 0x00100000) |
| 2347 #define PHY_ANALOG_RXTX3_CALRESIDUE_OVR_MSB
21 |
| 2348 #define PHY_ANALOG_RXTX3_CALRESIDUE_OVR_LSB
21 |
| 2349 #define PHY_ANALOG_RXTX3_CALRESIDUE_OVR_MASK
0x00200000 |
| 2350 #define PHY_ANALOG_RXTX3_CALRESIDUE_OVR_GET(x)
(((x) & 0x00200000) >> 21) |
| 2351 #define PHY_ANALOG_RXTX3_CALRESIDUE_OVR_SET(x)
(((x) << 21) & 0x00200000) |
| 2352 #define PHY_ANALOG_RXTX3_CALFC_MSB
22 |
| 2353 #define PHY_ANALOG_RXTX3_CALFC_LSB
22 |
| 2354 #define PHY_ANALOG_RXTX3_CALFC_MASK
0x00400000 |
| 2355 #define PHY_ANALOG_RXTX3_CALFC_GET(x)
(((x) & 0x00400000) >> 22) |
| 2356 #define PHY_ANALOG_RXTX3_CALFC_SET(x)
(((x) << 22) & 0x00400000) |
| 2357 #define PHY_ANALOG_RXTX3_CALFC_OVR_MSB
23 |
| 2358 #define PHY_ANALOG_RXTX3_CALFC_OVR_LSB
23 |
| 2359 #define PHY_ANALOG_RXTX3_CALFC_OVR_MASK
0x00800000 |
| 2360 #define PHY_ANALOG_RXTX3_CALFC_OVR_GET(x)
(((x) & 0x00800000) >> 23) |
| 2361 #define PHY_ANALOG_RXTX3_CALFC_OVR_SET(x)
(((x) << 23) & 0x00800000) |
| 2362 #define PHY_ANALOG_RXTX3_CALTX_MSB
24 |
| 2363 #define PHY_ANALOG_RXTX3_CALTX_LSB
24 |
| 2364 #define PHY_ANALOG_RXTX3_CALTX_MASK
0x01000000 |
| 2365 #define PHY_ANALOG_RXTX3_CALTX_GET(x)
(((x) & 0x01000000) >> 24) |
| 2366 #define PHY_ANALOG_RXTX3_CALTX_SET(x)
(((x) << 24) & 0x01000000) |
| 2367 #define PHY_ANALOG_RXTX3_CALTX_OVR_MSB
25 |
| 2368 #define PHY_ANALOG_RXTX3_CALTX_OVR_LSB
25 |
| 2369 #define PHY_ANALOG_RXTX3_CALTX_OVR_MASK
0x02000000 |
| 2370 #define PHY_ANALOG_RXTX3_CALTX_OVR_GET(x)
(((x) & 0x02000000) >> 25) |
| 2371 #define PHY_ANALOG_RXTX3_CALTX_OVR_SET(x)
(((x) << 25) & 0x02000000) |
| 2372 #define PHY_ANALOG_RXTX3_CALTXSHIFT_MSB
26 |
| 2373 #define PHY_ANALOG_RXTX3_CALTXSHIFT_LSB
26 |
| 2374 #define PHY_ANALOG_RXTX3_CALTXSHIFT_MASK
0x04000000 |
| 2375 #define PHY_ANALOG_RXTX3_CALTXSHIFT_GET(x)
(((x) & 0x04000000) >> 26) |
| 2376 #define PHY_ANALOG_RXTX3_CALTXSHIFT_SET(x)
(((x) << 26) & 0x04000000) |
| 2377 #define PHY_ANALOG_RXTX3_CALTXSHIFT_OVR_MSB
27 |
| 2378 #define PHY_ANALOG_RXTX3_CALTXSHIFT_OVR_LSB
27 |
| 2379 #define PHY_ANALOG_RXTX3_CALTXSHIFT_OVR_MASK
0x08000000 |
| 2380 #define PHY_ANALOG_RXTX3_CALTXSHIFT_OVR_GET(x)
(((x) & 0x08000000) >> 27) |
| 2381 #define PHY_ANALOG_RXTX3_CALTXSHIFT_OVR_SET(x)
(((x) << 27) & 0x08000000) |
| 2382 #define PHY_ANALOG_RXTX3_CALPA_MSB
28 |
| 2383 #define PHY_ANALOG_RXTX3_CALPA_LSB
28 |
| 2384 #define PHY_ANALOG_RXTX3_CALPA_MASK
0x10000000 |
| 2385 #define PHY_ANALOG_RXTX3_CALPA_GET(x)
(((x) & 0x10000000) >> 28) |
| 2386 #define PHY_ANALOG_RXTX3_CALPA_SET(x)
(((x) << 28) & 0x10000000) |
| 2387 #define PHY_ANALOG_RXTX3_CALPA_OVR_MSB
29 |
| 2388 #define PHY_ANALOG_RXTX3_CALPA_OVR_LSB
29 |
| 2389 #define PHY_ANALOG_RXTX3_CALPA_OVR_MASK
0x20000000 |
| 2390 #define PHY_ANALOG_RXTX3_CALPA_OVR_GET(x)
(((x) & 0x20000000) >> 29) |
| 2391 #define PHY_ANALOG_RXTX3_CALPA_OVR_SET(x)
(((x) << 29) & 0x20000000) |
| 2392 #define PHY_ANALOG_RXTX3_TURBOADC_MSB
30 |
| 2393 #define PHY_ANALOG_RXTX3_TURBOADC_LSB
30 |
| 2394 #define PHY_ANALOG_RXTX3_TURBOADC_MASK
0x40000000 |
| 2395 #define PHY_ANALOG_RXTX3_TURBOADC_GET(x)
(((x) & 0x40000000) >> 30) |
| 2396 #define PHY_ANALOG_RXTX3_TURBOADC_SET(x)
(((x) << 30) & 0x40000000) |
| 2397 #define PHY_ANALOG_RXTX3_TURBOADC_OVR_MSB
31 |
| 2398 #define PHY_ANALOG_RXTX3_TURBOADC_OVR_LSB
31 |
| 2399 #define PHY_ANALOG_RXTX3_TURBOADC_OVR_MASK
0x80000000 |
| 2400 #define PHY_ANALOG_RXTX3_TURBOADC_OVR_GET(x)
(((x) & 0x80000000) >> 31) |
| 2401 #define PHY_ANALOG_RXTX3_TURBOADC_OVR_SET(x)
(((x) << 31) & 0x80000000) |
| 2402 |
| 2403 /* macros for BB1 */ |
| 2404 #define PHY_ANALOG_BB1_ADDRESS
0x00000140 |
| 2405 #define PHY_ANALOG_BB1_OFFSET
0x00000140 |
| 2406 #define PHY_ANALOG_BB1_I2V_CURR2X_MSB
0 |
| 2407 #define PHY_ANALOG_BB1_I2V_CURR2X_LSB
0 |
| 2408 #define PHY_ANALOG_BB1_I2V_CURR2X_MASK
0x00000001 |
| 2409 #define PHY_ANALOG_BB1_I2V_CURR2X_GET(x)
(((x) & 0x00000001) >> 0) |
| 2410 #define PHY_ANALOG_BB1_I2V_CURR2X_SET(x)
(((x) << 0) & 0x00000001) |
| 2411 #define PHY_ANALOG_BB1_ENABLE_LOQ_MSB
1 |
| 2412 #define PHY_ANALOG_BB1_ENABLE_LOQ_LSB
1 |
| 2413 #define PHY_ANALOG_BB1_ENABLE_LOQ_MASK
0x00000002 |
| 2414 #define PHY_ANALOG_BB1_ENABLE_LOQ_GET(x)
(((x) & 0x00000002) >> 1) |
| 2415 #define PHY_ANALOG_BB1_ENABLE_LOQ_SET(x)
(((x) << 1) & 0x00000002) |
| 2416 #define PHY_ANALOG_BB1_FORCE_LOQ_MSB
2 |
| 2417 #define PHY_ANALOG_BB1_FORCE_LOQ_LSB
2 |
| 2418 #define PHY_ANALOG_BB1_FORCE_LOQ_MASK
0x00000004 |
| 2419 #define PHY_ANALOG_BB1_FORCE_LOQ_GET(x)
(((x) & 0x00000004) >> 2) |
| 2420 #define PHY_ANALOG_BB1_FORCE_LOQ_SET(x)
(((x) << 2) & 0x00000004) |
| 2421 #define PHY_ANALOG_BB1_ENABLE_NOTCH_MSB
3 |
| 2422 #define PHY_ANALOG_BB1_ENABLE_NOTCH_LSB
3 |
| 2423 #define PHY_ANALOG_BB1_ENABLE_NOTCH_MASK
0x00000008 |
| 2424 #define PHY_ANALOG_BB1_ENABLE_NOTCH_GET(x)
(((x) & 0x00000008) >> 3) |
| 2425 #define PHY_ANALOG_BB1_ENABLE_NOTCH_SET(x)
(((x) << 3) & 0x00000008) |
| 2426 #define PHY_ANALOG_BB1_FORCE_NOTCH_MSB
4 |
| 2427 #define PHY_ANALOG_BB1_FORCE_NOTCH_LSB
4 |
| 2428 #define PHY_ANALOG_BB1_FORCE_NOTCH_MASK
0x00000010 |
| 2429 #define PHY_ANALOG_BB1_FORCE_NOTCH_GET(x)
(((x) & 0x00000010) >> 4) |
| 2430 #define PHY_ANALOG_BB1_FORCE_NOTCH_SET(x)
(((x) << 4) & 0x00000010) |
| 2431 #define PHY_ANALOG_BB1_ENABLE_BIQUAD_MSB
5 |
| 2432 #define PHY_ANALOG_BB1_ENABLE_BIQUAD_LSB
5 |
| 2433 #define PHY_ANALOG_BB1_ENABLE_BIQUAD_MASK
0x00000020 |
| 2434 #define PHY_ANALOG_BB1_ENABLE_BIQUAD_GET(x)
(((x) & 0x00000020) >> 5) |
| 2435 #define PHY_ANALOG_BB1_ENABLE_BIQUAD_SET(x)
(((x) << 5) & 0x00000020) |
| 2436 #define PHY_ANALOG_BB1_FORCE_BIQUAD_MSB
6 |
| 2437 #define PHY_ANALOG_BB1_FORCE_BIQUAD_LSB
6 |
| 2438 #define PHY_ANALOG_BB1_FORCE_BIQUAD_MASK
0x00000040 |
| 2439 #define PHY_ANALOG_BB1_FORCE_BIQUAD_GET(x)
(((x) & 0x00000040) >> 6) |
| 2440 #define PHY_ANALOG_BB1_FORCE_BIQUAD_SET(x)
(((x) << 6) & 0x00000040) |
| 2441 #define PHY_ANALOG_BB1_ENABLE_OSDAC_MSB
7 |
| 2442 #define PHY_ANALOG_BB1_ENABLE_OSDAC_LSB
7 |
| 2443 #define PHY_ANALOG_BB1_ENABLE_OSDAC_MASK
0x00000080 |
| 2444 #define PHY_ANALOG_BB1_ENABLE_OSDAC_GET(x)
(((x) & 0x00000080) >> 7) |
| 2445 #define PHY_ANALOG_BB1_ENABLE_OSDAC_SET(x)
(((x) << 7) & 0x00000080) |
| 2446 #define PHY_ANALOG_BB1_FORCE_OSDAC_MSB
8 |
| 2447 #define PHY_ANALOG_BB1_FORCE_OSDAC_LSB
8 |
| 2448 #define PHY_ANALOG_BB1_FORCE_OSDAC_MASK
0x00000100 |
| 2449 #define PHY_ANALOG_BB1_FORCE_OSDAC_GET(x)
(((x) & 0x00000100) >> 8) |
| 2450 #define PHY_ANALOG_BB1_FORCE_OSDAC_SET(x)
(((x) << 8) & 0x00000100) |
| 2451 #define PHY_ANALOG_BB1_ENABLE_V2I_MSB
9 |
| 2452 #define PHY_ANALOG_BB1_ENABLE_V2I_LSB
9 |
| 2453 #define PHY_ANALOG_BB1_ENABLE_V2I_MASK
0x00000200 |
| 2454 #define PHY_ANALOG_BB1_ENABLE_V2I_GET(x)
(((x) & 0x00000200) >> 9) |
| 2455 #define PHY_ANALOG_BB1_ENABLE_V2I_SET(x)
(((x) << 9) & 0x00000200) |
| 2456 #define PHY_ANALOG_BB1_FORCE_V2I_MSB
10 |
| 2457 #define PHY_ANALOG_BB1_FORCE_V2I_LSB
10 |
| 2458 #define PHY_ANALOG_BB1_FORCE_V2I_MASK
0x00000400 |
| 2459 #define PHY_ANALOG_BB1_FORCE_V2I_GET(x)
(((x) & 0x00000400) >> 10) |
| 2460 #define PHY_ANALOG_BB1_FORCE_V2I_SET(x)
(((x) << 10) & 0x00000400) |
| 2461 #define PHY_ANALOG_BB1_ENABLE_I2V_MSB
11 |
| 2462 #define PHY_ANALOG_BB1_ENABLE_I2V_LSB
11 |
| 2463 #define PHY_ANALOG_BB1_ENABLE_I2V_MASK
0x00000800 |
| 2464 #define PHY_ANALOG_BB1_ENABLE_I2V_GET(x)
(((x) & 0x00000800) >> 11) |
| 2465 #define PHY_ANALOG_BB1_ENABLE_I2V_SET(x)
(((x) << 11) & 0x00000800) |
| 2466 #define PHY_ANALOG_BB1_FORCE_I2V_MSB
12 |
| 2467 #define PHY_ANALOG_BB1_FORCE_I2V_LSB
12 |
| 2468 #define PHY_ANALOG_BB1_FORCE_I2V_MASK
0x00001000 |
| 2469 #define PHY_ANALOG_BB1_FORCE_I2V_GET(x)
(((x) & 0x00001000) >> 12) |
| 2470 #define PHY_ANALOG_BB1_FORCE_I2V_SET(x)
(((x) << 12) & 0x00001000) |
| 2471 #define PHY_ANALOG_BB1_CMSEL_MSB
15 |
| 2472 #define PHY_ANALOG_BB1_CMSEL_LSB
13 |
| 2473 #define PHY_ANALOG_BB1_CMSEL_MASK
0x0000e000 |
| 2474 #define PHY_ANALOG_BB1_CMSEL_GET(x)
(((x) & 0x0000e000) >> 13) |
| 2475 #define PHY_ANALOG_BB1_CMSEL_SET(x)
(((x) << 13) & 0x0000e000) |
| 2476 #define PHY_ANALOG_BB1_ATBSEL_MSB
17 |
| 2477 #define PHY_ANALOG_BB1_ATBSEL_LSB
16 |
| 2478 #define PHY_ANALOG_BB1_ATBSEL_MASK
0x00030000 |
| 2479 #define PHY_ANALOG_BB1_ATBSEL_GET(x)
(((x) & 0x00030000) >> 16) |
| 2480 #define PHY_ANALOG_BB1_ATBSEL_SET(x)
(((x) << 16) & 0x00030000) |
| 2481 #define PHY_ANALOG_BB1_PD_OSDAC_CALTX_CALPA_MSB
18 |
| 2482 #define PHY_ANALOG_BB1_PD_OSDAC_CALTX_CALPA_LSB
18 |
| 2483 #define PHY_ANALOG_BB1_PD_OSDAC_CALTX_CALPA_MASK
0x00040000 |
| 2484 #define PHY_ANALOG_BB1_PD_OSDAC_CALTX_CALPA_GET(x)
(((x) & 0x00040000) >> 18) |
| 2485 #define PHY_ANALOG_BB1_PD_OSDAC_CALTX_CALPA_SET(x)
(((x) << 18) & 0x00040000) |
| 2486 #define PHY_ANALOG_BB1_OFSTCORRI2VQ_MSB
23 |
| 2487 #define PHY_ANALOG_BB1_OFSTCORRI2VQ_LSB
19 |
| 2488 #define PHY_ANALOG_BB1_OFSTCORRI2VQ_MASK
0x00f80000 |
| 2489 #define PHY_ANALOG_BB1_OFSTCORRI2VQ_GET(x)
(((x) & 0x00f80000) >> 19) |
| 2490 #define PHY_ANALOG_BB1_OFSTCORRI2VQ_SET(x)
(((x) << 19) & 0x00f80000) |
| 2491 #define PHY_ANALOG_BB1_OFSTCORRI2VI_MSB
28 |
| 2492 #define PHY_ANALOG_BB1_OFSTCORRI2VI_LSB
24 |
| 2493 #define PHY_ANALOG_BB1_OFSTCORRI2VI_MASK
0x1f000000 |
| 2494 #define PHY_ANALOG_BB1_OFSTCORRI2VI_GET(x)
(((x) & 0x1f000000) >> 24) |
| 2495 #define PHY_ANALOG_BB1_OFSTCORRI2VI_SET(x)
(((x) << 24) & 0x1f000000) |
| 2496 #define PHY_ANALOG_BB1_LOCALOFFSET_MSB
29 |
| 2497 #define PHY_ANALOG_BB1_LOCALOFFSET_LSB
29 |
| 2498 #define PHY_ANALOG_BB1_LOCALOFFSET_MASK
0x20000000 |
| 2499 #define PHY_ANALOG_BB1_LOCALOFFSET_GET(x)
(((x) & 0x20000000) >> 29) |
| 2500 #define PHY_ANALOG_BB1_LOCALOFFSET_SET(x)
(((x) << 29) & 0x20000000) |
| 2501 #define PHY_ANALOG_BB1_RANGE_OSDAC_MSB
31 |
| 2502 #define PHY_ANALOG_BB1_RANGE_OSDAC_LSB
30 |
| 2503 #define PHY_ANALOG_BB1_RANGE_OSDAC_MASK
0xc0000000 |
| 2504 #define PHY_ANALOG_BB1_RANGE_OSDAC_GET(x)
(((x) & 0xc0000000) >> 30) |
| 2505 #define PHY_ANALOG_BB1_RANGE_OSDAC_SET(x)
(((x) << 30) & 0xc0000000) |
| 2506 |
| 2507 /* macros for BB2 */ |
| 2508 #define PHY_ANALOG_BB2_ADDRESS
0x00000144 |
| 2509 #define PHY_ANALOG_BB2_OFFSET
0x00000144 |
| 2510 #define PHY_ANALOG_BB2_SPARE_MSB
3 |
| 2511 #define PHY_ANALOG_BB2_SPARE_LSB
0 |
| 2512 #define PHY_ANALOG_BB2_SPARE_MASK
0x0000000f |
| 2513 #define PHY_ANALOG_BB2_SPARE_GET(x)
(((x) & 0x0000000f) >> 0) |
| 2514 #define PHY_ANALOG_BB2_SPARE_SET(x)
(((x) << 0) & 0x0000000f) |
| 2515 #define PHY_ANALOG_BB2_MXR_HIGHGAINMASK_MSB
7 |
| 2516 #define PHY_ANALOG_BB2_MXR_HIGHGAINMASK_LSB
4 |
| 2517 #define PHY_ANALOG_BB2_MXR_HIGHGAINMASK_MASK
0x000000f0 |
| 2518 #define PHY_ANALOG_BB2_MXR_HIGHGAINMASK_GET(x)
(((x) & 0x000000f0) >> 4) |
| 2519 #define PHY_ANALOG_BB2_MXR_HIGHGAINMASK_SET(x)
(((x) << 4) & 0x000000f0) |
| 2520 #define PHY_ANALOG_BB2_SEL_TEST_MSB
9 |
| 2521 #define PHY_ANALOG_BB2_SEL_TEST_LSB
8 |
| 2522 #define PHY_ANALOG_BB2_SEL_TEST_MASK
0x00000300 |
| 2523 #define PHY_ANALOG_BB2_SEL_TEST_GET(x)
(((x) & 0x00000300) >> 8) |
| 2524 #define PHY_ANALOG_BB2_SEL_TEST_SET(x)
(((x) << 8) & 0x00000300) |
| 2525 #define PHY_ANALOG_BB2_RCFILTER_CAP_MSB
14 |
| 2526 #define PHY_ANALOG_BB2_RCFILTER_CAP_LSB
10 |
| 2527 #define PHY_ANALOG_BB2_RCFILTER_CAP_MASK
0x00007c00 |
| 2528 #define PHY_ANALOG_BB2_RCFILTER_CAP_GET(x)
(((x) & 0x00007c00) >> 10) |
| 2529 #define PHY_ANALOG_BB2_RCFILTER_CAP_SET(x)
(((x) << 10) & 0x00007c00) |
| 2530 #define PHY_ANALOG_BB2_OVERRIDE_RCFILTER_CAP_MSB
15 |
| 2531 #define PHY_ANALOG_BB2_OVERRIDE_RCFILTER_CAP_LSB
15 |
| 2532 #define PHY_ANALOG_BB2_OVERRIDE_RCFILTER_CAP_MASK
0x00008000 |
| 2533 #define PHY_ANALOG_BB2_OVERRIDE_RCFILTER_CAP_GET(x)
(((x) & 0x00008000) >> 15) |
| 2534 #define PHY_ANALOG_BB2_OVERRIDE_RCFILTER_CAP_SET(x)
(((x) << 15) & 0x00008000) |
| 2535 #define PHY_ANALOG_BB2_FNOTCH_MSB
19 |
| 2536 #define PHY_ANALOG_BB2_FNOTCH_LSB
16 |
| 2537 #define PHY_ANALOG_BB2_FNOTCH_MASK
0x000f0000 |
| 2538 #define PHY_ANALOG_BB2_FNOTCH_GET(x)
(((x) & 0x000f0000) >> 16) |
| 2539 #define PHY_ANALOG_BB2_FNOTCH_SET(x)
(((x) << 16) & 0x000f0000) |
| 2540 #define PHY_ANALOG_BB2_OVERRIDE_FNOTCH_MSB
20 |
| 2541 #define PHY_ANALOG_BB2_OVERRIDE_FNOTCH_LSB
20 |
| 2542 #define PHY_ANALOG_BB2_OVERRIDE_FNOTCH_MASK
0x00100000 |
| 2543 #define PHY_ANALOG_BB2_OVERRIDE_FNOTCH_GET(x)
(((x) & 0x00100000) >> 20) |
| 2544 #define PHY_ANALOG_BB2_OVERRIDE_FNOTCH_SET(x)
(((x) << 20) & 0x00100000) |
| 2545 #define PHY_ANALOG_BB2_FILTERFC_MSB
25 |
| 2546 #define PHY_ANALOG_BB2_FILTERFC_LSB
21 |
| 2547 #define PHY_ANALOG_BB2_FILTERFC_MASK
0x03e00000 |
| 2548 #define PHY_ANALOG_BB2_FILTERFC_GET(x)
(((x) & 0x03e00000) >> 21) |
| 2549 #define PHY_ANALOG_BB2_FILTERFC_SET(x)
(((x) << 21) & 0x03e00000) |
| 2550 #define PHY_ANALOG_BB2_OVERRIDE_FILTERFC_MSB
26 |
| 2551 #define PHY_ANALOG_BB2_OVERRIDE_FILTERFC_LSB
26 |
| 2552 #define PHY_ANALOG_BB2_OVERRIDE_FILTERFC_MASK
0x04000000 |
| 2553 #define PHY_ANALOG_BB2_OVERRIDE_FILTERFC_GET(x)
(((x) & 0x04000000) >> 26) |
| 2554 #define PHY_ANALOG_BB2_OVERRIDE_FILTERFC_SET(x)
(((x) << 26) & 0x04000000) |
| 2555 #define PHY_ANALOG_BB2_I2V2RXOUT_EN_MSB
27 |
| 2556 #define PHY_ANALOG_BB2_I2V2RXOUT_EN_LSB
27 |
| 2557 #define PHY_ANALOG_BB2_I2V2RXOUT_EN_MASK
0x08000000 |
| 2558 #define PHY_ANALOG_BB2_I2V2RXOUT_EN_GET(x)
(((x) & 0x08000000) >> 27) |
| 2559 #define PHY_ANALOG_BB2_I2V2RXOUT_EN_SET(x)
(((x) << 27) & 0x08000000) |
| 2560 #define PHY_ANALOG_BB2_BQ2RXOUT_EN_MSB
28 |
| 2561 #define PHY_ANALOG_BB2_BQ2RXOUT_EN_LSB
28 |
| 2562 #define PHY_ANALOG_BB2_BQ2RXOUT_EN_MASK
0x10000000 |
| 2563 #define PHY_ANALOG_BB2_BQ2RXOUT_EN_GET(x)
(((x) & 0x10000000) >> 28) |
| 2564 #define PHY_ANALOG_BB2_BQ2RXOUT_EN_SET(x)
(((x) << 28) & 0x10000000) |
| 2565 #define PHY_ANALOG_BB2_RXIN2I2V_EN_MSB
29 |
| 2566 #define PHY_ANALOG_BB2_RXIN2I2V_EN_LSB
29 |
| 2567 #define PHY_ANALOG_BB2_RXIN2I2V_EN_MASK
0x20000000 |
| 2568 #define PHY_ANALOG_BB2_RXIN2I2V_EN_GET(x)
(((x) & 0x20000000) >> 29) |
| 2569 #define PHY_ANALOG_BB2_RXIN2I2V_EN_SET(x)
(((x) << 29) & 0x20000000) |
| 2570 #define PHY_ANALOG_BB2_RXIN2BQ_EN_MSB
30 |
| 2571 #define PHY_ANALOG_BB2_RXIN2BQ_EN_LSB
30 |
| 2572 #define PHY_ANALOG_BB2_RXIN2BQ_EN_MASK
0x40000000 |
| 2573 #define PHY_ANALOG_BB2_RXIN2BQ_EN_GET(x)
(((x) & 0x40000000) >> 30) |
| 2574 #define PHY_ANALOG_BB2_RXIN2BQ_EN_SET(x)
(((x) << 30) & 0x40000000) |
| 2575 #define PHY_ANALOG_BB2_SWITCH_OVERRIDE_MSB
31 |
| 2576 #define PHY_ANALOG_BB2_SWITCH_OVERRIDE_LSB
31 |
| 2577 #define PHY_ANALOG_BB2_SWITCH_OVERRIDE_MASK
0x80000000 |
| 2578 #define PHY_ANALOG_BB2_SWITCH_OVERRIDE_GET(x)
(((x) & 0x80000000) >> 31) |
| 2579 #define PHY_ANALOG_BB2_SWITCH_OVERRIDE_SET(x)
(((x) << 31) & 0x80000000) |
| 2580 |
| 2581 /* macros for BB3 */ |
| 2582 #define PHY_ANALOG_BB3_ADDRESS
0x00000148 |
| 2583 #define PHY_ANALOG_BB3_OFFSET
0x00000148 |
| 2584 #define PHY_ANALOG_BB3_SPARE_MSB
15 |
| 2585 #define PHY_ANALOG_BB3_SPARE_LSB
0 |
| 2586 #define PHY_ANALOG_BB3_SPARE_MASK
0x0000ffff |
| 2587 #define PHY_ANALOG_BB3_SPARE_GET(x)
(((x) & 0x0000ffff) >> 0) |
| 2588 #define PHY_ANALOG_BB3_SPARE_SET(x)
(((x) << 0) & 0x0000ffff) |
| 2589 #define PHY_ANALOG_BB3_FILTERFC_MSB
20 |
| 2590 #define PHY_ANALOG_BB3_FILTERFC_LSB
16 |
| 2591 #define PHY_ANALOG_BB3_FILTERFC_MASK
0x001f0000 |
| 2592 #define PHY_ANALOG_BB3_FILTERFC_GET(x)
(((x) & 0x001f0000) >> 16) |
| 2593 #define PHY_ANALOG_BB3_OFSTCORRI2VQ_MSB
25 |
| 2594 #define PHY_ANALOG_BB3_OFSTCORRI2VQ_LSB
21 |
| 2595 #define PHY_ANALOG_BB3_OFSTCORRI2VQ_MASK
0x03e00000 |
| 2596 #define PHY_ANALOG_BB3_OFSTCORRI2VQ_GET(x)
(((x) & 0x03e00000) >> 21) |
| 2597 #define PHY_ANALOG_BB3_OFSTCORRI2VI_MSB
30 |
| 2598 #define PHY_ANALOG_BB3_OFSTCORRI2VI_LSB
26 |
| 2599 #define PHY_ANALOG_BB3_OFSTCORRI2VI_MASK
0x7c000000 |
| 2600 #define PHY_ANALOG_BB3_OFSTCORRI2VI_GET(x)
(((x) & 0x7c000000) >> 26) |
| 2601 #define PHY_ANALOG_BB3_EN_TXBBCONSTCUR_MSB
31 |
| 2602 #define PHY_ANALOG_BB3_EN_TXBBCONSTCUR_LSB
31 |
| 2603 #define PHY_ANALOG_BB3_EN_TXBBCONSTCUR_MASK
0x80000000 |
| 2604 #define PHY_ANALOG_BB3_EN_TXBBCONSTCUR_GET(x)
(((x) & 0x80000000) >> 31) |
| 2605 #define PHY_ANALOG_BB3_EN_TXBBCONSTCUR_SET(x)
(((x) << 31) & 0x80000000) |
| 2606 |
| 2607 /* macros for PLLCLKMODA */ |
| 2608 #define PHY_ANALOG_PLLCLKMODA_ADDRESS
0x00000280 |
| 2609 #define PHY_ANALOG_PLLCLKMODA_OFFSET
0x00000280 |
| 2610 #define PHY_ANALOG_PLLCLKMODA_PWD_PLLSDM_MSB
0 |
| 2611 #define PHY_ANALOG_PLLCLKMODA_PWD_PLLSDM_LSB
0 |
| 2612 #define PHY_ANALOG_PLLCLKMODA_PWD_PLLSDM_MASK
0x00000001 |
| 2613 #define PHY_ANALOG_PLLCLKMODA_PWD_PLLSDM_GET(x)
(((x) & 0x00000001) >> 0) |
| 2614 #define PHY_ANALOG_PLLCLKMODA_PWD_PLLSDM_SET(x)
(((x) << 0) & 0x00000001) |
| 2615 #define PHY_ANALOG_PLLCLKMODA_PWDPLL_MSB
1 |
| 2616 #define PHY_ANALOG_PLLCLKMODA_PWDPLL_LSB
1 |
| 2617 #define PHY_ANALOG_PLLCLKMODA_PWDPLL_MASK
0x00000002 |
| 2618 #define PHY_ANALOG_PLLCLKMODA_PWDPLL_GET(x)
(((x) & 0x00000002) >> 1) |
| 2619 #define PHY_ANALOG_PLLCLKMODA_PWDPLL_SET(x)
(((x) << 1) & 0x00000002) |
| 2620 #define PHY_ANALOG_PLLCLKMODA_PLLFRAC_MSB
16 |
| 2621 #define PHY_ANALOG_PLLCLKMODA_PLLFRAC_LSB
2 |
| 2622 #define PHY_ANALOG_PLLCLKMODA_PLLFRAC_MASK
0x0001fffc |
| 2623 #define PHY_ANALOG_PLLCLKMODA_PLLFRAC_GET(x)
(((x) & 0x0001fffc) >> 2) |
| 2624 #define PHY_ANALOG_PLLCLKMODA_PLLFRAC_SET(x)
(((x) << 2) & 0x0001fffc) |
| 2625 #define PHY_ANALOG_PLLCLKMODA_REFDIV_MSB
20 |
| 2626 #define PHY_ANALOG_PLLCLKMODA_REFDIV_LSB
17 |
| 2627 #define PHY_ANALOG_PLLCLKMODA_REFDIV_MASK
0x001e0000 |
| 2628 #define PHY_ANALOG_PLLCLKMODA_REFDIV_GET(x)
(((x) & 0x001e0000) >> 17) |
| 2629 #define PHY_ANALOG_PLLCLKMODA_REFDIV_SET(x)
(((x) << 17) & 0x001e0000) |
| 2630 #define PHY_ANALOG_PLLCLKMODA_DIV_MSB
30 |
| 2631 #define PHY_ANALOG_PLLCLKMODA_DIV_LSB
21 |
| 2632 #define PHY_ANALOG_PLLCLKMODA_DIV_MASK
0x7fe00000 |
| 2633 #define PHY_ANALOG_PLLCLKMODA_DIV_GET(x)
(((x) & 0x7fe00000) >> 21) |
| 2634 #define PHY_ANALOG_PLLCLKMODA_DIV_SET(x)
(((x) << 21) & 0x7fe00000) |
| 2635 #define PHY_ANALOG_PLLCLKMODA_LOCAL_PLL_MSB
31 |
| 2636 #define PHY_ANALOG_PLLCLKMODA_LOCAL_PLL_LSB
31 |
| 2637 #define PHY_ANALOG_PLLCLKMODA_LOCAL_PLL_MASK
0x80000000 |
| 2638 #define PHY_ANALOG_PLLCLKMODA_LOCAL_PLL_GET(x)
(((x) & 0x80000000) >> 31) |
| 2639 #define PHY_ANALOG_PLLCLKMODA_LOCAL_PLL_SET(x)
(((x) << 31) & 0x80000000) |
| 2640 |
| 2641 /* macros for PLLCLKMODA2 */ |
| 2642 #define PHY_ANALOG_PLLCLKMODA2_ADDRESS
0x00000284 |
| 2643 #define PHY_ANALOG_PLLCLKMODA2_OFFSET
0x00000284 |
| 2644 #define PHY_ANALOG_PLLCLKMODA2_SPARE_MSB
3 |
| 2645 #define PHY_ANALOG_PLLCLKMODA2_SPARE_LSB
0 |
| 2646 #define PHY_ANALOG_PLLCLKMODA2_SPARE_MASK
0x0000000f |
| 2647 #define PHY_ANALOG_PLLCLKMODA2_SPARE_GET(x)
(((x) & 0x0000000f) >> 0) |
| 2648 #define PHY_ANALOG_PLLCLKMODA2_SPARE_SET(x)
(((x) << 0) & 0x0000000f) |
| 2649 #define PHY_ANALOG_PLLCLKMODA2_DACPWD_MSB
4 |
| 2650 #define PHY_ANALOG_PLLCLKMODA2_DACPWD_LSB
4 |
| 2651 #define PHY_ANALOG_PLLCLKMODA2_DACPWD_MASK
0x00000010 |
| 2652 #define PHY_ANALOG_PLLCLKMODA2_DACPWD_GET(x)
(((x) & 0x00000010) >> 4) |
| 2653 #define PHY_ANALOG_PLLCLKMODA2_DACPWD_SET(x)
(((x) << 4) & 0x00000010) |
| 2654 #define PHY_ANALOG_PLLCLKMODA2_ADCPWD_MSB
5 |
| 2655 #define PHY_ANALOG_PLLCLKMODA2_ADCPWD_LSB
5 |
| 2656 #define PHY_ANALOG_PLLCLKMODA2_ADCPWD_MASK
0x00000020 |
| 2657 #define PHY_ANALOG_PLLCLKMODA2_ADCPWD_GET(x)
(((x) & 0x00000020) >> 5) |
| 2658 #define PHY_ANALOG_PLLCLKMODA2_ADCPWD_SET(x)
(((x) << 5) & 0x00000020) |
| 2659 #define PHY_ANALOG_PLLCLKMODA2_LOCAL_ADDAC_MSB
6 |
| 2660 #define PHY_ANALOG_PLLCLKMODA2_LOCAL_ADDAC_LSB
6 |
| 2661 #define PHY_ANALOG_PLLCLKMODA2_LOCAL_ADDAC_MASK
0x00000040 |
| 2662 #define PHY_ANALOG_PLLCLKMODA2_LOCAL_ADDAC_GET(x)
(((x) & 0x00000040) >> 6) |
| 2663 #define PHY_ANALOG_PLLCLKMODA2_LOCAL_ADDAC_SET(x)
(((x) << 6) & 0x00000040) |
| 2664 #define PHY_ANALOG_PLLCLKMODA2_DAC_CLK_SEL_MSB
8 |
| 2665 #define PHY_ANALOG_PLLCLKMODA2_DAC_CLK_SEL_LSB
7 |
| 2666 #define PHY_ANALOG_PLLCLKMODA2_DAC_CLK_SEL_MASK
0x00000180 |
| 2667 #define PHY_ANALOG_PLLCLKMODA2_DAC_CLK_SEL_GET(x)
(((x) & 0x00000180) >> 7) |
| 2668 #define PHY_ANALOG_PLLCLKMODA2_DAC_CLK_SEL_SET(x)
(((x) << 7) & 0x00000180) |
| 2669 #define PHY_ANALOG_PLLCLKMODA2_ADC_CLK_SEL_MSB
12 |
| 2670 #define PHY_ANALOG_PLLCLKMODA2_ADC_CLK_SEL_LSB
9 |
| 2671 #define PHY_ANALOG_PLLCLKMODA2_ADC_CLK_SEL_MASK
0x00001e00 |
| 2672 #define PHY_ANALOG_PLLCLKMODA2_ADC_CLK_SEL_GET(x)
(((x) & 0x00001e00) >> 9) |
| 2673 #define PHY_ANALOG_PLLCLKMODA2_ADC_CLK_SEL_SET(x)
(((x) << 9) & 0x00001e00) |
| 2674 #define PHY_ANALOG_PLLCLKMODA2_LOCAL_CLKMODA_MSB
13 |
| 2675 #define PHY_ANALOG_PLLCLKMODA2_LOCAL_CLKMODA_LSB
13 |
| 2676 #define PHY_ANALOG_PLLCLKMODA2_LOCAL_CLKMODA_MASK
0x00002000 |
| 2677 #define PHY_ANALOG_PLLCLKMODA2_LOCAL_CLKMODA_GET(x)
(((x) & 0x00002000) >> 13) |
| 2678 #define PHY_ANALOG_PLLCLKMODA2_LOCAL_CLKMODA_SET(x)
(((x) << 13) & 0x00002000) |
| 2679 #define PHY_ANALOG_PLLCLKMODA2_PLLBYPASS_MSB
14 |
| 2680 #define PHY_ANALOG_PLLCLKMODA2_PLLBYPASS_LSB
14 |
| 2681 #define PHY_ANALOG_PLLCLKMODA2_PLLBYPASS_MASK
0x00004000 |
| 2682 #define PHY_ANALOG_PLLCLKMODA2_PLLBYPASS_GET(x)
(((x) & 0x00004000) >> 14) |
| 2683 #define PHY_ANALOG_PLLCLKMODA2_PLLBYPASS_SET(x)
(((x) << 14) & 0x00004000) |
| 2684 #define PHY_ANALOG_PLLCLKMODA2_LOCAL_PLLBYPASS_MSB
15 |
| 2685 #define PHY_ANALOG_PLLCLKMODA2_LOCAL_PLLBYPASS_LSB
15 |
| 2686 #define PHY_ANALOG_PLLCLKMODA2_LOCAL_PLLBYPASS_MASK
0x00008000 |
| 2687 #define PHY_ANALOG_PLLCLKMODA2_LOCAL_PLLBYPASS_GET(x)
(((x) & 0x00008000) >> 15) |
| 2688 #define PHY_ANALOG_PLLCLKMODA2_LOCAL_PLLBYPASS_SET(x)
(((x) << 15) & 0x00008000) |
| 2689 #define PHY_ANALOG_PLLCLKMODA2_PLLATB_MSB
17 |
| 2690 #define PHY_ANALOG_PLLCLKMODA2_PLLATB_LSB
16 |
| 2691 #define PHY_ANALOG_PLLCLKMODA2_PLLATB_MASK
0x00030000 |
| 2692 #define PHY_ANALOG_PLLCLKMODA2_PLLATB_GET(x)
(((x) & 0x00030000) >> 16) |
| 2693 #define PHY_ANALOG_PLLCLKMODA2_PLLATB_SET(x)
(((x) << 16) & 0x00030000) |
| 2694 #define PHY_ANALOG_PLLCLKMODA2_PLL_SVREG_MSB
18 |
| 2695 #define PHY_ANALOG_PLLCLKMODA2_PLL_SVREG_LSB
18 |
| 2696 #define PHY_ANALOG_PLLCLKMODA2_PLL_SVREG_MASK
0x00040000 |
| 2697 #define PHY_ANALOG_PLLCLKMODA2_PLL_SVREG_GET(x)
(((x) & 0x00040000) >> 18) |
| 2698 #define PHY_ANALOG_PLLCLKMODA2_PLL_SVREG_SET(x)
(((x) << 18) & 0x00040000) |
| 2699 #define PHY_ANALOG_PLLCLKMODA2_HI_FREQ_EN_MSB
19 |
| 2700 #define PHY_ANALOG_PLLCLKMODA2_HI_FREQ_EN_LSB
19 |
| 2701 #define PHY_ANALOG_PLLCLKMODA2_HI_FREQ_EN_MASK
0x00080000 |
| 2702 #define PHY_ANALOG_PLLCLKMODA2_HI_FREQ_EN_GET(x)
(((x) & 0x00080000) >> 19) |
| 2703 #define PHY_ANALOG_PLLCLKMODA2_HI_FREQ_EN_SET(x)
(((x) << 19) & 0x00080000) |
| 2704 #define PHY_ANALOG_PLLCLKMODA2_RST_WARM_INT_L_MSB
20 |
| 2705 #define PHY_ANALOG_PLLCLKMODA2_RST_WARM_INT_L_LSB
20 |
| 2706 #define PHY_ANALOG_PLLCLKMODA2_RST_WARM_INT_L_MASK
0x00100000 |
| 2707 #define PHY_ANALOG_PLLCLKMODA2_RST_WARM_INT_L_GET(x)
(((x) & 0x00100000) >> 20) |
| 2708 #define PHY_ANALOG_PLLCLKMODA2_RST_WARM_INT_L_SET(x)
(((x) << 20) & 0x00100000) |
| 2709 #define PHY_ANALOG_PLLCLKMODA2_RST_WARM_OVR_MSB
21 |
| 2710 #define PHY_ANALOG_PLLCLKMODA2_RST_WARM_OVR_LSB
21 |
| 2711 #define PHY_ANALOG_PLLCLKMODA2_RST_WARM_OVR_MASK
0x00200000 |
| 2712 #define PHY_ANALOG_PLLCLKMODA2_RST_WARM_OVR_GET(x)
(((x) & 0x00200000) >> 21) |
| 2713 #define PHY_ANALOG_PLLCLKMODA2_RST_WARM_OVR_SET(x)
(((x) << 21) & 0x00200000) |
| 2714 #define PHY_ANALOG_PLLCLKMODA2_PLL_KVCO_MSB
23 |
| 2715 #define PHY_ANALOG_PLLCLKMODA2_PLL_KVCO_LSB
22 |
| 2716 #define PHY_ANALOG_PLLCLKMODA2_PLL_KVCO_MASK
0x00c00000 |
| 2717 #define PHY_ANALOG_PLLCLKMODA2_PLL_KVCO_GET(x)
(((x) & 0x00c00000) >> 22) |
| 2718 #define PHY_ANALOG_PLLCLKMODA2_PLL_KVCO_SET(x)
(((x) << 22) & 0x00c00000) |
| 2719 #define PHY_ANALOG_PLLCLKMODA2_PLLICP_MSB
26 |
| 2720 #define PHY_ANALOG_PLLCLKMODA2_PLLICP_LSB
24 |
| 2721 #define PHY_ANALOG_PLLCLKMODA2_PLLICP_MASK
0x07000000 |
| 2722 #define PHY_ANALOG_PLLCLKMODA2_PLLICP_GET(x)
(((x) & 0x07000000) >> 24) |
| 2723 #define PHY_ANALOG_PLLCLKMODA2_PLLICP_SET(x)
(((x) << 24) & 0x07000000) |
| 2724 #define PHY_ANALOG_PLLCLKMODA2_PLLFILTER_MSB
31 |
| 2725 #define PHY_ANALOG_PLLCLKMODA2_PLLFILTER_LSB
27 |
| 2726 #define PHY_ANALOG_PLLCLKMODA2_PLLFILTER_MASK
0xf8000000 |
| 2727 #define PHY_ANALOG_PLLCLKMODA2_PLLFILTER_GET(x)
(((x) & 0xf8000000) >> 27) |
| 2728 #define PHY_ANALOG_PLLCLKMODA2_PLLFILTER_SET(x)
(((x) << 27) & 0xf8000000) |
| 2729 |
| 2730 /* macros for TOP */ |
| 2731 #define PHY_ANALOG_TOP_ADDRESS
0x00000288 |
| 2732 #define PHY_ANALOG_TOP_OFFSET
0x00000288 |
| 2733 #define PHY_ANALOG_TOP_SPARE_MSB
2 |
| 2734 #define PHY_ANALOG_TOP_SPARE_LSB
0 |
| 2735 #define PHY_ANALOG_TOP_SPARE_MASK
0x00000007 |
| 2736 #define PHY_ANALOG_TOP_SPARE_GET(x)
(((x) & 0x00000007) >> 0) |
| 2737 #define PHY_ANALOG_TOP_SPARE_SET(x)
(((x) << 0) & 0x00000007) |
| 2738 #define PHY_ANALOG_TOP_PWDBIAS_MSB
3 |
| 2739 #define PHY_ANALOG_TOP_PWDBIAS_LSB
3 |
| 2740 #define PHY_ANALOG_TOP_PWDBIAS_MASK
0x00000008 |
| 2741 #define PHY_ANALOG_TOP_PWDBIAS_GET(x)
(((x) & 0x00000008) >> 3) |
| 2742 #define PHY_ANALOG_TOP_PWDBIAS_SET(x)
(((x) << 3) & 0x00000008) |
| 2743 #define PHY_ANALOG_TOP_FLIP_XPABIAS_MSB
4 |
| 2744 #define PHY_ANALOG_TOP_FLIP_XPABIAS_LSB
4 |
| 2745 #define PHY_ANALOG_TOP_FLIP_XPABIAS_MASK
0x00000010 |
| 2746 #define PHY_ANALOG_TOP_FLIP_XPABIAS_GET(x)
(((x) & 0x00000010) >> 4) |
| 2747 #define PHY_ANALOG_TOP_FLIP_XPABIAS_SET(x)
(((x) << 4) & 0x00000010) |
| 2748 #define PHY_ANALOG_TOP_XPAON2_MSB
5 |
| 2749 #define PHY_ANALOG_TOP_XPAON2_LSB
5 |
| 2750 #define PHY_ANALOG_TOP_XPAON2_MASK
0x00000020 |
| 2751 #define PHY_ANALOG_TOP_XPAON2_GET(x)
(((x) & 0x00000020) >> 5) |
| 2752 #define PHY_ANALOG_TOP_XPAON2_SET(x)
(((x) << 5) & 0x00000020) |
| 2753 #define PHY_ANALOG_TOP_XPAON5_MSB
6 |
| 2754 #define PHY_ANALOG_TOP_XPAON5_LSB
6 |
| 2755 #define PHY_ANALOG_TOP_XPAON5_MASK
0x00000040 |
| 2756 #define PHY_ANALOG_TOP_XPAON5_GET(x)
(((x) & 0x00000040) >> 6) |
| 2757 #define PHY_ANALOG_TOP_XPAON5_SET(x)
(((x) << 6) & 0x00000040) |
| 2758 #define PHY_ANALOG_TOP_XPASHORT2GND_MSB
7 |
| 2759 #define PHY_ANALOG_TOP_XPASHORT2GND_LSB
7 |
| 2760 #define PHY_ANALOG_TOP_XPASHORT2GND_MASK
0x00000080 |
| 2761 #define PHY_ANALOG_TOP_XPASHORT2GND_GET(x)
(((x) & 0x00000080) >> 7) |
| 2762 #define PHY_ANALOG_TOP_XPASHORT2GND_SET(x)
(((x) << 7) & 0x00000080) |
| 2763 #define PHY_ANALOG_TOP_XPABIASLVL_MSB
11 |
| 2764 #define PHY_ANALOG_TOP_XPABIASLVL_LSB
8 |
| 2765 #define PHY_ANALOG_TOP_XPABIASLVL_MASK
0x00000f00 |
| 2766 #define PHY_ANALOG_TOP_XPABIASLVL_GET(x)
(((x) & 0x00000f00) >> 8) |
| 2767 #define PHY_ANALOG_TOP_XPABIASLVL_SET(x)
(((x) << 8) & 0x00000f00) |
| 2768 #define PHY_ANALOG_TOP_XPABIAS_EN_MSB
12 |
| 2769 #define PHY_ANALOG_TOP_XPABIAS_EN_LSB
12 |
| 2770 #define PHY_ANALOG_TOP_XPABIAS_EN_MASK
0x00001000 |
| 2771 #define PHY_ANALOG_TOP_XPABIAS_EN_GET(x)
(((x) & 0x00001000) >> 12) |
| 2772 #define PHY_ANALOG_TOP_XPABIAS_EN_SET(x)
(((x) << 12) & 0x00001000) |
| 2773 #define PHY_ANALOG_TOP_ATBSELECT_MSB
13 |
| 2774 #define PHY_ANALOG_TOP_ATBSELECT_LSB
13 |
| 2775 #define PHY_ANALOG_TOP_ATBSELECT_MASK
0x00002000 |
| 2776 #define PHY_ANALOG_TOP_ATBSELECT_GET(x)
(((x) & 0x00002000) >> 13) |
| 2777 #define PHY_ANALOG_TOP_ATBSELECT_SET(x)
(((x) << 13) & 0x00002000) |
| 2778 #define PHY_ANALOG_TOP_LOCAL_XPA_MSB
14 |
| 2779 #define PHY_ANALOG_TOP_LOCAL_XPA_LSB
14 |
| 2780 #define PHY_ANALOG_TOP_LOCAL_XPA_MASK
0x00004000 |
| 2781 #define PHY_ANALOG_TOP_LOCAL_XPA_GET(x)
(((x) & 0x00004000) >> 14) |
| 2782 #define PHY_ANALOG_TOP_LOCAL_XPA_SET(x)
(((x) << 14) & 0x00004000) |
| 2783 #define PHY_ANALOG_TOP_XPABIAS_BYPASS_MSB
15 |
| 2784 #define PHY_ANALOG_TOP_XPABIAS_BYPASS_LSB
15 |
| 2785 #define PHY_ANALOG_TOP_XPABIAS_BYPASS_MASK
0x00008000 |
| 2786 #define PHY_ANALOG_TOP_XPABIAS_BYPASS_GET(x)
(((x) & 0x00008000) >> 15) |
| 2787 #define PHY_ANALOG_TOP_XPABIAS_BYPASS_SET(x)
(((x) << 15) & 0x00008000) |
| 2788 #define PHY_ANALOG_TOP_TEST_PADQ_EN_MSB
16 |
| 2789 #define PHY_ANALOG_TOP_TEST_PADQ_EN_LSB
16 |
| 2790 #define PHY_ANALOG_TOP_TEST_PADQ_EN_MASK
0x00010000 |
| 2791 #define PHY_ANALOG_TOP_TEST_PADQ_EN_GET(x)
(((x) & 0x00010000) >> 16) |
| 2792 #define PHY_ANALOG_TOP_TEST_PADQ_EN_SET(x)
(((x) << 16) & 0x00010000) |
| 2793 #define PHY_ANALOG_TOP_TEST_PADI_EN_MSB
17 |
| 2794 #define PHY_ANALOG_TOP_TEST_PADI_EN_LSB
17 |
| 2795 #define PHY_ANALOG_TOP_TEST_PADI_EN_MASK
0x00020000 |
| 2796 #define PHY_ANALOG_TOP_TEST_PADI_EN_GET(x)
(((x) & 0x00020000) >> 17) |
| 2797 #define PHY_ANALOG_TOP_TEST_PADI_EN_SET(x)
(((x) << 17) & 0x00020000) |
| 2798 #define PHY_ANALOG_TOP_TESTIQ_RSEL_MSB
18 |
| 2799 #define PHY_ANALOG_TOP_TESTIQ_RSEL_LSB
18 |
| 2800 #define PHY_ANALOG_TOP_TESTIQ_RSEL_MASK
0x00040000 |
| 2801 #define PHY_ANALOG_TOP_TESTIQ_RSEL_GET(x)
(((x) & 0x00040000) >> 18) |
| 2802 #define PHY_ANALOG_TOP_TESTIQ_RSEL_SET(x)
(((x) << 18) & 0x00040000) |
| 2803 #define PHY_ANALOG_TOP_TESTIQ_BUFEN_MSB
19 |
| 2804 #define PHY_ANALOG_TOP_TESTIQ_BUFEN_LSB
19 |
| 2805 #define PHY_ANALOG_TOP_TESTIQ_BUFEN_MASK
0x00080000 |
| 2806 #define PHY_ANALOG_TOP_TESTIQ_BUFEN_GET(x)
(((x) & 0x00080000) >> 19) |
| 2807 #define PHY_ANALOG_TOP_TESTIQ_BUFEN_SET(x)
(((x) << 19) & 0x00080000) |
| 2808 #define PHY_ANALOG_TOP_PAD2GND_MSB
20 |
| 2809 #define PHY_ANALOG_TOP_PAD2GND_LSB
20 |
| 2810 #define PHY_ANALOG_TOP_PAD2GND_MASK
0x00100000 |
| 2811 #define PHY_ANALOG_TOP_PAD2GND_GET(x)
(((x) & 0x00100000) >> 20) |
| 2812 #define PHY_ANALOG_TOP_PAD2GND_SET(x)
(((x) << 20) & 0x00100000) |
| 2813 #define PHY_ANALOG_TOP_INTH2PAD_MSB
21 |
| 2814 #define PHY_ANALOG_TOP_INTH2PAD_LSB
21 |
| 2815 #define PHY_ANALOG_TOP_INTH2PAD_MASK
0x00200000 |
| 2816 #define PHY_ANALOG_TOP_INTH2PAD_GET(x)
(((x) & 0x00200000) >> 21) |
| 2817 #define PHY_ANALOG_TOP_INTH2PAD_SET(x)
(((x) << 21) & 0x00200000) |
| 2818 #define PHY_ANALOG_TOP_INTH2GND_MSB
22 |
| 2819 #define PHY_ANALOG_TOP_INTH2GND_LSB
22 |
| 2820 #define PHY_ANALOG_TOP_INTH2GND_MASK
0x00400000 |
| 2821 #define PHY_ANALOG_TOP_INTH2GND_GET(x)
(((x) & 0x00400000) >> 22) |
| 2822 #define PHY_ANALOG_TOP_INTH2GND_SET(x)
(((x) << 22) & 0x00400000) |
| 2823 #define PHY_ANALOG_TOP_INT2PAD_MSB
23 |
| 2824 #define PHY_ANALOG_TOP_INT2PAD_LSB
23 |
| 2825 #define PHY_ANALOG_TOP_INT2PAD_MASK
0x00800000 |
| 2826 #define PHY_ANALOG_TOP_INT2PAD_GET(x)
(((x) & 0x00800000) >> 23) |
| 2827 #define PHY_ANALOG_TOP_INT2PAD_SET(x)
(((x) << 23) & 0x00800000) |
| 2828 #define PHY_ANALOG_TOP_INT2GND_MSB
24 |
| 2829 #define PHY_ANALOG_TOP_INT2GND_LSB
24 |
| 2830 #define PHY_ANALOG_TOP_INT2GND_MASK
0x01000000 |
| 2831 #define PHY_ANALOG_TOP_INT2GND_GET(x)
(((x) & 0x01000000) >> 24) |
| 2832 #define PHY_ANALOG_TOP_INT2GND_SET(x)
(((x) << 24) & 0x01000000) |
| 2833 #define PHY_ANALOG_TOP_PWDPALCLK_MSB
25 |
| 2834 #define PHY_ANALOG_TOP_PWDPALCLK_LSB
25 |
| 2835 #define PHY_ANALOG_TOP_PWDPALCLK_MASK
0x02000000 |
| 2836 #define PHY_ANALOG_TOP_PWDPALCLK_GET(x)
(((x) & 0x02000000) >> 25) |
| 2837 #define PHY_ANALOG_TOP_PWDPALCLK_SET(x)
(((x) << 25) & 0x02000000) |
| 2838 #define PHY_ANALOG_TOP_INV_CLK320_ADC_MSB
26 |
| 2839 #define PHY_ANALOG_TOP_INV_CLK320_ADC_LSB
26 |
| 2840 #define PHY_ANALOG_TOP_INV_CLK320_ADC_MASK
0x04000000 |
| 2841 #define PHY_ANALOG_TOP_INV_CLK320_ADC_GET(x)
(((x) & 0x04000000) >> 26) |
| 2842 #define PHY_ANALOG_TOP_INV_CLK320_ADC_SET(x)
(((x) << 26) & 0x04000000) |
| 2843 #define PHY_ANALOG_TOP_FLIP_REFCLK40_MSB
27 |
| 2844 #define PHY_ANALOG_TOP_FLIP_REFCLK40_LSB
27 |
| 2845 #define PHY_ANALOG_TOP_FLIP_REFCLK40_MASK
0x08000000 |
| 2846 #define PHY_ANALOG_TOP_FLIP_REFCLK40_GET(x)
(((x) & 0x08000000) >> 27) |
| 2847 #define PHY_ANALOG_TOP_FLIP_REFCLK40_SET(x)
(((x) << 27) & 0x08000000) |
| 2848 #define PHY_ANALOG_TOP_FLIP_PLLCLK320_MSB
28 |
| 2849 #define PHY_ANALOG_TOP_FLIP_PLLCLK320_LSB
28 |
| 2850 #define PHY_ANALOG_TOP_FLIP_PLLCLK320_MASK
0x10000000 |
| 2851 #define PHY_ANALOG_TOP_FLIP_PLLCLK320_GET(x)
(((x) & 0x10000000) >> 28) |
| 2852 #define PHY_ANALOG_TOP_FLIP_PLLCLK320_SET(x)
(((x) << 28) & 0x10000000) |
| 2853 #define PHY_ANALOG_TOP_FLIP_PLLCLK160_MSB
29 |
| 2854 #define PHY_ANALOG_TOP_FLIP_PLLCLK160_LSB
29 |
| 2855 #define PHY_ANALOG_TOP_FLIP_PLLCLK160_MASK
0x20000000 |
| 2856 #define PHY_ANALOG_TOP_FLIP_PLLCLK160_GET(x)
(((x) & 0x20000000) >> 29) |
| 2857 #define PHY_ANALOG_TOP_FLIP_PLLCLK160_SET(x)
(((x) << 29) & 0x20000000) |
| 2858 #define PHY_ANALOG_TOP_CLK_SEL_MSB
31 |
| 2859 #define PHY_ANALOG_TOP_CLK_SEL_LSB
30 |
| 2860 #define PHY_ANALOG_TOP_CLK_SEL_MASK
0xc0000000 |
| 2861 #define PHY_ANALOG_TOP_CLK_SEL_GET(x)
(((x) & 0xc0000000) >> 30) |
| 2862 #define PHY_ANALOG_TOP_CLK_SEL_SET(x)
(((x) << 30) & 0xc0000000) |
| 2863 |
| 2864 /* macros for THERM */ |
| 2865 #define PHY_ANALOG_THERM_ADDRESS
0x0000028c |
| 2866 #define PHY_ANALOG_THERM_OFFSET
0x0000028c |
| 2867 #define PHY_ANALOG_THERM_LOREG_LVL_MSB
2 |
| 2868 #define PHY_ANALOG_THERM_LOREG_LVL_LSB
0 |
| 2869 #define PHY_ANALOG_THERM_LOREG_LVL_MASK
0x00000007 |
| 2870 #define PHY_ANALOG_THERM_LOREG_LVL_GET(x)
(((x) & 0x00000007) >> 0) |
| 2871 #define PHY_ANALOG_THERM_LOREG_LVL_SET(x)
(((x) << 0) & 0x00000007) |
| 2872 #define PHY_ANALOG_THERM_RFREG_LVL_MSB
5 |
| 2873 #define PHY_ANALOG_THERM_RFREG_LVL_LSB
3 |
| 2874 #define PHY_ANALOG_THERM_RFREG_LVL_MASK
0x00000038 |
| 2875 #define PHY_ANALOG_THERM_RFREG_LVL_GET(x)
(((x) & 0x00000038) >> 3) |
| 2876 #define PHY_ANALOG_THERM_RFREG_LVL_SET(x)
(((x) << 3) & 0x00000038) |
| 2877 #define PHY_ANALOG_THERM_SAR_ADC_DONE_MSB
6 |
| 2878 #define PHY_ANALOG_THERM_SAR_ADC_DONE_LSB
6 |
| 2879 #define PHY_ANALOG_THERM_SAR_ADC_DONE_MASK
0x00000040 |
| 2880 #define PHY_ANALOG_THERM_SAR_ADC_DONE_GET(x)
(((x) & 0x00000040) >> 6) |
| 2881 #define PHY_ANALOG_THERM_SAR_ADC_OUT_MSB
14 |
| 2882 #define PHY_ANALOG_THERM_SAR_ADC_OUT_LSB
7 |
| 2883 #define PHY_ANALOG_THERM_SAR_ADC_OUT_MASK
0x00007f80 |
| 2884 #define PHY_ANALOG_THERM_SAR_ADC_OUT_GET(x)
(((x) & 0x00007f80) >> 7) |
| 2885 #define PHY_ANALOG_THERM_SAR_DACTEST_CODE_MSB
22 |
| 2886 #define PHY_ANALOG_THERM_SAR_DACTEST_CODE_LSB
15 |
| 2887 #define PHY_ANALOG_THERM_SAR_DACTEST_CODE_MASK
0x007f8000 |
| 2888 #define PHY_ANALOG_THERM_SAR_DACTEST_CODE_GET(x)
(((x) & 0x007f8000) >> 15) |
| 2889 #define PHY_ANALOG_THERM_SAR_DACTEST_CODE_SET(x)
(((x) << 15) & 0x007f8000) |
| 2890 #define PHY_ANALOG_THERM_SAR_DACTEST_EN_MSB
23 |
| 2891 #define PHY_ANALOG_THERM_SAR_DACTEST_EN_LSB
23 |
| 2892 #define PHY_ANALOG_THERM_SAR_DACTEST_EN_MASK
0x00800000 |
| 2893 #define PHY_ANALOG_THERM_SAR_DACTEST_EN_GET(x)
(((x) & 0x00800000) >> 23) |
| 2894 #define PHY_ANALOG_THERM_SAR_DACTEST_EN_SET(x)
(((x) << 23) & 0x00800000) |
| 2895 #define PHY_ANALOG_THERM_SAR_ADCCAL_EN_MSB
24 |
| 2896 #define PHY_ANALOG_THERM_SAR_ADCCAL_EN_LSB
24 |
| 2897 #define PHY_ANALOG_THERM_SAR_ADCCAL_EN_MASK
0x01000000 |
| 2898 #define PHY_ANALOG_THERM_SAR_ADCCAL_EN_GET(x)
(((x) & 0x01000000) >> 24) |
| 2899 #define PHY_ANALOG_THERM_SAR_ADCCAL_EN_SET(x)
(((x) << 24) & 0x01000000) |
| 2900 #define PHY_ANALOG_THERM_THERMSEL_MSB
26 |
| 2901 #define PHY_ANALOG_THERM_THERMSEL_LSB
25 |
| 2902 #define PHY_ANALOG_THERM_THERMSEL_MASK
0x06000000 |
| 2903 #define PHY_ANALOG_THERM_THERMSEL_GET(x)
(((x) & 0x06000000) >> 25) |
| 2904 #define PHY_ANALOG_THERM_THERMSEL_SET(x)
(((x) << 25) & 0x06000000) |
| 2905 #define PHY_ANALOG_THERM_SAR_SLOW_EN_MSB
27 |
| 2906 #define PHY_ANALOG_THERM_SAR_SLOW_EN_LSB
27 |
| 2907 #define PHY_ANALOG_THERM_SAR_SLOW_EN_MASK
0x08000000 |
| 2908 #define PHY_ANALOG_THERM_SAR_SLOW_EN_GET(x)
(((x) & 0x08000000) >> 27) |
| 2909 #define PHY_ANALOG_THERM_SAR_SLOW_EN_SET(x)
(((x) << 27) & 0x08000000) |
| 2910 #define PHY_ANALOG_THERM_THERMSTART_MSB
28 |
| 2911 #define PHY_ANALOG_THERM_THERMSTART_LSB
28 |
| 2912 #define PHY_ANALOG_THERM_THERMSTART_MASK
0x10000000 |
| 2913 #define PHY_ANALOG_THERM_THERMSTART_GET(x)
(((x) & 0x10000000) >> 28) |
| 2914 #define PHY_ANALOG_THERM_THERMSTART_SET(x)
(((x) << 28) & 0x10000000) |
| 2915 #define PHY_ANALOG_THERM_SAR_AUTOPWD_EN_MSB
29 |
| 2916 #define PHY_ANALOG_THERM_SAR_AUTOPWD_EN_LSB
29 |
| 2917 #define PHY_ANALOG_THERM_SAR_AUTOPWD_EN_MASK
0x20000000 |
| 2918 #define PHY_ANALOG_THERM_SAR_AUTOPWD_EN_GET(x)
(((x) & 0x20000000) >> 29) |
| 2919 #define PHY_ANALOG_THERM_SAR_AUTOPWD_EN_SET(x)
(((x) << 29) & 0x20000000) |
| 2920 #define PHY_ANALOG_THERM_THERMON_MSB
30 |
| 2921 #define PHY_ANALOG_THERM_THERMON_LSB
30 |
| 2922 #define PHY_ANALOG_THERM_THERMON_MASK
0x40000000 |
| 2923 #define PHY_ANALOG_THERM_THERMON_GET(x)
(((x) & 0x40000000) >> 30) |
| 2924 #define PHY_ANALOG_THERM_THERMON_SET(x)
(((x) << 30) & 0x40000000) |
| 2925 #define PHY_ANALOG_THERM_LOCAL_THERM_MSB
31 |
| 2926 #define PHY_ANALOG_THERM_LOCAL_THERM_LSB
31 |
| 2927 #define PHY_ANALOG_THERM_LOCAL_THERM_MASK
0x80000000 |
| 2928 #define PHY_ANALOG_THERM_LOCAL_THERM_GET(x)
(((x) & 0x80000000) >> 31) |
| 2929 #define PHY_ANALOG_THERM_LOCAL_THERM_SET(x)
(((x) << 31) & 0x80000000) |
| 2930 |
| 2931 /* macros for XTAL */ |
| 2932 #define PHY_ANALOG_XTAL_ADDRESS
0x00000290 |
| 2933 #define PHY_ANALOG_XTAL_OFFSET
0x00000290 |
| 2934 #define PHY_ANALOG_XTAL_SPARE_MSB
5 |
| 2935 #define PHY_ANALOG_XTAL_SPARE_LSB
0 |
| 2936 #define PHY_ANALOG_XTAL_SPARE_MASK
0x0000003f |
| 2937 #define PHY_ANALOG_XTAL_SPARE_GET(x)
(((x) & 0x0000003f) >> 0) |
| 2938 #define PHY_ANALOG_XTAL_SPARE_SET(x)
(((x) << 0) & 0x0000003f) |
| 2939 #define PHY_ANALOG_XTAL_XTAL_NOTCXODET_MSB
6 |
| 2940 #define PHY_ANALOG_XTAL_XTAL_NOTCXODET_LSB
6 |
| 2941 #define PHY_ANALOG_XTAL_XTAL_NOTCXODET_MASK
0x00000040 |
| 2942 #define PHY_ANALOG_XTAL_XTAL_NOTCXODET_GET(x)
(((x) & 0x00000040) >> 6) |
| 2943 #define PHY_ANALOG_XTAL_XTAL_NOTCXODET_SET(x)
(((x) << 6) & 0x00000040) |
| 2944 #define PHY_ANALOG_XTAL_LOCALBIAS2X_MSB
7 |
| 2945 #define PHY_ANALOG_XTAL_LOCALBIAS2X_LSB
7 |
| 2946 #define PHY_ANALOG_XTAL_LOCALBIAS2X_MASK
0x00000080 |
| 2947 #define PHY_ANALOG_XTAL_LOCALBIAS2X_GET(x)
(((x) & 0x00000080) >> 7) |
| 2948 #define PHY_ANALOG_XTAL_LOCALBIAS2X_SET(x)
(((x) << 7) & 0x00000080) |
| 2949 #define PHY_ANALOG_XTAL_LOCAL_XTAL_MSB
8 |
| 2950 #define PHY_ANALOG_XTAL_LOCAL_XTAL_LSB
8 |
| 2951 #define PHY_ANALOG_XTAL_LOCAL_XTAL_MASK
0x00000100 |
| 2952 #define PHY_ANALOG_XTAL_LOCAL_XTAL_GET(x)
(((x) & 0x00000100) >> 8) |
| 2953 #define PHY_ANALOG_XTAL_LOCAL_XTAL_SET(x)
(((x) << 8) & 0x00000100) |
| 2954 #define PHY_ANALOG_XTAL_XTAL_PWDCLKIN_MSB
9 |
| 2955 #define PHY_ANALOG_XTAL_XTAL_PWDCLKIN_LSB
9 |
| 2956 #define PHY_ANALOG_XTAL_XTAL_PWDCLKIN_MASK
0x00000200 |
| 2957 #define PHY_ANALOG_XTAL_XTAL_PWDCLKIN_GET(x)
(((x) & 0x00000200) >> 9) |
| 2958 #define PHY_ANALOG_XTAL_XTAL_PWDCLKIN_SET(x)
(((x) << 9) & 0x00000200) |
| 2959 #define PHY_ANALOG_XTAL_XTAL_OSCON_MSB
10 |
| 2960 #define PHY_ANALOG_XTAL_XTAL_OSCON_LSB
10 |
| 2961 #define PHY_ANALOG_XTAL_XTAL_OSCON_MASK
0x00000400 |
| 2962 #define PHY_ANALOG_XTAL_XTAL_OSCON_GET(x)
(((x) & 0x00000400) >> 10) |
| 2963 #define PHY_ANALOG_XTAL_XTAL_OSCON_SET(x)
(((x) << 10) & 0x00000400) |
| 2964 #define PHY_ANALOG_XTAL_XTAL_PWDCLKD_MSB
11 |
| 2965 #define PHY_ANALOG_XTAL_XTAL_PWDCLKD_LSB
11 |
| 2966 #define PHY_ANALOG_XTAL_XTAL_PWDCLKD_MASK
0x00000800 |
| 2967 #define PHY_ANALOG_XTAL_XTAL_PWDCLKD_GET(x)
(((x) & 0x00000800) >> 11) |
| 2968 #define PHY_ANALOG_XTAL_XTAL_PWDCLKD_SET(x)
(((x) << 11) & 0x00000800) |
| 2969 #define PHY_ANALOG_XTAL_XTAL_LOCALBIAS_MSB
12 |
| 2970 #define PHY_ANALOG_XTAL_XTAL_LOCALBIAS_LSB
12 |
| 2971 #define PHY_ANALOG_XTAL_XTAL_LOCALBIAS_MASK
0x00001000 |
| 2972 #define PHY_ANALOG_XTAL_XTAL_LOCALBIAS_GET(x)
(((x) & 0x00001000) >> 12) |
| 2973 #define PHY_ANALOG_XTAL_XTAL_LOCALBIAS_SET(x)
(((x) << 12) & 0x00001000) |
| 2974 #define PHY_ANALOG_XTAL_XTAL_SHRTXIN_MSB
13 |
| 2975 #define PHY_ANALOG_XTAL_XTAL_SHRTXIN_LSB
13 |
| 2976 #define PHY_ANALOG_XTAL_XTAL_SHRTXIN_MASK
0x00002000 |
| 2977 #define PHY_ANALOG_XTAL_XTAL_SHRTXIN_GET(x)
(((x) & 0x00002000) >> 13) |
| 2978 #define PHY_ANALOG_XTAL_XTAL_SHRTXIN_SET(x)
(((x) << 13) & 0x00002000) |
| 2979 #define PHY_ANALOG_XTAL_XTAL_DRVSTR_MSB
15 |
| 2980 #define PHY_ANALOG_XTAL_XTAL_DRVSTR_LSB
14 |
| 2981 #define PHY_ANALOG_XTAL_XTAL_DRVSTR_MASK
0x0000c000 |
| 2982 #define PHY_ANALOG_XTAL_XTAL_DRVSTR_GET(x)
(((x) & 0x0000c000) >> 14) |
| 2983 #define PHY_ANALOG_XTAL_XTAL_DRVSTR_SET(x)
(((x) << 14) & 0x0000c000) |
| 2984 #define PHY_ANALOG_XTAL_XTAL_CAPOUTDAC_MSB
22 |
| 2985 #define PHY_ANALOG_XTAL_XTAL_CAPOUTDAC_LSB
16 |
| 2986 #define PHY_ANALOG_XTAL_XTAL_CAPOUTDAC_MASK
0x007f0000 |
| 2987 #define PHY_ANALOG_XTAL_XTAL_CAPOUTDAC_GET(x)
(((x) & 0x007f0000) >> 16) |
| 2988 #define PHY_ANALOG_XTAL_XTAL_CAPOUTDAC_SET(x)
(((x) << 16) & 0x007f0000) |
| 2989 #define PHY_ANALOG_XTAL_XTAL_CAPINDAC_MSB
29 |
| 2990 #define PHY_ANALOG_XTAL_XTAL_CAPINDAC_LSB
23 |
| 2991 #define PHY_ANALOG_XTAL_XTAL_CAPINDAC_MASK
0x3f800000 |
| 2992 #define PHY_ANALOG_XTAL_XTAL_CAPINDAC_GET(x)
(((x) & 0x3f800000) >> 23) |
| 2993 #define PHY_ANALOG_XTAL_XTAL_CAPINDAC_SET(x)
(((x) << 23) & 0x3f800000) |
| 2994 #define PHY_ANALOG_XTAL_XTAL_BIAS2X_MSB
30 |
| 2995 #define PHY_ANALOG_XTAL_XTAL_BIAS2X_LSB
30 |
| 2996 #define PHY_ANALOG_XTAL_XTAL_BIAS2X_MASK
0x40000000 |
| 2997 #define PHY_ANALOG_XTAL_XTAL_BIAS2X_GET(x)
(((x) & 0x40000000) >> 30) |
| 2998 #define PHY_ANALOG_XTAL_XTAL_BIAS2X_SET(x)
(((x) << 30) & 0x40000000) |
| 2999 #define PHY_ANALOG_XTAL_TCXODET_MSB
31 |
| 3000 #define PHY_ANALOG_XTAL_TCXODET_LSB
31 |
| 3001 #define PHY_ANALOG_XTAL_TCXODET_MASK
0x80000000 |
| 3002 #define PHY_ANALOG_XTAL_TCXODET_GET(x)
(((x) & 0x80000000) >> 31) |
| 3003 |
| 3004 /* macros for rbist_cntrl */ |
| 3005 #define PHY_ANALOG_RBIST_CNTRL_ADDRESS
0x00000380 |
| 3006 #define PHY_ANALOG_RBIST_CNTRL_OFFSET
0x00000380 |
| 3007 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_DC_ENABLE_MSB
0 |
| 3008 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_DC_ENABLE_LSB
0 |
| 3009 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_DC_ENABLE_MASK
0x00000001 |
| 3010 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_DC_ENABLE_GET(x)
(((x) & 0x00000001) >> 0) |
| 3011 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_DC_ENABLE_SET(x)
(((x) << 0) & 0x00000001) |
| 3012 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_TONE0_ENABLE_MSB
1 |
| 3013 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_TONE0_ENABLE_LSB
1 |
| 3014 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_TONE0_ENABLE_MASK
0x00000002 |
| 3015 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_TONE0_ENABLE_GET(x)
(((x) & 0x00000002) >> 1) |
| 3016 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_TONE0_ENABLE_SET(x)
(((x) << 1) & 0x00000002) |
| 3017 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_TONE1_ENABLE_MSB
2 |
| 3018 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_TONE1_ENABLE_LSB
2 |
| 3019 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_TONE1_ENABLE_MASK
0x00000004 |
| 3020 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_TONE1_ENABLE_GET(x)
(((x) & 0x00000004) >> 2) |
| 3021 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_TONE1_ENABLE_SET(x)
(((x) << 2) & 0x00000004) |
| 3022 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_LFTONE0_ENABLE_MSB
3 |
| 3023 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_LFTONE0_ENABLE_LSB
3 |
| 3024 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_LFTONE0_ENABLE_MASK
0x00000008 |
| 3025 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_LFTONE0_ENABLE_GET(x)
(((x) & 0x00000008) >> 3) |
| 3026 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_LFTONE0_ENABLE_SET(x)
(((x) << 3) & 0x00000008) |
| 3027 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_LINRAMP_ENABLE_I_MSB
4 |
| 3028 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_LINRAMP_ENABLE_I_LSB
4 |
| 3029 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_LINRAMP_ENABLE_I_MASK
0x00000010 |
| 3030 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_LINRAMP_ENABLE_I_GET(x)
(((x) & 0x00000010) >> 4) |
| 3031 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_LINRAMP_ENABLE_I_SET(x)
(((x) << 4) & 0x00000010) |
| 3032 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_LINRAMP_ENABLE_Q_MSB
5 |
| 3033 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_LINRAMP_ENABLE_Q_LSB
5 |
| 3034 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_LINRAMP_ENABLE_Q_MASK
0x00000020 |
| 3035 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_LINRAMP_ENABLE_Q_GET(x)
(((x) & 0x00000020) >> 5) |
| 3036 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_LINRAMP_ENABLE_Q_SET(x)
(((x) << 5) & 0x00000020) |
| 3037 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_PRBS_ENABLE_I_MSB
6 |
| 3038 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_PRBS_ENABLE_I_LSB
6 |
| 3039 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_PRBS_ENABLE_I_MASK
0x00000040 |
| 3040 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_PRBS_ENABLE_I_GET(x)
(((x) & 0x00000040) >> 6) |
| 3041 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_PRBS_ENABLE_I_SET(x)
(((x) << 6) & 0x00000040) |
| 3042 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_PRBS_ENABLE_Q_MSB
7 |
| 3043 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_PRBS_ENABLE_Q_LSB
7 |
| 3044 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_PRBS_ENABLE_Q_MASK
0x00000080 |
| 3045 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_PRBS_ENABLE_Q_GET(x)
(((x) & 0x00000080) >> 7) |
| 3046 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_PRBS_ENABLE_Q_SET(x)
(((x) << 7) & 0x00000080) |
| 3047 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_DC_WRITE_TO_CANCEL_MSB
8 |
| 3048 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_DC_WRITE_TO_CANCEL_LSB
8 |
| 3049 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_DC_WRITE_TO_CANCEL_MASK
0x00000100 |
| 3050 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_DC_WRITE_TO_CANCEL_GET(x)
(((x) & 0x00000100) >> 8) |
| 3051 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_DC_WRITE_TO_CANCEL_SET(x)
(((x) << 8) & 0x00000100) |
| 3052 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_DC_ENABLE_MSB
9 |
| 3053 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_DC_ENABLE_LSB
9 |
| 3054 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_DC_ENABLE_MASK
0x00000200 |
| 3055 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_DC_ENABLE_GET(x)
(((x) & 0x00000200) >> 9) |
| 3056 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_DC_ENABLE_SET(x)
(((x) << 9) & 0x00000200) |
| 3057 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_CORR_ENABLE_MSB
10 |
| 3058 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_CORR_ENABLE_LSB
10 |
| 3059 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_CORR_ENABLE_MASK
0x00000400 |
| 3060 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_CORR_ENABLE_GET(x)
(((x) & 0x00000400) >> 10) |
| 3061 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_CORR_ENABLE_SET(x)
(((x) << 10) & 0x00000400) |
| 3062 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_POWER_ENABLE_MSB
11 |
| 3063 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_POWER_ENABLE_LSB
11 |
| 3064 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_POWER_ENABLE_MASK
0x00000800 |
| 3065 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_POWER_ENABLE_GET(x)
(((x) & 0x00000800) >> 11) |
| 3066 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_POWER_ENABLE_SET(x)
(((x) << 11) & 0x00000800) |
| 3067 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_IQ_ENABLE_MSB
12 |
| 3068 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_IQ_ENABLE_LSB
12 |
| 3069 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_IQ_ENABLE_MASK
0x00001000 |
| 3070 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_IQ_ENABLE_GET(x)
(((x) & 0x00001000) >> 12) |
| 3071 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_IQ_ENABLE_SET(x)
(((x) << 12) & 0x00001000) |
| 3072 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_I2Q2_ENABLE_MSB
13 |
| 3073 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_I2Q2_ENABLE_LSB
13 |
| 3074 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_I2Q2_ENABLE_MASK
0x00002000 |
| 3075 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_I2Q2_ENABLE_GET(x)
(((x) & 0x00002000) >> 13) |
| 3076 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_I2Q2_ENABLE_SET(x)
(((x) << 13) & 0x00002000) |
| 3077 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_POWER_HPF_ENABLE_MSB
14 |
| 3078 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_POWER_HPF_ENABLE_LSB
14 |
| 3079 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_POWER_HPF_ENABLE_MASK
0x00004000 |
| 3080 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_POWER_HPF_ENABLE_GET(x)
(((x) & 0x00004000) >> 14) |
| 3081 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_POWER_HPF_ENABLE_SET(x)
(((x) << 14) & 0x00004000) |
| 3082 #define PHY_ANALOG_RBIST_CNTRL_ATE_RXDAC_CALIBRATE_MSB
15 |
| 3083 #define PHY_ANALOG_RBIST_CNTRL_ATE_RXDAC_CALIBRATE_LSB
15 |
| 3084 #define PHY_ANALOG_RBIST_CNTRL_ATE_RXDAC_CALIBRATE_MASK
0x00008000 |
| 3085 #define PHY_ANALOG_RBIST_CNTRL_ATE_RXDAC_CALIBRATE_GET(x)
(((x) & 0x00008000) >> 15) |
| 3086 #define PHY_ANALOG_RBIST_CNTRL_ATE_RXDAC_CALIBRATE_SET(x)
(((x) << 15) & 0x00008000) |
| 3087 #define PHY_ANALOG_RBIST_CNTRL_ATE_RBIST_ENABLE_MSB
16 |
| 3088 #define PHY_ANALOG_RBIST_CNTRL_ATE_RBIST_ENABLE_LSB
16 |
| 3089 #define PHY_ANALOG_RBIST_CNTRL_ATE_RBIST_ENABLE_MASK
0x00010000 |
| 3090 #define PHY_ANALOG_RBIST_CNTRL_ATE_RBIST_ENABLE_GET(x)
(((x) & 0x00010000) >> 16) |
| 3091 #define PHY_ANALOG_RBIST_CNTRL_ATE_RBIST_ENABLE_SET(x)
(((x) << 16) & 0x00010000) |
| 3092 #define PHY_ANALOG_RBIST_CNTRL_ATE_ADC_CLK_INVERT_MSB
17 |
| 3093 #define PHY_ANALOG_RBIST_CNTRL_ATE_ADC_CLK_INVERT_LSB
17 |
| 3094 #define PHY_ANALOG_RBIST_CNTRL_ATE_ADC_CLK_INVERT_MASK
0x00020000 |
| 3095 #define PHY_ANALOG_RBIST_CNTRL_ATE_ADC_CLK_INVERT_GET(x)
(((x) & 0x00020000) >> 17) |
| 3096 #define PHY_ANALOG_RBIST_CNTRL_ATE_ADC_CLK_INVERT_SET(x)
(((x) << 17) & 0x00020000) |
| 3097 |
| 3098 /* macros for tx_dc_offset */ |
| 3099 #define PHY_ANALOG_TX_DC_OFFSET_ADDRESS
0x00000384 |
| 3100 #define PHY_ANALOG_TX_DC_OFFSET_OFFSET
0x00000384 |
| 3101 #define PHY_ANALOG_TX_DC_OFFSET_ATE_TONEGEN_DC_I_MSB
10 |
| 3102 #define PHY_ANALOG_TX_DC_OFFSET_ATE_TONEGEN_DC_I_LSB
0 |
| 3103 #define PHY_ANALOG_TX_DC_OFFSET_ATE_TONEGEN_DC_I_MASK
0x000007ff |
| 3104 #define PHY_ANALOG_TX_DC_OFFSET_ATE_TONEGEN_DC_I_GET(x)
(((x) & 0x000007ff) >> 0) |
| 3105 #define PHY_ANALOG_TX_DC_OFFSET_ATE_TONEGEN_DC_I_SET(x)
(((x) << 0) & 0x000007ff) |
| 3106 #define PHY_ANALOG_TX_DC_OFFSET_ATE_TONEGEN_DC_Q_MSB
26 |
| 3107 #define PHY_ANALOG_TX_DC_OFFSET_ATE_TONEGEN_DC_Q_LSB
16 |
| 3108 #define PHY_ANALOG_TX_DC_OFFSET_ATE_TONEGEN_DC_Q_MASK
0x07ff0000 |
| 3109 #define PHY_ANALOG_TX_DC_OFFSET_ATE_TONEGEN_DC_Q_GET(x)
(((x) & 0x07ff0000) >> 16) |
| 3110 #define PHY_ANALOG_TX_DC_OFFSET_ATE_TONEGEN_DC_Q_SET(x)
(((x) << 16) & 0x07ff0000) |
| 3111 |
| 3112 /* macros for tx_tonegen0 */ |
| 3113 #define PHY_ANALOG_TX_TONEGEN0_ADDRESS
0x00000388 |
| 3114 #define PHY_ANALOG_TX_TONEGEN0_OFFSET
0x00000388 |
| 3115 #define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_FREQ_MSB
6 |
| 3116 #define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_FREQ_LSB
0 |
| 3117 #define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_FREQ_MASK
0x0000007f |
| 3118 #define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_FREQ_GET(x)
(((x) & 0x0000007f) >> 0) |
| 3119 #define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_FREQ_SET(x)
(((x) << 0) & 0x0000007f) |
| 3120 #define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_A_EXP_MSB
11 |
| 3121 #define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_A_EXP_LSB
8 |
| 3122 #define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_A_EXP_MASK
0x00000f00 |
| 3123 #define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_A_EXP_GET(x)
(((x) & 0x00000f00) >> 8) |
| 3124 #define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_A_EXP_SET(x)
(((x) << 8) & 0x00000f00) |
| 3125 #define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_A_MAN_MSB
23 |
| 3126 #define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_A_MAN_LSB
16 |
| 3127 #define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_A_MAN_MASK
0x00ff0000 |
| 3128 #define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_A_MAN_GET(x)
(((x) & 0x00ff0000) >> 16) |
| 3129 #define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_A_MAN_SET(x)
(((x) << 16) & 0x00ff0000) |
| 3130 #define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_TAU_K_MSB
30 |
| 3131 #define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_TAU_K_LSB
24 |
| 3132 #define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_TAU_K_MASK
0x7f000000 |
| 3133 #define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_TAU_K_GET(x)
(((x) & 0x7f000000) >> 24) |
| 3134 #define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_TAU_K_SET(x)
(((x) << 24) & 0x7f000000) |
| 3135 |
| 3136 /* macros for tx_tonegen1 */ |
| 3137 #define PHY_ANALOG_TX_TONEGEN1_ADDRESS
0x0000038c |
| 3138 #define PHY_ANALOG_TX_TONEGEN1_OFFSET
0x0000038c |
| 3139 #define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_FREQ_MSB
6 |
| 3140 #define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_FREQ_LSB
0 |
| 3141 #define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_FREQ_MASK
0x0000007f |
| 3142 #define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_FREQ_GET(x)
(((x) & 0x0000007f) >> 0) |
| 3143 #define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_FREQ_SET(x)
(((x) << 0) & 0x0000007f) |
| 3144 #define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_A_EXP_MSB
11 |
| 3145 #define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_A_EXP_LSB
8 |
| 3146 #define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_A_EXP_MASK
0x00000f00 |
| 3147 #define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_A_EXP_GET(x)
(((x) & 0x00000f00) >> 8) |
| 3148 #define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_A_EXP_SET(x)
(((x) << 8) & 0x00000f00) |
| 3149 #define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_A_MAN_MSB
23 |
| 3150 #define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_A_MAN_LSB
16 |
| 3151 #define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_A_MAN_MASK
0x00ff0000 |
| 3152 #define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_A_MAN_GET(x)
(((x) & 0x00ff0000) >> 16) |
| 3153 #define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_A_MAN_SET(x)
(((x) << 16) & 0x00ff0000) |
| 3154 #define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_TAU_K_MSB
30 |
| 3155 #define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_TAU_K_LSB
24 |
| 3156 #define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_TAU_K_MASK
0x7f000000 |
| 3157 #define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_TAU_K_GET(x)
(((x) & 0x7f000000) >> 24) |
| 3158 #define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_TAU_K_SET(x)
(((x) << 24) & 0x7f000000) |
| 3159 |
| 3160 /* macros for tx_lftonegen0 */ |
| 3161 #define PHY_ANALOG_TX_LFTONEGEN0_ADDRESS
0x00000390 |
| 3162 #define PHY_ANALOG_TX_LFTONEGEN0_OFFSET
0x00000390 |
| 3163 #define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_FREQ_MSB
6 |
| 3164 #define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_FREQ_LSB
0 |
| 3165 #define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_FREQ_MASK
0x0000007f |
| 3166 #define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_FREQ_GET(x)
(((x) & 0x0000007f) >> 0) |
| 3167 #define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_FREQ_SET(x)
(((x) << 0) & 0x0000007f) |
| 3168 #define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_A_EXP_MSB
11 |
| 3169 #define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_A_EXP_LSB
8 |
| 3170 #define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_A_EXP_MASK
0x00000f00 |
| 3171 #define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_A_EXP_GET(x)
(((x) & 0x00000f00) >> 8) |
| 3172 #define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_A_EXP_SET(x)
(((x) << 8) & 0x00000f00) |
| 3173 #define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_A_MAN_MSB
23 |
| 3174 #define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_A_MAN_LSB
16 |
| 3175 #define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_A_MAN_MASK
0x00ff0000 |
| 3176 #define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_A_MAN_GET(x)
(((x) & 0x00ff0000) >> 16) |
| 3177 #define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_A_MAN_SET(x)
(((x) << 16) & 0x00ff0000) |
| 3178 #define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_TAU_K_MSB
30 |
| 3179 #define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_TAU_K_LSB
24 |
| 3180 #define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_TAU_K_MASK
0x7f000000 |
| 3181 #define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_TAU_K_GET(x)
(((x) & 0x7f000000) >> 24) |
| 3182 #define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_TAU_K_SET(x)
(((x) << 24) & 0x7f000000) |
| 3183 |
| 3184 /* macros for tx_linear_ramp_i */ |
| 3185 #define PHY_ANALOG_TX_LINEAR_RAMP_I_ADDRESS
0x00000394 |
| 3186 #define PHY_ANALOG_TX_LINEAR_RAMP_I_OFFSET
0x00000394 |
| 3187 #define PHY_ANALOG_TX_LINEAR_RAMP_I_ATE_TONEGEN_LINRAMP_INIT_MSB
10 |
| 3188 #define PHY_ANALOG_TX_LINEAR_RAMP_I_ATE_TONEGEN_LINRAMP_INIT_LSB
0 |
| 3189 #define PHY_ANALOG_TX_LINEAR_RAMP_I_ATE_TONEGEN_LINRAMP_INIT_MASK
0x000007ff |
| 3190 #define PHY_ANALOG_TX_LINEAR_RAMP_I_ATE_TONEGEN_LINRAMP_INIT_GET(x)
(((x) & 0x000007ff) >> 0) |
| 3191 #define PHY_ANALOG_TX_LINEAR_RAMP_I_ATE_TONEGEN_LINRAMP_INIT_SET(x)
(((x) << 0) & 0x000007ff) |
| 3192 #define PHY_ANALOG_TX_LINEAR_RAMP_I_ATE_TONEGEN_LINRAMP_DWELL_MSB
21 |
| 3193 #define PHY_ANALOG_TX_LINEAR_RAMP_I_ATE_TONEGEN_LINRAMP_DWELL_LSB
12 |
| 3194 #define PHY_ANALOG_TX_LINEAR_RAMP_I_ATE_TONEGEN_LINRAMP_DWELL_MASK
0x003ff000 |
| 3195 #define PHY_ANALOG_TX_LINEAR_RAMP_I_ATE_TONEGEN_LINRAMP_DWELL_GET(x)
(((x) & 0x003ff000) >> 12) |
| 3196 #define PHY_ANALOG_TX_LINEAR_RAMP_I_ATE_TONEGEN_LINRAMP_DWELL_SET(x)
(((x) << 12) & 0x003ff000) |
| 3197 #define PHY_ANALOG_TX_LINEAR_RAMP_I_ATE_TONEGEN_LINRAMP_STEP_MSB
29 |
| 3198 #define PHY_ANALOG_TX_LINEAR_RAMP_I_ATE_TONEGEN_LINRAMP_STEP_LSB
24 |
| 3199 #define PHY_ANALOG_TX_LINEAR_RAMP_I_ATE_TONEGEN_LINRAMP_STEP_MASK
0x3f000000 |
| 3200 #define PHY_ANALOG_TX_LINEAR_RAMP_I_ATE_TONEGEN_LINRAMP_STEP_GET(x)
(((x) & 0x3f000000) >> 24) |
| 3201 #define PHY_ANALOG_TX_LINEAR_RAMP_I_ATE_TONEGEN_LINRAMP_STEP_SET(x)
(((x) << 24) & 0x3f000000) |
| 3202 |
| 3203 /* macros for tx_linear_ramp_q */ |
| 3204 #define PHY_ANALOG_TX_LINEAR_RAMP_Q_ADDRESS
0x00000398 |
| 3205 #define PHY_ANALOG_TX_LINEAR_RAMP_Q_OFFSET
0x00000398 |
| 3206 #define PHY_ANALOG_TX_LINEAR_RAMP_Q_ATE_TONEGEN_LINRAMP_INIT_MSB
10 |
| 3207 #define PHY_ANALOG_TX_LINEAR_RAMP_Q_ATE_TONEGEN_LINRAMP_INIT_LSB
0 |
| 3208 #define PHY_ANALOG_TX_LINEAR_RAMP_Q_ATE_TONEGEN_LINRAMP_INIT_MASK
0x000007ff |
| 3209 #define PHY_ANALOG_TX_LINEAR_RAMP_Q_ATE_TONEGEN_LINRAMP_INIT_GET(x)
(((x) & 0x000007ff) >> 0) |
| 3210 #define PHY_ANALOG_TX_LINEAR_RAMP_Q_ATE_TONEGEN_LINRAMP_INIT_SET(x)
(((x) << 0) & 0x000007ff) |
| 3211 #define PHY_ANALOG_TX_LINEAR_RAMP_Q_ATE_TONEGEN_LINRAMP_DWELL_MSB
21 |
| 3212 #define PHY_ANALOG_TX_LINEAR_RAMP_Q_ATE_TONEGEN_LINRAMP_DWELL_LSB
12 |
| 3213 #define PHY_ANALOG_TX_LINEAR_RAMP_Q_ATE_TONEGEN_LINRAMP_DWELL_MASK
0x003ff000 |
| 3214 #define PHY_ANALOG_TX_LINEAR_RAMP_Q_ATE_TONEGEN_LINRAMP_DWELL_GET(x)
(((x) & 0x003ff000) >> 12) |
| 3215 #define PHY_ANALOG_TX_LINEAR_RAMP_Q_ATE_TONEGEN_LINRAMP_DWELL_SET(x)
(((x) << 12) & 0x003ff000) |
| 3216 #define PHY_ANALOG_TX_LINEAR_RAMP_Q_ATE_TONEGEN_LINRAMP_STEP_MSB
29 |
| 3217 #define PHY_ANALOG_TX_LINEAR_RAMP_Q_ATE_TONEGEN_LINRAMP_STEP_LSB
24 |
| 3218 #define PHY_ANALOG_TX_LINEAR_RAMP_Q_ATE_TONEGEN_LINRAMP_STEP_MASK
0x3f000000 |
| 3219 #define PHY_ANALOG_TX_LINEAR_RAMP_Q_ATE_TONEGEN_LINRAMP_STEP_GET(x)
(((x) & 0x3f000000) >> 24) |
| 3220 #define PHY_ANALOG_TX_LINEAR_RAMP_Q_ATE_TONEGEN_LINRAMP_STEP_SET(x)
(((x) << 24) & 0x3f000000) |
| 3221 |
| 3222 /* macros for tx_prbs_mag */ |
| 3223 #define PHY_ANALOG_TX_PRBS_MAG_ADDRESS
0x0000039c |
| 3224 #define PHY_ANALOG_TX_PRBS_MAG_OFFSET
0x0000039c |
| 3225 #define PHY_ANALOG_TX_PRBS_MAG_ATE_TONEGEN_PRBS_MAGNITUDE_I_MSB
9 |
| 3226 #define PHY_ANALOG_TX_PRBS_MAG_ATE_TONEGEN_PRBS_MAGNITUDE_I_LSB
0 |
| 3227 #define PHY_ANALOG_TX_PRBS_MAG_ATE_TONEGEN_PRBS_MAGNITUDE_I_MASK
0x000003ff |
| 3228 #define PHY_ANALOG_TX_PRBS_MAG_ATE_TONEGEN_PRBS_MAGNITUDE_I_GET(x)
(((x) & 0x000003ff) >> 0) |
| 3229 #define PHY_ANALOG_TX_PRBS_MAG_ATE_TONEGEN_PRBS_MAGNITUDE_I_SET(x)
(((x) << 0) & 0x000003ff) |
| 3230 #define PHY_ANALOG_TX_PRBS_MAG_ATE_TONEGEN_PRBS_MAGNITUDE_Q_MSB
25 |
| 3231 #define PHY_ANALOG_TX_PRBS_MAG_ATE_TONEGEN_PRBS_MAGNITUDE_Q_LSB
16 |
| 3232 #define PHY_ANALOG_TX_PRBS_MAG_ATE_TONEGEN_PRBS_MAGNITUDE_Q_MASK
0x03ff0000 |
| 3233 #define PHY_ANALOG_TX_PRBS_MAG_ATE_TONEGEN_PRBS_MAGNITUDE_Q_GET(x)
(((x) & 0x03ff0000) >> 16) |
| 3234 #define PHY_ANALOG_TX_PRBS_MAG_ATE_TONEGEN_PRBS_MAGNITUDE_Q_SET(x)
(((x) << 16) & 0x03ff0000) |
| 3235 |
| 3236 /* macros for tx_prbs_seed_i */ |
| 3237 #define PHY_ANALOG_TX_PRBS_SEED_I_ADDRESS
0x000003a0 |
| 3238 #define PHY_ANALOG_TX_PRBS_SEED_I_OFFSET
0x000003a0 |
| 3239 #define PHY_ANALOG_TX_PRBS_SEED_I_ATE_TONEGEN_PRBS_SEED_MSB
30 |
| 3240 #define PHY_ANALOG_TX_PRBS_SEED_I_ATE_TONEGEN_PRBS_SEED_LSB
0 |
| 3241 #define PHY_ANALOG_TX_PRBS_SEED_I_ATE_TONEGEN_PRBS_SEED_MASK
0x7fffffff |
| 3242 #define PHY_ANALOG_TX_PRBS_SEED_I_ATE_TONEGEN_PRBS_SEED_GET(x)
(((x) & 0x7fffffff) >> 0) |
| 3243 #define PHY_ANALOG_TX_PRBS_SEED_I_ATE_TONEGEN_PRBS_SEED_SET(x)
(((x) << 0) & 0x7fffffff) |
| 3244 |
| 3245 /* macros for tx_prbs_seed_q */ |
| 3246 #define PHY_ANALOG_TX_PRBS_SEED_Q_ADDRESS
0x000003a4 |
| 3247 #define PHY_ANALOG_TX_PRBS_SEED_Q_OFFSET
0x000003a4 |
| 3248 #define PHY_ANALOG_TX_PRBS_SEED_Q_ATE_TONEGEN_PRBS_SEED_MSB
30 |
| 3249 #define PHY_ANALOG_TX_PRBS_SEED_Q_ATE_TONEGEN_PRBS_SEED_LSB
0 |
| 3250 #define PHY_ANALOG_TX_PRBS_SEED_Q_ATE_TONEGEN_PRBS_SEED_MASK
0x7fffffff |
| 3251 #define PHY_ANALOG_TX_PRBS_SEED_Q_ATE_TONEGEN_PRBS_SEED_GET(x)
(((x) & 0x7fffffff) >> 0) |
| 3252 #define PHY_ANALOG_TX_PRBS_SEED_Q_ATE_TONEGEN_PRBS_SEED_SET(x)
(((x) << 0) & 0x7fffffff) |
| 3253 |
| 3254 /* macros for cmac_dc_cancel */ |
| 3255 #define PHY_ANALOG_CMAC_DC_CANCEL_ADDRESS
0x000003a8 |
| 3256 #define PHY_ANALOG_CMAC_DC_CANCEL_OFFSET
0x000003a8 |
| 3257 #define PHY_ANALOG_CMAC_DC_CANCEL_ATE_CMAC_DC_CANCEL_I_MSB
9 |
| 3258 #define PHY_ANALOG_CMAC_DC_CANCEL_ATE_CMAC_DC_CANCEL_I_LSB
0 |
| 3259 #define PHY_ANALOG_CMAC_DC_CANCEL_ATE_CMAC_DC_CANCEL_I_MASK
0x000003ff |
| 3260 #define PHY_ANALOG_CMAC_DC_CANCEL_ATE_CMAC_DC_CANCEL_I_GET(x)
(((x) & 0x000003ff) >> 0) |
| 3261 #define PHY_ANALOG_CMAC_DC_CANCEL_ATE_CMAC_DC_CANCEL_I_SET(x)
(((x) << 0) & 0x000003ff) |
| 3262 #define PHY_ANALOG_CMAC_DC_CANCEL_ATE_CMAC_DC_CANCEL_Q_MSB
25 |
| 3263 #define PHY_ANALOG_CMAC_DC_CANCEL_ATE_CMAC_DC_CANCEL_Q_LSB
16 |
| 3264 #define PHY_ANALOG_CMAC_DC_CANCEL_ATE_CMAC_DC_CANCEL_Q_MASK
0x03ff0000 |
| 3265 #define PHY_ANALOG_CMAC_DC_CANCEL_ATE_CMAC_DC_CANCEL_Q_GET(x)
(((x) & 0x03ff0000) >> 16) |
| 3266 #define PHY_ANALOG_CMAC_DC_CANCEL_ATE_CMAC_DC_CANCEL_Q_SET(x)
(((x) << 16) & 0x03ff0000) |
| 3267 |
| 3268 /* macros for cmac_dc_offset */ |
| 3269 #define PHY_ANALOG_CMAC_DC_OFFSET_ADDRESS
0x000003ac |
| 3270 #define PHY_ANALOG_CMAC_DC_OFFSET_OFFSET
0x000003ac |
| 3271 #define PHY_ANALOG_CMAC_DC_OFFSET_ATE_CMAC_DC_CYCLES_MSB
3 |
| 3272 #define PHY_ANALOG_CMAC_DC_OFFSET_ATE_CMAC_DC_CYCLES_LSB
0 |
| 3273 #define PHY_ANALOG_CMAC_DC_OFFSET_ATE_CMAC_DC_CYCLES_MASK
0x0000000f |
| 3274 #define PHY_ANALOG_CMAC_DC_OFFSET_ATE_CMAC_DC_CYCLES_GET(x)
(((x) & 0x0000000f) >> 0) |
| 3275 #define PHY_ANALOG_CMAC_DC_OFFSET_ATE_CMAC_DC_CYCLES_SET(x)
(((x) << 0) & 0x0000000f) |
| 3276 |
| 3277 /* macros for cmac_corr */ |
| 3278 #define PHY_ANALOG_CMAC_CORR_ADDRESS
0x000003b0 |
| 3279 #define PHY_ANALOG_CMAC_CORR_OFFSET
0x000003b0 |
| 3280 #define PHY_ANALOG_CMAC_CORR_ATE_CMAC_CORR_CYCLES_MSB
4 |
| 3281 #define PHY_ANALOG_CMAC_CORR_ATE_CMAC_CORR_CYCLES_LSB
0 |
| 3282 #define PHY_ANALOG_CMAC_CORR_ATE_CMAC_CORR_CYCLES_MASK
0x0000001f |
| 3283 #define PHY_ANALOG_CMAC_CORR_ATE_CMAC_CORR_CYCLES_GET(x)
(((x) & 0x0000001f) >> 0) |
| 3284 #define PHY_ANALOG_CMAC_CORR_ATE_CMAC_CORR_CYCLES_SET(x)
(((x) << 0) & 0x0000001f) |
| 3285 #define PHY_ANALOG_CMAC_CORR_ATE_CMAC_CORR_FREQ_MSB
13 |
| 3286 #define PHY_ANALOG_CMAC_CORR_ATE_CMAC_CORR_FREQ_LSB
8 |
| 3287 #define PHY_ANALOG_CMAC_CORR_ATE_CMAC_CORR_FREQ_MASK
0x00003f00 |
| 3288 #define PHY_ANALOG_CMAC_CORR_ATE_CMAC_CORR_FREQ_GET(x)
(((x) & 0x00003f00) >> 8) |
| 3289 #define PHY_ANALOG_CMAC_CORR_ATE_CMAC_CORR_FREQ_SET(x)
(((x) << 8) & 0x00003f00) |
| 3290 |
| 3291 /* macros for cmac_power */ |
| 3292 #define PHY_ANALOG_CMAC_POWER_ADDRESS
0x000003b4 |
| 3293 #define PHY_ANALOG_CMAC_POWER_OFFSET
0x000003b4 |
| 3294 #define PHY_ANALOG_CMAC_POWER_ATE_CMAC_POWER_CYCLES_MSB
3 |
| 3295 #define PHY_ANALOG_CMAC_POWER_ATE_CMAC_POWER_CYCLES_LSB
0 |
| 3296 #define PHY_ANALOG_CMAC_POWER_ATE_CMAC_POWER_CYCLES_MASK
0x0000000f |
| 3297 #define PHY_ANALOG_CMAC_POWER_ATE_CMAC_POWER_CYCLES_GET(x)
(((x) & 0x0000000f) >> 0) |
| 3298 #define PHY_ANALOG_CMAC_POWER_ATE_CMAC_POWER_CYCLES_SET(x)
(((x) << 0) & 0x0000000f) |
| 3299 |
| 3300 /* macros for cmac_cross_corr */ |
| 3301 #define PHY_ANALOG_CMAC_CROSS_CORR_ADDRESS
0x000003b8 |
| 3302 #define PHY_ANALOG_CMAC_CROSS_CORR_OFFSET
0x000003b8 |
| 3303 #define PHY_ANALOG_CMAC_CROSS_CORR_ATE_CMAC_IQ_CYCLES_MSB
3 |
| 3304 #define PHY_ANALOG_CMAC_CROSS_CORR_ATE_CMAC_IQ_CYCLES_LSB
0 |
| 3305 #define PHY_ANALOG_CMAC_CROSS_CORR_ATE_CMAC_IQ_CYCLES_MASK
0x0000000f |
| 3306 #define PHY_ANALOG_CMAC_CROSS_CORR_ATE_CMAC_IQ_CYCLES_GET(x)
(((x) & 0x0000000f) >> 0) |
| 3307 #define PHY_ANALOG_CMAC_CROSS_CORR_ATE_CMAC_IQ_CYCLES_SET(x)
(((x) << 0) & 0x0000000f) |
| 3308 |
| 3309 /* macros for cmac_i2q2 */ |
| 3310 #define PHY_ANALOG_CMAC_I2Q2_ADDRESS
0x000003bc |
| 3311 #define PHY_ANALOG_CMAC_I2Q2_OFFSET
0x000003bc |
| 3312 #define PHY_ANALOG_CMAC_I2Q2_ATE_CMAC_I2Q2_CYCLES_MSB
3 |
| 3313 #define PHY_ANALOG_CMAC_I2Q2_ATE_CMAC_I2Q2_CYCLES_LSB
0 |
| 3314 #define PHY_ANALOG_CMAC_I2Q2_ATE_CMAC_I2Q2_CYCLES_MASK
0x0000000f |
| 3315 #define PHY_ANALOG_CMAC_I2Q2_ATE_CMAC_I2Q2_CYCLES_GET(x)
(((x) & 0x0000000f) >> 0) |
| 3316 #define PHY_ANALOG_CMAC_I2Q2_ATE_CMAC_I2Q2_CYCLES_SET(x)
(((x) << 0) & 0x0000000f) |
| 3317 |
| 3318 /* macros for cmac_power_hpf */ |
| 3319 #define PHY_ANALOG_CMAC_POWER_HPF_ADDRESS
0x000003c0 |
| 3320 #define PHY_ANALOG_CMAC_POWER_HPF_OFFSET
0x000003c0 |
| 3321 #define PHY_ANALOG_CMAC_POWER_HPF_ATE_CMAC_POWER_HPF_CYCLES_MSB
3 |
| 3322 #define PHY_ANALOG_CMAC_POWER_HPF_ATE_CMAC_POWER_HPF_CYCLES_LSB
0 |
| 3323 #define PHY_ANALOG_CMAC_POWER_HPF_ATE_CMAC_POWER_HPF_CYCLES_MASK
0x0000000f |
| 3324 #define PHY_ANALOG_CMAC_POWER_HPF_ATE_CMAC_POWER_HPF_CYCLES_GET(x)
(((x) & 0x0000000f) >> 0) |
| 3325 #define PHY_ANALOG_CMAC_POWER_HPF_ATE_CMAC_POWER_HPF_CYCLES_SET(x)
(((x) << 0) & 0x0000000f) |
| 3326 #define PHY_ANALOG_CMAC_POWER_HPF_ATE_CMAC_POWER_HPF_WAIT_MSB
7 |
| 3327 #define PHY_ANALOG_CMAC_POWER_HPF_ATE_CMAC_POWER_HPF_WAIT_LSB
4 |
| 3328 #define PHY_ANALOG_CMAC_POWER_HPF_ATE_CMAC_POWER_HPF_WAIT_MASK
0x000000f0 |
| 3329 #define PHY_ANALOG_CMAC_POWER_HPF_ATE_CMAC_POWER_HPF_WAIT_GET(x)
(((x) & 0x000000f0) >> 4) |
| 3330 #define PHY_ANALOG_CMAC_POWER_HPF_ATE_CMAC_POWER_HPF_WAIT_SET(x)
(((x) << 4) & 0x000000f0) |
| 3331 |
| 3332 /* macros for rxdac_set1 */ |
| 3333 #define PHY_ANALOG_RXDAC_SET1_ADDRESS
0x000003c4 |
| 3334 #define PHY_ANALOG_RXDAC_SET1_OFFSET
0x000003c4 |
| 3335 #define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_MUX_MSB
1 |
| 3336 #define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_MUX_LSB
0 |
| 3337 #define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_MUX_MASK
0x00000003 |
| 3338 #define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_MUX_GET(x)
(((x) & 0x00000003) >> 0) |
| 3339 #define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_MUX_SET(x)
(((x) << 0) & 0x00000003) |
| 3340 #define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_HI_GAIN_MSB
4 |
| 3341 #define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_HI_GAIN_LSB
4 |
| 3342 #define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_HI_GAIN_MASK
0x00000010 |
| 3343 #define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_HI_GAIN_GET(x)
(((x) & 0x00000010) >> 4) |
| 3344 #define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_HI_GAIN_SET(x)
(((x) << 4) & 0x00000010) |
| 3345 #define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_CAL_WAIT_MSB
13 |
| 3346 #define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_CAL_WAIT_LSB
8 |
| 3347 #define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_CAL_WAIT_MASK
0x00003f00 |
| 3348 #define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_CAL_WAIT_GET(x)
(((x) & 0x00003f00) >> 8) |
| 3349 #define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_CAL_WAIT_SET(x)
(((x) << 8) & 0x00003f00) |
| 3350 #define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_CAL_MEASURE_TIME_MSB
19 |
| 3351 #define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_CAL_MEASURE_TIME_LSB
16 |
| 3352 #define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_CAL_MEASURE_TIME_MASK
0x000f0000 |
| 3353 #define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_CAL_MEASURE_TIME_GET(x)
(((x) & 0x000f0000) >> 16) |
| 3354 #define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_CAL_MEASURE_TIME_SET(x)
(((x) << 16) & 0x000f0000) |
| 3355 |
| 3356 /* macros for rxdac_set2 */ |
| 3357 #define PHY_ANALOG_RXDAC_SET2_ADDRESS
0x000003c8 |
| 3358 #define PHY_ANALOG_RXDAC_SET2_OFFSET
0x000003c8 |
| 3359 #define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_I_HI_MSB
4 |
| 3360 #define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_I_HI_LSB
0 |
| 3361 #define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_I_HI_MASK
0x0000001f |
| 3362 #define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_I_HI_GET(x)
(((x) & 0x0000001f) >> 0) |
| 3363 #define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_I_HI_SET(x)
(((x) << 0) & 0x0000001f) |
| 3364 #define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_Q_HI_MSB
12 |
| 3365 #define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_Q_HI_LSB
8 |
| 3366 #define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_Q_HI_MASK
0x00001f00 |
| 3367 #define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_Q_HI_GET(x)
(((x) & 0x00001f00) >> 8) |
| 3368 #define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_Q_HI_SET(x)
(((x) << 8) & 0x00001f00) |
| 3369 #define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_I_LOW_MSB
20 |
| 3370 #define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_I_LOW_LSB
16 |
| 3371 #define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_I_LOW_MASK
0x001f0000 |
| 3372 #define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_I_LOW_GET(x)
(((x) & 0x001f0000) >> 16) |
| 3373 #define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_I_LOW_SET(x)
(((x) << 16) & 0x001f0000) |
| 3374 #define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_Q_LOW_MSB
28 |
| 3375 #define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_Q_LOW_LSB
24 |
| 3376 #define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_Q_LOW_MASK
0x1f000000 |
| 3377 #define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_Q_LOW_GET(x)
(((x) & 0x1f000000) >> 24) |
| 3378 #define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_Q_LOW_SET(x)
(((x) << 24) & 0x1f000000) |
| 3379 |
| 3380 /* macros for rxdac_long_shift */ |
| 3381 #define PHY_ANALOG_RXDAC_LONG_SHIFT_ADDRESS
0x000003cc |
| 3382 #define PHY_ANALOG_RXDAC_LONG_SHIFT_OFFSET
0x000003cc |
| 3383 #define PHY_ANALOG_RXDAC_LONG_SHIFT_ATE_RXDAC_I_STATIC_MSB
4 |
| 3384 #define PHY_ANALOG_RXDAC_LONG_SHIFT_ATE_RXDAC_I_STATIC_LSB
0 |
| 3385 #define PHY_ANALOG_RXDAC_LONG_SHIFT_ATE_RXDAC_I_STATIC_MASK
0x0000001f |
| 3386 #define PHY_ANALOG_RXDAC_LONG_SHIFT_ATE_RXDAC_I_STATIC_GET(x)
(((x) & 0x0000001f) >> 0) |
| 3387 #define PHY_ANALOG_RXDAC_LONG_SHIFT_ATE_RXDAC_I_STATIC_SET(x)
(((x) << 0) & 0x0000001f) |
| 3388 #define PHY_ANALOG_RXDAC_LONG_SHIFT_ATE_RXDAC_Q_STATIC_MSB
12 |
| 3389 #define PHY_ANALOG_RXDAC_LONG_SHIFT_ATE_RXDAC_Q_STATIC_LSB
8 |
| 3390 #define PHY_ANALOG_RXDAC_LONG_SHIFT_ATE_RXDAC_Q_STATIC_MASK
0x00001f00 |
| 3391 #define PHY_ANALOG_RXDAC_LONG_SHIFT_ATE_RXDAC_Q_STATIC_GET(x)
(((x) & 0x00001f00) >> 8) |
| 3392 #define PHY_ANALOG_RXDAC_LONG_SHIFT_ATE_RXDAC_Q_STATIC_SET(x)
(((x) << 8) & 0x00001f00) |
| 3393 |
| 3394 /* macros for cmac_results_i */ |
| 3395 #define PHY_ANALOG_CMAC_RESULTS_I_ADDRESS
0x000003d0 |
| 3396 #define PHY_ANALOG_CMAC_RESULTS_I_OFFSET
0x000003d0 |
| 3397 #define PHY_ANALOG_CMAC_RESULTS_I_ATE_CMAC_RESULTS_MSB
31 |
| 3398 #define PHY_ANALOG_CMAC_RESULTS_I_ATE_CMAC_RESULTS_LSB
0 |
| 3399 #define PHY_ANALOG_CMAC_RESULTS_I_ATE_CMAC_RESULTS_MASK
0xffffffff |
| 3400 #define PHY_ANALOG_CMAC_RESULTS_I_ATE_CMAC_RESULTS_GET(x)
(((x) & 0xffffffff) >> 0) |
| 3401 #define PHY_ANALOG_CMAC_RESULTS_I_ATE_CMAC_RESULTS_SET(x)
(((x) << 0) & 0xffffffff) |
| 3402 |
| 3403 /* macros for cmac_results_q */ |
| 3404 #define PHY_ANALOG_CMAC_RESULTS_Q_ADDRESS
0x000003d4 |
| 3405 #define PHY_ANALOG_CMAC_RESULTS_Q_OFFSET
0x000003d4 |
| 3406 #define PHY_ANALOG_CMAC_RESULTS_Q_ATE_CMAC_RESULTS_MSB
31 |
| 3407 #define PHY_ANALOG_CMAC_RESULTS_Q_ATE_CMAC_RESULTS_LSB
0 |
| 3408 #define PHY_ANALOG_CMAC_RESULTS_Q_ATE_CMAC_RESULTS_MASK
0xffffffff |
| 3409 #define PHY_ANALOG_CMAC_RESULTS_Q_ATE_CMAC_RESULTS_GET(x)
(((x) & 0xffffffff) >> 0) |
| 3410 #define PHY_ANALOG_CMAC_RESULTS_Q_ATE_CMAC_RESULTS_SET(x)
(((x) << 0) & 0xffffffff) |
| 3411 |
| 3412 /* macros for PMU1 */ |
| 3413 #define PHY_ANALOG_PMU1_ADDRESS
0x00000740 |
| 3414 #define PHY_ANALOG_PMU1_OFFSET
0x00000740 |
| 3415 #define PHY_ANALOG_PMU1_SPARE_MSB
10 |
| 3416 #define PHY_ANALOG_PMU1_SPARE_LSB
0 |
| 3417 #define PHY_ANALOG_PMU1_SPARE_MASK
0x000007ff |
| 3418 #define PHY_ANALOG_PMU1_SPARE_GET(x)
(((x) & 0x000007ff) >> 0) |
| 3419 #define PHY_ANALOG_PMU1_SPARE_SET(x)
(((x) << 0) & 0x000007ff) |
| 3420 #define PHY_ANALOG_PMU1_OTP_V25_PWD_MSB
11 |
| 3421 #define PHY_ANALOG_PMU1_OTP_V25_PWD_LSB
11 |
| 3422 #define PHY_ANALOG_PMU1_OTP_V25_PWD_MASK
0x00000800 |
| 3423 #define PHY_ANALOG_PMU1_OTP_V25_PWD_GET(x)
(((x) & 0x00000800) >> 11) |
| 3424 #define PHY_ANALOG_PMU1_OTP_V25_PWD_SET(x)
(((x) << 11) & 0x00000800) |
| 3425 #define PHY_ANALOG_PMU1_PAREGON_MAN_MSB
12 |
| 3426 #define PHY_ANALOG_PMU1_PAREGON_MAN_LSB
12 |
| 3427 #define PHY_ANALOG_PMU1_PAREGON_MAN_MASK
0x00001000 |
| 3428 #define PHY_ANALOG_PMU1_PAREGON_MAN_GET(x)
(((x) & 0x00001000) >> 12) |
| 3429 #define PHY_ANALOG_PMU1_PAREGON_MAN_SET(x)
(((x) << 12) & 0x00001000) |
| 3430 #define PHY_ANALOG_PMU1_OTPREGON_MAN_MSB
13 |
| 3431 #define PHY_ANALOG_PMU1_OTPREGON_MAN_LSB
13 |
| 3432 #define PHY_ANALOG_PMU1_OTPREGON_MAN_MASK
0x00002000 |
| 3433 #define PHY_ANALOG_PMU1_OTPREGON_MAN_GET(x)
(((x) & 0x00002000) >> 13) |
| 3434 #define PHY_ANALOG_PMU1_OTPREGON_MAN_SET(x)
(((x) << 13) & 0x00002000) |
| 3435 #define PHY_ANALOG_PMU1_DREGON_MAN_MSB
14 |
| 3436 #define PHY_ANALOG_PMU1_DREGON_MAN_LSB
14 |
| 3437 #define PHY_ANALOG_PMU1_DREGON_MAN_MASK
0x00004000 |
| 3438 #define PHY_ANALOG_PMU1_DREGON_MAN_GET(x)
(((x) & 0x00004000) >> 14) |
| 3439 #define PHY_ANALOG_PMU1_DREGON_MAN_SET(x)
(((x) << 14) & 0x00004000) |
| 3440 #define PHY_ANALOG_PMU1_DISCONTMODEEN_MSB
15 |
| 3441 #define PHY_ANALOG_PMU1_DISCONTMODEEN_LSB
15 |
| 3442 #define PHY_ANALOG_PMU1_DISCONTMODEEN_MASK
0x00008000 |
| 3443 #define PHY_ANALOG_PMU1_DISCONTMODEEN_GET(x)
(((x) & 0x00008000) >> 15) |
| 3444 #define PHY_ANALOG_PMU1_DISCONTMODEEN_SET(x)
(((x) << 15) & 0x00008000) |
| 3445 #define PHY_ANALOG_PMU1_SWREGON_MAN_MSB
16 |
| 3446 #define PHY_ANALOG_PMU1_SWREGON_MAN_LSB
16 |
| 3447 #define PHY_ANALOG_PMU1_SWREGON_MAN_MASK
0x00010000 |
| 3448 #define PHY_ANALOG_PMU1_SWREGON_MAN_GET(x)
(((x) & 0x00010000) >> 16) |
| 3449 #define PHY_ANALOG_PMU1_SWREGON_MAN_SET(x)
(((x) << 16) & 0x00010000) |
| 3450 #define PHY_ANALOG_PMU1_SWREG_FREQCUR_MSB
18 |
| 3451 #define PHY_ANALOG_PMU1_SWREG_FREQCUR_LSB
17 |
| 3452 #define PHY_ANALOG_PMU1_SWREG_FREQCUR_MASK
0x00060000 |
| 3453 #define PHY_ANALOG_PMU1_SWREG_FREQCUR_GET(x)
(((x) & 0x00060000) >> 17) |
| 3454 #define PHY_ANALOG_PMU1_SWREG_FREQCUR_SET(x)
(((x) << 17) & 0x00060000) |
| 3455 #define PHY_ANALOG_PMU1_SWREG_FREQCAP_MSB
21 |
| 3456 #define PHY_ANALOG_PMU1_SWREG_FREQCAP_LSB
19 |
| 3457 #define PHY_ANALOG_PMU1_SWREG_FREQCAP_MASK
0x00380000 |
| 3458 #define PHY_ANALOG_PMU1_SWREG_FREQCAP_GET(x)
(((x) & 0x00380000) >> 19) |
| 3459 #define PHY_ANALOG_PMU1_SWREG_FREQCAP_SET(x)
(((x) << 19) & 0x00380000) |
| 3460 #define PHY_ANALOG_PMU1_SWREG_LVLCTR_MSB
23 |
| 3461 #define PHY_ANALOG_PMU1_SWREG_LVLCTR_LSB
22 |
| 3462 #define PHY_ANALOG_PMU1_SWREG_LVLCTR_MASK
0x00c00000 |
| 3463 #define PHY_ANALOG_PMU1_SWREG_LVLCTR_GET(x)
(((x) & 0x00c00000) >> 22) |
| 3464 #define PHY_ANALOG_PMU1_SWREG_LVLCTR_SET(x)
(((x) << 22) & 0x00c00000) |
| 3465 #define PHY_ANALOG_PMU1_SREG_LVLCTR_MSB
25 |
| 3466 #define PHY_ANALOG_PMU1_SREG_LVLCTR_LSB
24 |
| 3467 #define PHY_ANALOG_PMU1_SREG_LVLCTR_MASK
0x03000000 |
| 3468 #define PHY_ANALOG_PMU1_SREG_LVLCTR_GET(x)
(((x) & 0x03000000) >> 24) |
| 3469 #define PHY_ANALOG_PMU1_SREG_LVLCTR_SET(x)
(((x) << 24) & 0x03000000) |
| 3470 #define PHY_ANALOG_PMU1_DREG_LVLCTR_MSB
27 |
| 3471 #define PHY_ANALOG_PMU1_DREG_LVLCTR_LSB
26 |
| 3472 #define PHY_ANALOG_PMU1_DREG_LVLCTR_MASK
0x0c000000 |
| 3473 #define PHY_ANALOG_PMU1_DREG_LVLCTR_GET(x)
(((x) & 0x0c000000) >> 26) |
| 3474 #define PHY_ANALOG_PMU1_DREG_LVLCTR_SET(x)
(((x) << 26) & 0x0c000000) |
| 3475 #define PHY_ANALOG_PMU1_PAREG_XPNP_MSB
28 |
| 3476 #define PHY_ANALOG_PMU1_PAREG_XPNP_LSB
28 |
| 3477 #define PHY_ANALOG_PMU1_PAREG_XPNP_MASK
0x10000000 |
| 3478 #define PHY_ANALOG_PMU1_PAREG_XPNP_GET(x)
(((x) & 0x10000000) >> 28) |
| 3479 #define PHY_ANALOG_PMU1_PAREG_XPNP_SET(x)
(((x) << 28) & 0x10000000) |
| 3480 #define PHY_ANALOG_PMU1_PAREG_LVLCTR_MSB
31 |
| 3481 #define PHY_ANALOG_PMU1_PAREG_LVLCTR_LSB
29 |
| 3482 #define PHY_ANALOG_PMU1_PAREG_LVLCTR_MASK
0xe0000000 |
| 3483 #define PHY_ANALOG_PMU1_PAREG_LVLCTR_GET(x)
(((x) & 0xe0000000) >> 29) |
| 3484 #define PHY_ANALOG_PMU1_PAREG_LVLCTR_SET(x)
(((x) << 29) & 0xe0000000) |
| 3485 |
| 3486 /* macros for PMU2 */ |
| 3487 #define PHY_ANALOG_PMU2_ADDRESS
0x00000744 |
| 3488 #define PHY_ANALOG_PMU2_OFFSET
0x00000744 |
| 3489 #define PHY_ANALOG_PMU2_SPARE_MSB
7 |
| 3490 #define PHY_ANALOG_PMU2_SPARE_LSB
0 |
| 3491 #define PHY_ANALOG_PMU2_SPARE_MASK
0x000000ff |
| 3492 #define PHY_ANALOG_PMU2_SPARE_GET(x)
(((x) & 0x000000ff) >> 0) |
| 3493 #define PHY_ANALOG_PMU2_SPARE_SET(x)
(((x) << 0) & 0x000000ff) |
| 3494 #define PHY_ANALOG_PMU2_VBATT_1_3TOATB_MSB
8 |
| 3495 #define PHY_ANALOG_PMU2_VBATT_1_3TOATB_LSB
8 |
| 3496 #define PHY_ANALOG_PMU2_VBATT_1_3TOATB_MASK
0x00000100 |
| 3497 #define PHY_ANALOG_PMU2_VBATT_1_3TOATB_GET(x)
(((x) & 0x00000100) >> 8) |
| 3498 #define PHY_ANALOG_PMU2_VBATT_1_3TOATB_SET(x)
(((x) << 8) & 0x00000100) |
| 3499 #define PHY_ANALOG_PMU2_VBATT_1_2TOATB_MSB
9 |
| 3500 #define PHY_ANALOG_PMU2_VBATT_1_2TOATB_LSB
9 |
| 3501 #define PHY_ANALOG_PMU2_VBATT_1_2TOATB_MASK
0x00000200 |
| 3502 #define PHY_ANALOG_PMU2_VBATT_1_2TOATB_GET(x)
(((x) & 0x00000200) >> 9) |
| 3503 #define PHY_ANALOG_PMU2_VBATT_1_2TOATB_SET(x)
(((x) << 9) & 0x00000200) |
| 3504 #define PHY_ANALOG_PMU2_VBATT_2_3TOATB_MSB
10 |
| 3505 #define PHY_ANALOG_PMU2_VBATT_2_3TOATB_LSB
10 |
| 3506 #define PHY_ANALOG_PMU2_VBATT_2_3TOATB_MASK
0x00000400 |
| 3507 #define PHY_ANALOG_PMU2_VBATT_2_3TOATB_GET(x)
(((x) & 0x00000400) >> 10) |
| 3508 #define PHY_ANALOG_PMU2_VBATT_2_3TOATB_SET(x)
(((x) << 10) & 0x00000400) |
| 3509 #define PHY_ANALOG_PMU2_PWD_BANDGAP_MAN_MSB
11 |
| 3510 #define PHY_ANALOG_PMU2_PWD_BANDGAP_MAN_LSB
11 |
| 3511 #define PHY_ANALOG_PMU2_PWD_BANDGAP_MAN_MASK
0x00000800 |
| 3512 #define PHY_ANALOG_PMU2_PWD_BANDGAP_MAN_GET(x)
(((x) & 0x00000800) >> 11) |
| 3513 #define PHY_ANALOG_PMU2_PWD_BANDGAP_MAN_SET(x)
(((x) << 11) & 0x00000800) |
| 3514 #define PHY_ANALOG_PMU2_PWD_LFO_MAN_MSB
12 |
| 3515 #define PHY_ANALOG_PMU2_PWD_LFO_MAN_LSB
12 |
| 3516 #define PHY_ANALOG_PMU2_PWD_LFO_MAN_MASK
0x00001000 |
| 3517 #define PHY_ANALOG_PMU2_PWD_LFO_MAN_GET(x)
(((x) & 0x00001000) >> 12) |
| 3518 #define PHY_ANALOG_PMU2_PWD_LFO_MAN_SET(x)
(((x) << 12) & 0x00001000) |
| 3519 #define PHY_ANALOG_PMU2_VBATT_LT_3P2_MSB
13 |
| 3520 #define PHY_ANALOG_PMU2_VBATT_LT_3P2_LSB
13 |
| 3521 #define PHY_ANALOG_PMU2_VBATT_LT_3P2_MASK
0x00002000 |
| 3522 #define PHY_ANALOG_PMU2_VBATT_LT_3P2_GET(x)
(((x) & 0x00002000) >> 13) |
| 3523 #define PHY_ANALOG_PMU2_VBATT_LT_3P2_SET(x)
(((x) << 13) & 0x00002000) |
| 3524 #define PHY_ANALOG_PMU2_VBATT_LT_2P8_MSB
14 |
| 3525 #define PHY_ANALOG_PMU2_VBATT_LT_2P8_LSB
14 |
| 3526 #define PHY_ANALOG_PMU2_VBATT_LT_2P8_MASK
0x00004000 |
| 3527 #define PHY_ANALOG_PMU2_VBATT_LT_2P8_GET(x)
(((x) & 0x00004000) >> 14) |
| 3528 #define PHY_ANALOG_PMU2_VBATT_LT_2P8_SET(x)
(((x) << 14) & 0x00004000) |
| 3529 #define PHY_ANALOG_PMU2_VBATT_GT_4P2_MSB
15 |
| 3530 #define PHY_ANALOG_PMU2_VBATT_GT_4P2_LSB
15 |
| 3531 #define PHY_ANALOG_PMU2_VBATT_GT_4P2_MASK
0x00008000 |
| 3532 #define PHY_ANALOG_PMU2_VBATT_GT_4P2_GET(x)
(((x) & 0x00008000) >> 15) |
| 3533 #define PHY_ANALOG_PMU2_VBATT_GT_4P2_SET(x)
(((x) << 15) & 0x00008000) |
| 3534 #define PHY_ANALOG_PMU2_PMU_MAN_OVERRIDE_EN_MSB
16 |
| 3535 #define PHY_ANALOG_PMU2_PMU_MAN_OVERRIDE_EN_LSB
16 |
| 3536 #define PHY_ANALOG_PMU2_PMU_MAN_OVERRIDE_EN_MASK
0x00010000 |
| 3537 #define PHY_ANALOG_PMU2_PMU_MAN_OVERRIDE_EN_GET(x)
(((x) & 0x00010000) >> 16) |
| 3538 #define PHY_ANALOG_PMU2_PMU_MAN_OVERRIDE_EN_SET(x)
(((x) << 16) & 0x00010000) |
| 3539 #define PHY_ANALOG_PMU2_VBATT_GT_LVLCTR_MSB
18 |
| 3540 #define PHY_ANALOG_PMU2_VBATT_GT_LVLCTR_LSB
17 |
| 3541 #define PHY_ANALOG_PMU2_VBATT_GT_LVLCTR_MASK
0x00060000 |
| 3542 #define PHY_ANALOG_PMU2_VBATT_GT_LVLCTR_GET(x)
(((x) & 0x00060000) >> 17) |
| 3543 #define PHY_ANALOG_PMU2_VBATT_GT_LVLCTR_SET(x)
(((x) << 17) & 0x00060000) |
| 3544 #define PHY_ANALOG_PMU2_SWREGVSSL2ATB_MSB
19 |
| 3545 #define PHY_ANALOG_PMU2_SWREGVSSL2ATB_LSB
19 |
| 3546 #define PHY_ANALOG_PMU2_SWREGVSSL2ATB_MASK
0x00080000 |
| 3547 #define PHY_ANALOG_PMU2_SWREGVSSL2ATB_GET(x)
(((x) & 0x00080000) >> 19) |
| 3548 #define PHY_ANALOG_PMU2_SWREGVSSL2ATB_SET(x)
(((x) << 19) & 0x00080000) |
| 3549 #define PHY_ANALOG_PMU2_SWREGVSSL_LVLCTR_MSB
21 |
| 3550 #define PHY_ANALOG_PMU2_SWREGVSSL_LVLCTR_LSB
20 |
| 3551 #define PHY_ANALOG_PMU2_SWREGVSSL_LVLCTR_MASK
0x00300000 |
| 3552 #define PHY_ANALOG_PMU2_SWREGVSSL_LVLCTR_GET(x)
(((x) & 0x00300000) >> 20) |
| 3553 #define PHY_ANALOG_PMU2_SWREGVSSL_LVLCTR_SET(x)
(((x) << 20) & 0x00300000) |
| 3554 #define PHY_ANALOG_PMU2_SWREGVDDH2ATB_MSB
22 |
| 3555 #define PHY_ANALOG_PMU2_SWREGVDDH2ATB_LSB
22 |
| 3556 #define PHY_ANALOG_PMU2_SWREGVDDH2ATB_MASK
0x00400000 |
| 3557 #define PHY_ANALOG_PMU2_SWREGVDDH2ATB_GET(x)
(((x) & 0x00400000) >> 22) |
| 3558 #define PHY_ANALOG_PMU2_SWREGVDDH2ATB_SET(x)
(((x) << 22) & 0x00400000) |
| 3559 #define PHY_ANALOG_PMU2_SWREGVDDH_LVLCTR_MSB
24 |
| 3560 #define PHY_ANALOG_PMU2_SWREGVDDH_LVLCTR_LSB
23 |
| 3561 #define PHY_ANALOG_PMU2_SWREGVDDH_LVLCTR_MASK
0x01800000 |
| 3562 #define PHY_ANALOG_PMU2_SWREGVDDH_LVLCTR_GET(x)
(((x) & 0x01800000) >> 23) |
| 3563 #define PHY_ANALOG_PMU2_SWREGVDDH_LVLCTR_SET(x)
(((x) << 23) & 0x01800000) |
| 3564 #define PHY_ANALOG_PMU2_SWREG2ATB_MSB
27 |
| 3565 #define PHY_ANALOG_PMU2_SWREG2ATB_LSB
25 |
| 3566 #define PHY_ANALOG_PMU2_SWREG2ATB_MASK
0x0e000000 |
| 3567 #define PHY_ANALOG_PMU2_SWREG2ATB_GET(x)
(((x) & 0x0e000000) >> 25) |
| 3568 #define PHY_ANALOG_PMU2_SWREG2ATB_SET(x)
(((x) << 25) & 0x0e000000) |
| 3569 #define PHY_ANALOG_PMU2_OTPREG2ATB_MSB
28 |
| 3570 #define PHY_ANALOG_PMU2_OTPREG2ATB_LSB
28 |
| 3571 #define PHY_ANALOG_PMU2_OTPREG2ATB_MASK
0x10000000 |
| 3572 #define PHY_ANALOG_PMU2_OTPREG2ATB_GET(x)
(((x) & 0x10000000) >> 28) |
| 3573 #define PHY_ANALOG_PMU2_OTPREG2ATB_SET(x)
(((x) << 28) & 0x10000000) |
| 3574 #define PHY_ANALOG_PMU2_OTPREG_LVLCTR_MSB
30 |
| 3575 #define PHY_ANALOG_PMU2_OTPREG_LVLCTR_LSB
29 |
| 3576 #define PHY_ANALOG_PMU2_OTPREG_LVLCTR_MASK
0x60000000 |
| 3577 #define PHY_ANALOG_PMU2_OTPREG_LVLCTR_GET(x)
(((x) & 0x60000000) >> 29) |
| 3578 #define PHY_ANALOG_PMU2_OTPREG_LVLCTR_SET(x)
(((x) << 29) & 0x60000000) |
| 3579 #define PHY_ANALOG_PMU2_DREG_LVLCTR_MANOVR_EN_MSB
31 |
| 3580 #define PHY_ANALOG_PMU2_DREG_LVLCTR_MANOVR_EN_LSB
31 |
| 3581 #define PHY_ANALOG_PMU2_DREG_LVLCTR_MANOVR_EN_MASK
0x80000000 |
| 3582 #define PHY_ANALOG_PMU2_DREG_LVLCTR_MANOVR_EN_GET(x)
(((x) & 0x80000000) >> 31) |
| 3583 #define PHY_ANALOG_PMU2_DREG_LVLCTR_MANOVR_EN_SET(x)
(((x) << 31) & 0x80000000) |
| 3584 |
| 3585 |
| 3586 #ifndef __ASSEMBLER__ |
| 3587 |
| 3588 typedef struct analog_intf_athr_wlan_reg_reg_s { |
| 3589 volatile unsigned int RXRF_BIAS1; /*
0x0 - 0x4 */ |
| 3590 volatile unsigned int RXRF_BIAS2; /*
0x4 - 0x8 */ |
| 3591 volatile unsigned int RXRF_GAINSTAGES; /*
0x8 - 0xc */ |
| 3592 volatile unsigned int RXRF_AGC; /*
0xc - 0x10 */ |
| 3593 volatile char pad__0[0x30]; /*
0x10 - 0x40 */ |
| 3594 volatile unsigned int TXRF1; /*
0x40 - 0x44 */ |
| 3595 volatile unsigned int TXRF2; /*
0x44 - 0x48 */ |
| 3596 volatile unsigned int TXRF3; /*
0x48 - 0x4c */ |
| 3597 volatile unsigned int TXRF4; /*
0x4c - 0x50 */ |
| 3598 volatile unsigned int TXRF5; /*
0x50 - 0x54 */ |
| 3599 volatile unsigned int TXRF6; /*
0x54 - 0x58 */ |
| 3600 volatile unsigned int TXRF7; /*
0x58 - 0x5c */ |
| 3601 volatile unsigned int TXRF8; /*
0x5c - 0x60 */ |
| 3602 volatile unsigned int TXRF9; /*
0x60 - 0x64 */ |
| 3603 volatile unsigned int TXRF10; /*
0x64 - 0x68 */ |
| 3604 volatile unsigned int TXRF11; /*
0x68 - 0x6c */ |
| 3605 volatile unsigned int TXRF12; /*
0x6c - 0x70 */ |
| 3606 volatile char pad__1[0x10]; /*
0x70 - 0x80 */ |
| 3607 volatile unsigned int SYNTH1; /*
0x80 - 0x84 */ |
| 3608 volatile unsigned int SYNTH2; /*
0x84 - 0x88 */ |
| 3609 volatile unsigned int SYNTH3; /*
0x88 - 0x8c */ |
| 3610 volatile unsigned int SYNTH4; /*
0x8c - 0x90 */ |
| 3611 volatile unsigned int SYNTH5; /*
0x90 - 0x94 */ |
| 3612 volatile unsigned int SYNTH6; /*
0x94 - 0x98 */ |
| 3613 volatile unsigned int SYNTH7; /*
0x98 - 0x9c */ |
| 3614 volatile unsigned int SYNTH8; /*
0x9c - 0xa0 */ |
| 3615 volatile unsigned int SYNTH9; /*
0xa0 - 0xa4 */ |
| 3616 volatile unsigned int SYNTH10; /*
0xa4 - 0xa8 */ |
| 3617 volatile unsigned int SYNTH11; /*
0xa8 - 0xac */ |
| 3618 volatile unsigned int SYNTH12; /*
0xac - 0xb0 */ |
| 3619 volatile unsigned int SYNTH13; /*
0xb0 - 0xb4 */ |
| 3620 volatile unsigned int SYNTH14; /*
0xb4 - 0xb8 */ |
| 3621 volatile char pad__2[0x8]; /*
0xb8 - 0xc0 */ |
| 3622 volatile unsigned int BIAS1; /*
0xc0 - 0xc4 */ |
| 3623 volatile unsigned int BIAS2; /*
0xc4 - 0xc8 */ |
| 3624 volatile unsigned int BIAS3; /*
0xc8 - 0xcc */ |
| 3625 volatile unsigned int BIAS4; /*
0xcc - 0xd0 */ |
| 3626 volatile char pad__3[0x30]; /*
0xd0 - 0x100 */ |
| 3627 volatile unsigned int RXTX1; /* 0
x100 - 0x104 */ |
| 3628 volatile unsigned int RXTX2; /* 0
x104 - 0x108 */ |
| 3629 volatile unsigned int RXTX3; /* 0
x108 - 0x10c */ |
| 3630 volatile char pad__4[0x34]; /* 0
x10c - 0x140 */ |
| 3631 volatile unsigned int BB1; /* 0
x140 - 0x144 */ |
| 3632 volatile unsigned int BB2; /* 0
x144 - 0x148 */ |
| 3633 volatile unsigned int BB3; /* 0
x148 - 0x14c */ |
| 3634 volatile char pad__5[0x134]; /* 0
x14c - 0x280 */ |
| 3635 volatile unsigned int PLLCLKMODA; /* 0
x280 - 0x284 */ |
| 3636 volatile unsigned int PLLCLKMODA2; /* 0
x284 - 0x288 */ |
| 3637 volatile unsigned int TOP; /* 0
x288 - 0x28c */ |
| 3638 volatile unsigned int THERM; /* 0
x28c - 0x290 */ |
| 3639 volatile unsigned int XTAL; /* 0
x290 - 0x294 */ |
| 3640 volatile char pad__6[0xec]; /* 0
x294 - 0x380 */ |
| 3641 volatile unsigned int rbist_cntrl; /* 0
x380 - 0x384 */ |
| 3642 volatile unsigned int tx_dc_offset; /* 0
x384 - 0x388 */ |
| 3643 volatile unsigned int tx_tonegen0; /* 0
x388 - 0x38c */ |
| 3644 volatile unsigned int tx_tonegen1; /* 0
x38c - 0x390 */ |
| 3645 volatile unsigned int tx_lftonegen0; /* 0
x390 - 0x394 */ |
| 3646 volatile unsigned int tx_linear_ramp_i; /* 0
x394 - 0x398 */ |
| 3647 volatile unsigned int tx_linear_ramp_q; /* 0
x398 - 0x39c */ |
| 3648 volatile unsigned int tx_prbs_mag; /* 0
x39c - 0x3a0 */ |
| 3649 volatile unsigned int tx_prbs_seed_i; /* 0
x3a0 - 0x3a4 */ |
| 3650 volatile unsigned int tx_prbs_seed_q; /* 0
x3a4 - 0x3a8 */ |
| 3651 volatile unsigned int cmac_dc_cancel; /* 0
x3a8 - 0x3ac */ |
| 3652 volatile unsigned int cmac_dc_offset; /* 0
x3ac - 0x3b0 */ |
| 3653 volatile unsigned int cmac_corr; /* 0
x3b0 - 0x3b4 */ |
| 3654 volatile unsigned int cmac_power; /* 0
x3b4 - 0x3b8 */ |
| 3655 volatile unsigned int cmac_cross_corr; /* 0
x3b8 - 0x3bc */ |
| 3656 volatile unsigned int cmac_i2q2; /* 0
x3bc - 0x3c0 */ |
| 3657 volatile unsigned int cmac_power_hpf; /* 0
x3c0 - 0x3c4 */ |
| 3658 volatile unsigned int rxdac_set1; /* 0
x3c4 - 0x3c8 */ |
| 3659 volatile unsigned int rxdac_set2; /* 0
x3c8 - 0x3cc */ |
| 3660 volatile unsigned int rxdac_long_shift; /* 0
x3cc - 0x3d0 */ |
| 3661 volatile unsigned int cmac_results_i; /* 0
x3d0 - 0x3d4 */ |
| 3662 volatile unsigned int cmac_results_q; /* 0
x3d4 - 0x3d8 */ |
| 3663 volatile char pad__7[0x368]; /* 0
x3d8 - 0x740 */ |
| 3664 volatile unsigned int PMU1; /* 0
x740 - 0x744 */ |
| 3665 volatile unsigned int PMU2; /* 0
x744 - 0x748 */ |
| 3666 } analog_intf_athr_wlan_reg_reg_t; |
| 3667 |
| 3668 #endif /* __ASSEMBLER__ */ |
| 3669 |
| 3670 #endif /* _ANALOG_INTF_ATHR_WLAN_REG_REG_H_ */ |
| OLD | NEW |
|---|
Chromium Code Reviews
Issue 646055:
Atheros AR600x driver + build glue (Closed)
