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Side by Side Diff: chromeos/drivers/ath6kl/include/AR6002/hw4.0/hw/analog_intf_ares_reg.h

Issue 646055: Atheros AR600x driver + build glue (Closed)
Patch Set: Created 10 years, 10 months ago
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1 // ------------------------------------------------------------------
2 // Copyright (c) 2004-2007 Atheros Corporation. All rights reserved.
3 //
4 // This program is free software; you can redistribute it and/or modify
5 // it under the terms of the GNU General Public License version 2 as
6 // published by the Free Software Foundation;
7 //
8 // Software distributed under the License is distributed on an "AS
9 // IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
10 // implied. See the License for the specific language governing
11 // rights and limitations under the License.
12 //
13 //
14 // ------------------------------------------------------------------
15 //===================================================================
16 // Author(s): ="Atheros"
17 //===================================================================
18
19 /* Copyright (C) 2009 Denali Software Inc. All rights reserved */
20 /* THIS FILE IS AUTOMATICALLY GENERATED BY DENALI BLUEPRINT, DO NOT EDIT */
21
22
23 #ifndef _ANALOG_INTF_ARES_REG_REG_H_
24 #define _ANALOG_INTF_ARES_REG_REG_H_
25
26
27 /* macros for RXRF_BIAS1 */
28 #define PHY_ANALOG_RXRF_BIAS1_ADDRESS 0x00000000
29 #define PHY_ANALOG_RXRF_BIAS1_OFFSET 0x00000000
30 #define PHY_ANALOG_RXRF_BIAS1_SPARE_MSB 0
31 #define PHY_ANALOG_RXRF_BIAS1_SPARE_LSB 0
32 #define PHY_ANALOG_RXRF_BIAS1_SPARE_MASK 0x00000001
33 #define PHY_ANALOG_RXRF_BIAS1_SPARE_GET(x) (((x) & 0x00000001) >> 0)
34 #define PHY_ANALOG_RXRF_BIAS1_SPARE_SET(x) (((x) << 0) & 0x00000001)
35 #define PHY_ANALOG_RXRF_BIAS1_PWD_IR25SPARE_MSB 3
36 #define PHY_ANALOG_RXRF_BIAS1_PWD_IR25SPARE_LSB 1
37 #define PHY_ANALOG_RXRF_BIAS1_PWD_IR25SPARE_MASK 0x0000000e
38 #define PHY_ANALOG_RXRF_BIAS1_PWD_IR25SPARE_GET(x) (((x) & 0x0000000e) >> 1)
39 #define PHY_ANALOG_RXRF_BIAS1_PWD_IR25SPARE_SET(x) (((x) << 1) & 0x0000000e)
40 #define PHY_ANALOG_RXRF_BIAS1_PWD_IR25LO18_MSB 6
41 #define PHY_ANALOG_RXRF_BIAS1_PWD_IR25LO18_LSB 4
42 #define PHY_ANALOG_RXRF_BIAS1_PWD_IR25LO18_MASK 0x00000070
43 #define PHY_ANALOG_RXRF_BIAS1_PWD_IR25LO18_GET(x) (((x) & 0x00000070) >> 4)
44 #define PHY_ANALOG_RXRF_BIAS1_PWD_IR25LO18_SET(x) (((x) << 4) & 0x00000070)
45 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC25LO36_MSB 9
46 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC25LO36_LSB 7
47 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC25LO36_MASK 0x00000380
48 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC25LO36_GET(x) (((x) & 0x00000380) >> 7)
49 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC25LO36_SET(x) (((x) << 7) & 0x00000380)
50 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC25MXR2_5GH_MSB 12
51 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC25MXR2_5GH_LSB 10
52 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC25MXR2_5GH_MASK 0x00001c00
53 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC25MXR2_5GH_GET(x) (((x) & 0x00001c00) >> 10)
54 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC25MXR2_5GH_SET(x) (((x) << 10) & 0x00001c00)
55 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC25MXR5GH_MSB 15
56 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC25MXR5GH_LSB 13
57 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC25MXR5GH_MASK 0x0000e000
58 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC25MXR5GH_GET(x) (((x) & 0x0000e000) >> 13)
59 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC25MXR5GH_SET(x) (((x) << 13) & 0x0000e000)
60 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC25VGA5G_MSB 18
61 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC25VGA5G_LSB 16
62 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC25VGA5G_MASK 0x00070000
63 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC25VGA5G_GET(x) (((x) & 0x00070000) >> 16)
64 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC25VGA5G_SET(x) (((x) << 16) & 0x00070000)
65 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC75LNA5G_MSB 21
66 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC75LNA5G_LSB 19
67 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC75LNA5G_MASK 0x00380000
68 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC75LNA5G_GET(x) (((x) & 0x00380000) >> 19)
69 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC75LNA5G_SET(x) (((x) << 19) & 0x00380000)
70 #define PHY_ANALOG_RXRF_BIAS1_PWD_IR25LO24_MSB 24
71 #define PHY_ANALOG_RXRF_BIAS1_PWD_IR25LO24_LSB 22
72 #define PHY_ANALOG_RXRF_BIAS1_PWD_IR25LO24_MASK 0x01c00000
73 #define PHY_ANALOG_RXRF_BIAS1_PWD_IR25LO24_GET(x) (((x) & 0x01c00000) >> 22)
74 #define PHY_ANALOG_RXRF_BIAS1_PWD_IR25LO24_SET(x) (((x) << 22) & 0x01c00000)
75 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC25MXR2GH_MSB 27
76 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC25MXR2GH_LSB 25
77 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC25MXR2GH_MASK 0x0e000000
78 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC25MXR2GH_GET(x) (((x) & 0x0e000000) >> 25)
79 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC25MXR2GH_SET(x) (((x) << 25) & 0x0e000000)
80 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC75LNA2G_MSB 30
81 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC75LNA2G_LSB 28
82 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC75LNA2G_MASK 0x70000000
83 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC75LNA2G_GET(x) (((x) & 0x70000000) >> 28)
84 #define PHY_ANALOG_RXRF_BIAS1_PWD_IC75LNA2G_SET(x) (((x) << 28) & 0x70000000)
85 #define PHY_ANALOG_RXRF_BIAS1_PWD_BIAS_MSB 31
86 #define PHY_ANALOG_RXRF_BIAS1_PWD_BIAS_LSB 31
87 #define PHY_ANALOG_RXRF_BIAS1_PWD_BIAS_MASK 0x80000000
88 #define PHY_ANALOG_RXRF_BIAS1_PWD_BIAS_GET(x) (((x) & 0x80000000) >> 31)
89 #define PHY_ANALOG_RXRF_BIAS1_PWD_BIAS_SET(x) (((x) << 31) & 0x80000000)
90
91 /* macros for RXRF_BIAS2 */
92 #define PHY_ANALOG_RXRF_BIAS2_ADDRESS 0x00000004
93 #define PHY_ANALOG_RXRF_BIAS2_OFFSET 0x00000004
94 #define PHY_ANALOG_RXRF_BIAS2_SPARE_MSB 0
95 #define PHY_ANALOG_RXRF_BIAS2_SPARE_LSB 0
96 #define PHY_ANALOG_RXRF_BIAS2_SPARE_MASK 0x00000001
97 #define PHY_ANALOG_RXRF_BIAS2_SPARE_GET(x) (((x) & 0x00000001) >> 0)
98 #define PHY_ANALOG_RXRF_BIAS2_SPARE_SET(x) (((x) << 0) & 0x00000001)
99 #define PHY_ANALOG_RXRF_BIAS2_PKEN_MSB 3
100 #define PHY_ANALOG_RXRF_BIAS2_PKEN_LSB 1
101 #define PHY_ANALOG_RXRF_BIAS2_PKEN_MASK 0x0000000e
102 #define PHY_ANALOG_RXRF_BIAS2_PKEN_GET(x) (((x) & 0x0000000e) >> 1)
103 #define PHY_ANALOG_RXRF_BIAS2_PKEN_SET(x) (((x) << 1) & 0x0000000e)
104 #define PHY_ANALOG_RXRF_BIAS2_VCMVALUE_MSB 6
105 #define PHY_ANALOG_RXRF_BIAS2_VCMVALUE_LSB 4
106 #define PHY_ANALOG_RXRF_BIAS2_VCMVALUE_MASK 0x00000070
107 #define PHY_ANALOG_RXRF_BIAS2_VCMVALUE_GET(x) (((x) & 0x00000070) >> 4)
108 #define PHY_ANALOG_RXRF_BIAS2_VCMVALUE_SET(x) (((x) << 4) & 0x00000070)
109 #define PHY_ANALOG_RXRF_BIAS2_PWD_VCMBUF_MSB 7
110 #define PHY_ANALOG_RXRF_BIAS2_PWD_VCMBUF_LSB 7
111 #define PHY_ANALOG_RXRF_BIAS2_PWD_VCMBUF_MASK 0x00000080
112 #define PHY_ANALOG_RXRF_BIAS2_PWD_VCMBUF_GET(x) (((x) & 0x00000080) >> 7)
113 #define PHY_ANALOG_RXRF_BIAS2_PWD_VCMBUF_SET(x) (((x) << 7) & 0x00000080)
114 #define PHY_ANALOG_RXRF_BIAS2_PWD_IR25AGC5GH_MSB 10
115 #define PHY_ANALOG_RXRF_BIAS2_PWD_IR25AGC5GH_LSB 8
116 #define PHY_ANALOG_RXRF_BIAS2_PWD_IR25AGC5GH_MASK 0x00000700
117 #define PHY_ANALOG_RXRF_BIAS2_PWD_IR25AGC5GH_GET(x) (((x) & 0x00000700) >> 8)
118 #define PHY_ANALOG_RXRF_BIAS2_PWD_IR25AGC5GH_SET(x) (((x) << 8) & 0x00000700)
119 #define PHY_ANALOG_RXRF_BIAS2_PWD_IR25AGC5G_MSB 13
120 #define PHY_ANALOG_RXRF_BIAS2_PWD_IR25AGC5G_LSB 11
121 #define PHY_ANALOG_RXRF_BIAS2_PWD_IR25AGC5G_MASK 0x00003800
122 #define PHY_ANALOG_RXRF_BIAS2_PWD_IR25AGC5G_GET(x) (((x) & 0x00003800) >> 11)
123 #define PHY_ANALOG_RXRF_BIAS2_PWD_IR25AGC5G_SET(x) (((x) << 11) & 0x00003800)
124 #define PHY_ANALOG_RXRF_BIAS2_PWD_IC25AGC5G_MSB 16
125 #define PHY_ANALOG_RXRF_BIAS2_PWD_IC25AGC5G_LSB 14
126 #define PHY_ANALOG_RXRF_BIAS2_PWD_IC25AGC5G_MASK 0x0001c000
127 #define PHY_ANALOG_RXRF_BIAS2_PWD_IC25AGC5G_GET(x) (((x) & 0x0001c000) >> 14)
128 #define PHY_ANALOG_RXRF_BIAS2_PWD_IC25AGC5G_SET(x) (((x) << 14) & 0x0001c000)
129 #define PHY_ANALOG_RXRF_BIAS2_PWD_IR25AGC2GH_MSB 19
130 #define PHY_ANALOG_RXRF_BIAS2_PWD_IR25AGC2GH_LSB 17
131 #define PHY_ANALOG_RXRF_BIAS2_PWD_IR25AGC2GH_MASK 0x000e0000
132 #define PHY_ANALOG_RXRF_BIAS2_PWD_IR25AGC2GH_GET(x) (((x) & 0x000e0000) >> 17)
133 #define PHY_ANALOG_RXRF_BIAS2_PWD_IR25AGC2GH_SET(x) (((x) << 17) & 0x000e0000)
134 #define PHY_ANALOG_RXRF_BIAS2_PWD_IR25AGC2G_MSB 22
135 #define PHY_ANALOG_RXRF_BIAS2_PWD_IR25AGC2G_LSB 20
136 #define PHY_ANALOG_RXRF_BIAS2_PWD_IR25AGC2G_MASK 0x00700000
137 #define PHY_ANALOG_RXRF_BIAS2_PWD_IR25AGC2G_GET(x) (((x) & 0x00700000) >> 20)
138 #define PHY_ANALOG_RXRF_BIAS2_PWD_IR25AGC2G_SET(x) (((x) << 20) & 0x00700000)
139 #define PHY_ANALOG_RXRF_BIAS2_PWD_IC25AGC2G_MSB 25
140 #define PHY_ANALOG_RXRF_BIAS2_PWD_IC25AGC2G_LSB 23
141 #define PHY_ANALOG_RXRF_BIAS2_PWD_IC25AGC2G_MASK 0x03800000
142 #define PHY_ANALOG_RXRF_BIAS2_PWD_IC25AGC2G_GET(x) (((x) & 0x03800000) >> 23)
143 #define PHY_ANALOG_RXRF_BIAS2_PWD_IC25AGC2G_SET(x) (((x) << 23) & 0x03800000)
144 #define PHY_ANALOG_RXRF_BIAS2_PWD_IC25VCMBUF_MSB 28
145 #define PHY_ANALOG_RXRF_BIAS2_PWD_IC25VCMBUF_LSB 26
146 #define PHY_ANALOG_RXRF_BIAS2_PWD_IC25VCMBUF_MASK 0x1c000000
147 #define PHY_ANALOG_RXRF_BIAS2_PWD_IC25VCMBUF_GET(x) (((x) & 0x1c000000) >> 26)
148 #define PHY_ANALOG_RXRF_BIAS2_PWD_IC25VCMBUF_SET(x) (((x) << 26) & 0x1c000000)
149 #define PHY_ANALOG_RXRF_BIAS2_PWD_IR25VCM_MSB 31
150 #define PHY_ANALOG_RXRF_BIAS2_PWD_IR25VCM_LSB 29
151 #define PHY_ANALOG_RXRF_BIAS2_PWD_IR25VCM_MASK 0xe0000000
152 #define PHY_ANALOG_RXRF_BIAS2_PWD_IR25VCM_GET(x) (((x) & 0xe0000000) >> 29)
153 #define PHY_ANALOG_RXRF_BIAS2_PWD_IR25VCM_SET(x) (((x) << 29) & 0xe0000000)
154
155 /* macros for RXRF_GAINSTAGES */
156 #define PHY_ANALOG_RXRF_GAINSTAGES_ADDRESS 0x00000008
157 #define PHY_ANALOG_RXRF_GAINSTAGES_OFFSET 0x00000008
158 #define PHY_ANALOG_RXRF_GAINSTAGES_SPARE_MSB 0
159 #define PHY_ANALOG_RXRF_GAINSTAGES_SPARE_LSB 0
160 #define PHY_ANALOG_RXRF_GAINSTAGES_SPARE_MASK 0x00000001
161 #define PHY_ANALOG_RXRF_GAINSTAGES_SPARE_GET(x) (((x) & 0x00000001) >> 0)
162 #define PHY_ANALOG_RXRF_GAINSTAGES_SPARE_SET(x) (((x) << 0) & 0x00000001)
163 #define PHY_ANALOG_RXRF_GAINSTAGES_LNAON_CALDC_MSB 1
164 #define PHY_ANALOG_RXRF_GAINSTAGES_LNAON_CALDC_LSB 1
165 #define PHY_ANALOG_RXRF_GAINSTAGES_LNAON_CALDC_MASK 0x00000002
166 #define PHY_ANALOG_RXRF_GAINSTAGES_LNAON_CALDC_GET(x) (((x) & 0x00000002) >> 1)
167 #define PHY_ANALOG_RXRF_GAINSTAGES_LNAON_CALDC_SET(x) (((x) << 1) & 0x00000002)
168 #define PHY_ANALOG_RXRF_GAINSTAGES_VGA5G_CAP_MSB 3
169 #define PHY_ANALOG_RXRF_GAINSTAGES_VGA5G_CAP_LSB 2
170 #define PHY_ANALOG_RXRF_GAINSTAGES_VGA5G_CAP_MASK 0x0000000c
171 #define PHY_ANALOG_RXRF_GAINSTAGES_VGA5G_CAP_GET(x) (((x) & 0x0000000c) >> 2)
172 #define PHY_ANALOG_RXRF_GAINSTAGES_VGA5G_CAP_SET(x) (((x) << 2) & 0x0000000c)
173 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA5G_CAP_MSB 5
174 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA5G_CAP_LSB 4
175 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA5G_CAP_MASK 0x00000030
176 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA5G_CAP_GET(x) (((x) & 0x00000030) >> 4)
177 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA5G_CAP_SET(x) (((x) << 4) & 0x00000030)
178 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA5G_SHORTINP_MSB 6
179 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA5G_SHORTINP_LSB 6
180 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA5G_SHORTINP_MASK 0x00000040
181 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA5G_SHORTINP_GET(x) (((x) & 0x00000040) >> 6)
182 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA5G_SHORTINP_SET(x) (((x) << 6) & 0x00000040)
183 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LO5G_MSB 7
184 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LO5G_LSB 7
185 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LO5G_MASK 0x00000080
186 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LO5G_GET(x) (((x) & 0x00000080) >> 7)
187 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LO5G_SET(x) (((x) << 7) & 0x00000080)
188 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_VGA5G_MSB 8
189 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_VGA5G_LSB 8
190 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_VGA5G_MASK 0x00000100
191 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_VGA5G_GET(x) (((x) & 0x00000100) >> 8)
192 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_VGA5G_SET(x) (((x) << 8) & 0x00000100)
193 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_MXR5G_MSB 9
194 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_MXR5G_LSB 9
195 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_MXR5G_MASK 0x00000200
196 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_MXR5G_GET(x) (((x) & 0x00000200) >> 9)
197 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_MXR5G_SET(x) (((x) << 9) & 0x00000200)
198 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LNA5G_MSB 10
199 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LNA5G_LSB 10
200 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LNA5G_MASK 0x00000400
201 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LNA5G_GET(x) (((x) & 0x00000400) >> 10)
202 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LNA5G_SET(x) (((x) << 10) & 0x00000400)
203 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_CAP_MSB 12
204 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_CAP_LSB 11
205 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_CAP_MASK 0x00001800
206 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_CAP_GET(x) (((x) & 0x00001800) >> 11)
207 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_CAP_SET(x) (((x) << 11) & 0x00001800)
208 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_SHORTINP_MSB 13
209 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_SHORTINP_LSB 13
210 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_SHORTINP_MASK 0x00002000
211 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_SHORTINP_GET(x) (((x) & 0x00002000) >> 13)
212 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_SHORTINP_SET(x) (((x) << 13) & 0x00002000)
213 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_LP_MSB 14
214 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_LP_LSB 14
215 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_LP_MASK 0x00004000
216 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_LP_GET(x) (((x) & 0x00004000) >> 14)
217 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_LP_SET(x) (((x) << 14) & 0x00004000)
218 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LO2G_MSB 15
219 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LO2G_LSB 15
220 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LO2G_MASK 0x00008000
221 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LO2G_GET(x) (((x) & 0x00008000) >> 15)
222 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LO2G_SET(x) (((x) << 15) & 0x00008000)
223 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_MXR2G_MSB 16
224 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_MXR2G_LSB 16
225 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_MXR2G_MASK 0x00010000
226 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_MXR2G_GET(x) (((x) & 0x00010000) >> 16)
227 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_MXR2G_SET(x) (((x) << 16) & 0x00010000)
228 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LNA2G_MSB 17
229 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LNA2G_LSB 17
230 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LNA2G_MASK 0x00020000
231 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LNA2G_GET(x) (((x) & 0x00020000) >> 17)
232 #define PHY_ANALOG_RXRF_GAINSTAGES_PWD_LNA2G_SET(x) (((x) << 17) & 0x00020000)
233 #define PHY_ANALOG_RXRF_GAINSTAGES_MXR5G_GAIN_OVR_MSB 19
234 #define PHY_ANALOG_RXRF_GAINSTAGES_MXR5G_GAIN_OVR_LSB 18
235 #define PHY_ANALOG_RXRF_GAINSTAGES_MXR5G_GAIN_OVR_MASK 0x000c0000
236 #define PHY_ANALOG_RXRF_GAINSTAGES_MXR5G_GAIN_OVR_GET(x) (((x) & 0x000c0000) >> 18)
237 #define PHY_ANALOG_RXRF_GAINSTAGES_MXR5G_GAIN_OVR_SET(x) (((x) << 18) & 0x000c0000)
238 #define PHY_ANALOG_RXRF_GAINSTAGES_VGA5G_GAIN_OVR_MSB 22
239 #define PHY_ANALOG_RXRF_GAINSTAGES_VGA5G_GAIN_OVR_LSB 20
240 #define PHY_ANALOG_RXRF_GAINSTAGES_VGA5G_GAIN_OVR_MASK 0x00700000
241 #define PHY_ANALOG_RXRF_GAINSTAGES_VGA5G_GAIN_OVR_GET(x) (((x) & 0x00700000) >> 20)
242 #define PHY_ANALOG_RXRF_GAINSTAGES_VGA5G_GAIN_OVR_SET(x) (((x) << 20) & 0x00700000)
243 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA5G_GAIN_OVR_MSB 25
244 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA5G_GAIN_OVR_LSB 23
245 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA5G_GAIN_OVR_MASK 0x03800000
246 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA5G_GAIN_OVR_GET(x) (((x) & 0x03800000) >> 23)
247 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA5G_GAIN_OVR_SET(x) (((x) << 23) & 0x03800000)
248 #define PHY_ANALOG_RXRF_GAINSTAGES_MXR2G_GAIN_OVR_MSB 27
249 #define PHY_ANALOG_RXRF_GAINSTAGES_MXR2G_GAIN_OVR_LSB 26
250 #define PHY_ANALOG_RXRF_GAINSTAGES_MXR2G_GAIN_OVR_MASK 0x0c000000
251 #define PHY_ANALOG_RXRF_GAINSTAGES_MXR2G_GAIN_OVR_GET(x) (((x) & 0x0c000000) >> 26)
252 #define PHY_ANALOG_RXRF_GAINSTAGES_MXR2G_GAIN_OVR_SET(x) (((x) << 26) & 0x0c000000)
253 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_GAIN_OVR_MSB 30
254 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_GAIN_OVR_LSB 28
255 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_GAIN_OVR_MASK 0x70000000
256 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_GAIN_OVR_GET(x) (((x) & 0x70000000) >> 28)
257 #define PHY_ANALOG_RXRF_GAINSTAGES_LNA2G_GAIN_OVR_SET(x) (((x) << 28) & 0x70000000)
258 #define PHY_ANALOG_RXRF_GAINSTAGES_RX_OVERRIDE_MSB 31
259 #define PHY_ANALOG_RXRF_GAINSTAGES_RX_OVERRIDE_LSB 31
260 #define PHY_ANALOG_RXRF_GAINSTAGES_RX_OVERRIDE_MASK 0x80000000
261 #define PHY_ANALOG_RXRF_GAINSTAGES_RX_OVERRIDE_GET(x) (((x) & 0x80000000) >> 31)
262 #define PHY_ANALOG_RXRF_GAINSTAGES_RX_OVERRIDE_SET(x) (((x) << 31) & 0x80000000)
263
264 /* macros for RXRF_AGC */
265 #define PHY_ANALOG_RXRF_AGC_ADDRESS 0x0000000c
266 #define PHY_ANALOG_RXRF_AGC_OFFSET 0x0000000c
267 #define PHY_ANALOG_RXRF_AGC_SPARE_MSB 5
268 #define PHY_ANALOG_RXRF_AGC_SPARE_LSB 0
269 #define PHY_ANALOG_RXRF_AGC_SPARE_MASK 0x0000003f
270 #define PHY_ANALOG_RXRF_AGC_SPARE_GET(x) (((x) & 0x0000003f) >> 0)
271 #define PHY_ANALOG_RXRF_AGC_SPARE_SET(x) (((x) << 0) & 0x0000003f)
272 #define PHY_ANALOG_RXRF_AGC_AGC_FALL_CTRL_MSB 8
273 #define PHY_ANALOG_RXRF_AGC_AGC_FALL_CTRL_LSB 6
274 #define PHY_ANALOG_RXRF_AGC_AGC_FALL_CTRL_MASK 0x000001c0
275 #define PHY_ANALOG_RXRF_AGC_AGC_FALL_CTRL_GET(x) (((x) & 0x000001c0) >> 6)
276 #define PHY_ANALOG_RXRF_AGC_AGC_FALL_CTRL_SET(x) (((x) << 6) & 0x000001c0)
277 #define PHY_ANALOG_RXRF_AGC_AGC5G_CALDAC_OVR_MSB 14
278 #define PHY_ANALOG_RXRF_AGC_AGC5G_CALDAC_OVR_LSB 9
279 #define PHY_ANALOG_RXRF_AGC_AGC5G_CALDAC_OVR_MASK 0x00007e00
280 #define PHY_ANALOG_RXRF_AGC_AGC5G_CALDAC_OVR_GET(x) (((x) & 0x00007e00) >> 9)
281 #define PHY_ANALOG_RXRF_AGC_AGC5G_CALDAC_OVR_SET(x) (((x) << 9) & 0x00007e00)
282 #define PHY_ANALOG_RXRF_AGC_AGC5G_DBDAC_OVR_MSB 18
283 #define PHY_ANALOG_RXRF_AGC_AGC5G_DBDAC_OVR_LSB 15
284 #define PHY_ANALOG_RXRF_AGC_AGC5G_DBDAC_OVR_MASK 0x00078000
285 #define PHY_ANALOG_RXRF_AGC_AGC5G_DBDAC_OVR_GET(x) (((x) & 0x00078000) >> 15)
286 #define PHY_ANALOG_RXRF_AGC_AGC5G_DBDAC_OVR_SET(x) (((x) << 15) & 0x00078000)
287 #define PHY_ANALOG_RXRF_AGC_AGC2G_CALDAC_OVR_MSB 24
288 #define PHY_ANALOG_RXRF_AGC_AGC2G_CALDAC_OVR_LSB 19
289 #define PHY_ANALOG_RXRF_AGC_AGC2G_CALDAC_OVR_MASK 0x01f80000
290 #define PHY_ANALOG_RXRF_AGC_AGC2G_CALDAC_OVR_GET(x) (((x) & 0x01f80000) >> 19)
291 #define PHY_ANALOG_RXRF_AGC_AGC2G_CALDAC_OVR_SET(x) (((x) << 19) & 0x01f80000)
292 #define PHY_ANALOG_RXRF_AGC_AGC2G_DBDAC_OVR_MSB 28
293 #define PHY_ANALOG_RXRF_AGC_AGC2G_DBDAC_OVR_LSB 25
294 #define PHY_ANALOG_RXRF_AGC_AGC2G_DBDAC_OVR_MASK 0x1e000000
295 #define PHY_ANALOG_RXRF_AGC_AGC2G_DBDAC_OVR_GET(x) (((x) & 0x1e000000) >> 25)
296 #define PHY_ANALOG_RXRF_AGC_AGC2G_DBDAC_OVR_SET(x) (((x) << 25) & 0x1e000000)
297 #define PHY_ANALOG_RXRF_AGC_AGC_CAL_OVR_MSB 29
298 #define PHY_ANALOG_RXRF_AGC_AGC_CAL_OVR_LSB 29
299 #define PHY_ANALOG_RXRF_AGC_AGC_CAL_OVR_MASK 0x20000000
300 #define PHY_ANALOG_RXRF_AGC_AGC_CAL_OVR_GET(x) (((x) & 0x20000000) >> 29)
301 #define PHY_ANALOG_RXRF_AGC_AGC_CAL_OVR_SET(x) (((x) << 29) & 0x20000000)
302 #define PHY_ANALOG_RXRF_AGC_AGC_ON_OVR_MSB 30
303 #define PHY_ANALOG_RXRF_AGC_AGC_ON_OVR_LSB 30
304 #define PHY_ANALOG_RXRF_AGC_AGC_ON_OVR_MASK 0x40000000
305 #define PHY_ANALOG_RXRF_AGC_AGC_ON_OVR_GET(x) (((x) & 0x40000000) >> 30)
306 #define PHY_ANALOG_RXRF_AGC_AGC_ON_OVR_SET(x) (((x) << 30) & 0x40000000)
307 #define PHY_ANALOG_RXRF_AGC_AGC_OVERRIDE_MSB 31
308 #define PHY_ANALOG_RXRF_AGC_AGC_OVERRIDE_LSB 31
309 #define PHY_ANALOG_RXRF_AGC_AGC_OVERRIDE_MASK 0x80000000
310 #define PHY_ANALOG_RXRF_AGC_AGC_OVERRIDE_GET(x) (((x) & 0x80000000) >> 31)
311 #define PHY_ANALOG_RXRF_AGC_AGC_OVERRIDE_SET(x) (((x) << 31) & 0x80000000)
312
313 /* macros for TXRF1 */
314 #define PHY_ANALOG_TXRF1_ADDRESS 0x00000040
315 #define PHY_ANALOG_TXRF1_OFFSET 0x00000040
316 #define PHY_ANALOG_TXRF1_DCAS2G_MSB 2
317 #define PHY_ANALOG_TXRF1_DCAS2G_LSB 0
318 #define PHY_ANALOG_TXRF1_DCAS2G_MASK 0x00000007
319 #define PHY_ANALOG_TXRF1_DCAS2G_GET(x) (((x) & 0x00000007) >> 0)
320 #define PHY_ANALOG_TXRF1_DCAS2G_SET(x) (((x) << 0) & 0x00000007)
321 #define PHY_ANALOG_TXRF1_OB2G_PALOFF_MSB 5
322 #define PHY_ANALOG_TXRF1_OB2G_PALOFF_LSB 3
323 #define PHY_ANALOG_TXRF1_OB2G_PALOFF_MASK 0x00000038
324 #define PHY_ANALOG_TXRF1_OB2G_PALOFF_GET(x) (((x) & 0x00000038) >> 3)
325 #define PHY_ANALOG_TXRF1_OB2G_PALOFF_SET(x) (((x) << 3) & 0x00000038)
326 #define PHY_ANALOG_TXRF1_OB2G_QAM_MSB 8
327 #define PHY_ANALOG_TXRF1_OB2G_QAM_LSB 6
328 #define PHY_ANALOG_TXRF1_OB2G_QAM_MASK 0x000001c0
329 #define PHY_ANALOG_TXRF1_OB2G_QAM_GET(x) (((x) & 0x000001c0) >> 6)
330 #define PHY_ANALOG_TXRF1_OB2G_QAM_SET(x) (((x) << 6) & 0x000001c0)
331 #define PHY_ANALOG_TXRF1_OB2G_PSK_MSB 11
332 #define PHY_ANALOG_TXRF1_OB2G_PSK_LSB 9
333 #define PHY_ANALOG_TXRF1_OB2G_PSK_MASK 0x00000e00
334 #define PHY_ANALOG_TXRF1_OB2G_PSK_GET(x) (((x) & 0x00000e00) >> 9)
335 #define PHY_ANALOG_TXRF1_OB2G_PSK_SET(x) (((x) << 9) & 0x00000e00)
336 #define PHY_ANALOG_TXRF1_OB2G_CCK_MSB 14
337 #define PHY_ANALOG_TXRF1_OB2G_CCK_LSB 12
338 #define PHY_ANALOG_TXRF1_OB2G_CCK_MASK 0x00007000
339 #define PHY_ANALOG_TXRF1_OB2G_CCK_GET(x) (((x) & 0x00007000) >> 12)
340 #define PHY_ANALOG_TXRF1_OB2G_CCK_SET(x) (((x) << 12) & 0x00007000)
341 #define PHY_ANALOG_TXRF1_DB2G_MSB 17
342 #define PHY_ANALOG_TXRF1_DB2G_LSB 15
343 #define PHY_ANALOG_TXRF1_DB2G_MASK 0x00038000
344 #define PHY_ANALOG_TXRF1_DB2G_GET(x) (((x) & 0x00038000) >> 15)
345 #define PHY_ANALOG_TXRF1_DB2G_SET(x) (((x) << 15) & 0x00038000)
346 #define PHY_ANALOG_TXRF1_PDOUT2G_MSB 18
347 #define PHY_ANALOG_TXRF1_PDOUT2G_LSB 18
348 #define PHY_ANALOG_TXRF1_PDOUT2G_MASK 0x00040000
349 #define PHY_ANALOG_TXRF1_PDOUT2G_GET(x) (((x) & 0x00040000) >> 18)
350 #define PHY_ANALOG_TXRF1_PDOUT2G_SET(x) (((x) << 18) & 0x00040000)
351 #define PHY_ANALOG_TXRF1_PDDR2G_MSB 19
352 #define PHY_ANALOG_TXRF1_PDDR2G_LSB 19
353 #define PHY_ANALOG_TXRF1_PDDR2G_MASK 0x00080000
354 #define PHY_ANALOG_TXRF1_PDDR2G_GET(x) (((x) & 0x00080000) >> 19)
355 #define PHY_ANALOG_TXRF1_PDDR2G_SET(x) (((x) << 19) & 0x00080000)
356 #define PHY_ANALOG_TXRF1_PDMXR2G_MSB 20
357 #define PHY_ANALOG_TXRF1_PDMXR2G_LSB 20
358 #define PHY_ANALOG_TXRF1_PDMXR2G_MASK 0x00100000
359 #define PHY_ANALOG_TXRF1_PDMXR2G_GET(x) (((x) & 0x00100000) >> 20)
360 #define PHY_ANALOG_TXRF1_PDMXR2G_SET(x) (((x) << 20) & 0x00100000)
361 #define PHY_ANALOG_TXRF1_PDLO2G_MSB 21
362 #define PHY_ANALOG_TXRF1_PDLO2G_LSB 21
363 #define PHY_ANALOG_TXRF1_PDLO2G_MASK 0x00200000
364 #define PHY_ANALOG_TXRF1_PDLO2G_GET(x) (((x) & 0x00200000) >> 21)
365 #define PHY_ANALOG_TXRF1_PDLO2G_SET(x) (((x) << 21) & 0x00200000)
366 #define PHY_ANALOG_TXRF1_LOBUF2GFORCED_MSB 22
367 #define PHY_ANALOG_TXRF1_LOBUF2GFORCED_LSB 22
368 #define PHY_ANALOG_TXRF1_LOBUF2GFORCED_MASK 0x00400000
369 #define PHY_ANALOG_TXRF1_LOBUF2GFORCED_GET(x) (((x) & 0x00400000) >> 22)
370 #define PHY_ANALOG_TXRF1_LOBUF2GFORCED_SET(x) (((x) << 22) & 0x00400000)
371 #define PHY_ANALOG_TXRF1_LODIV2GFORCED_MSB 23
372 #define PHY_ANALOG_TXRF1_LODIV2GFORCED_LSB 23
373 #define PHY_ANALOG_TXRF1_LODIV2GFORCED_MASK 0x00800000
374 #define PHY_ANALOG_TXRF1_LODIV2GFORCED_GET(x) (((x) & 0x00800000) >> 23)
375 #define PHY_ANALOG_TXRF1_LODIV2GFORCED_SET(x) (((x) << 23) & 0x00800000)
376 #define PHY_ANALOG_TXRF1_PADRVGN2G_MSB 30
377 #define PHY_ANALOG_TXRF1_PADRVGN2G_LSB 24
378 #define PHY_ANALOG_TXRF1_PADRVGN2G_MASK 0x7f000000
379 #define PHY_ANALOG_TXRF1_PADRVGN2G_GET(x) (((x) & 0x7f000000) >> 24)
380 #define PHY_ANALOG_TXRF1_PADRVGN2G_SET(x) (((x) << 24) & 0x7f000000)
381 #define PHY_ANALOG_TXRF1_LOCALTXGAIN2G_MSB 31
382 #define PHY_ANALOG_TXRF1_LOCALTXGAIN2G_LSB 31
383 #define PHY_ANALOG_TXRF1_LOCALTXGAIN2G_MASK 0x80000000
384 #define PHY_ANALOG_TXRF1_LOCALTXGAIN2G_GET(x) (((x) & 0x80000000) >> 31)
385 #define PHY_ANALOG_TXRF1_LOCALTXGAIN2G_SET(x) (((x) << 31) & 0x80000000)
386
387 /* macros for TXRF2 */
388 #define PHY_ANALOG_TXRF2_ADDRESS 0x00000044
389 #define PHY_ANALOG_TXRF2_OFFSET 0x00000044
390 #define PHY_ANALOG_TXRF2_SPARE2_MSB 0
391 #define PHY_ANALOG_TXRF2_SPARE2_LSB 0
392 #define PHY_ANALOG_TXRF2_SPARE2_MASK 0x00000001
393 #define PHY_ANALOG_TXRF2_SPARE2_GET(x) (((x) & 0x00000001) >> 0)
394 #define PHY_ANALOG_TXRF2_SPARE2_SET(x) (((x) << 0) & 0x00000001)
395 #define PHY_ANALOG_TXRF2_D3B5G_MSB 3
396 #define PHY_ANALOG_TXRF2_D3B5G_LSB 1
397 #define PHY_ANALOG_TXRF2_D3B5G_MASK 0x0000000e
398 #define PHY_ANALOG_TXRF2_D3B5G_GET(x) (((x) & 0x0000000e) >> 1)
399 #define PHY_ANALOG_TXRF2_D3B5G_SET(x) (((x) << 1) & 0x0000000e)
400 #define PHY_ANALOG_TXRF2_D4B5G_MSB 6
401 #define PHY_ANALOG_TXRF2_D4B5G_LSB 4
402 #define PHY_ANALOG_TXRF2_D4B5G_MASK 0x00000070
403 #define PHY_ANALOG_TXRF2_D4B5G_GET(x) (((x) & 0x00000070) >> 4)
404 #define PHY_ANALOG_TXRF2_D4B5G_SET(x) (((x) << 4) & 0x00000070)
405 #define PHY_ANALOG_TXRF2_PDOUT5G_MSB 10
406 #define PHY_ANALOG_TXRF2_PDOUT5G_LSB 7
407 #define PHY_ANALOG_TXRF2_PDOUT5G_MASK 0x00000780
408 #define PHY_ANALOG_TXRF2_PDOUT5G_GET(x) (((x) & 0x00000780) >> 7)
409 #define PHY_ANALOG_TXRF2_PDOUT5G_SET(x) (((x) << 7) & 0x00000780)
410 #define PHY_ANALOG_TXRF2_PDMXR5G_MSB 11
411 #define PHY_ANALOG_TXRF2_PDMXR5G_LSB 11
412 #define PHY_ANALOG_TXRF2_PDMXR5G_MASK 0x00000800
413 #define PHY_ANALOG_TXRF2_PDMXR5G_GET(x) (((x) & 0x00000800) >> 11)
414 #define PHY_ANALOG_TXRF2_PDMXR5G_SET(x) (((x) << 11) & 0x00000800)
415 #define PHY_ANALOG_TXRF2_PDLOBUF5G_MSB 12
416 #define PHY_ANALOG_TXRF2_PDLOBUF5G_LSB 12
417 #define PHY_ANALOG_TXRF2_PDLOBUF5G_MASK 0x00001000
418 #define PHY_ANALOG_TXRF2_PDLOBUF5G_GET(x) (((x) & 0x00001000) >> 12)
419 #define PHY_ANALOG_TXRF2_PDLOBUF5G_SET(x) (((x) << 12) & 0x00001000)
420 #define PHY_ANALOG_TXRF2_PDLODIV5G_MSB 13
421 #define PHY_ANALOG_TXRF2_PDLODIV5G_LSB 13
422 #define PHY_ANALOG_TXRF2_PDLODIV5G_MASK 0x00002000
423 #define PHY_ANALOG_TXRF2_PDLODIV5G_GET(x) (((x) & 0x00002000) >> 13)
424 #define PHY_ANALOG_TXRF2_PDLODIV5G_SET(x) (((x) << 13) & 0x00002000)
425 #define PHY_ANALOG_TXRF2_LOBUF5GFORCED_MSB 14
426 #define PHY_ANALOG_TXRF2_LOBUF5GFORCED_LSB 14
427 #define PHY_ANALOG_TXRF2_LOBUF5GFORCED_MASK 0x00004000
428 #define PHY_ANALOG_TXRF2_LOBUF5GFORCED_GET(x) (((x) & 0x00004000) >> 14)
429 #define PHY_ANALOG_TXRF2_LOBUF5GFORCED_SET(x) (((x) << 14) & 0x00004000)
430 #define PHY_ANALOG_TXRF2_LODIV5GFORCED_MSB 15
431 #define PHY_ANALOG_TXRF2_LODIV5GFORCED_LSB 15
432 #define PHY_ANALOG_TXRF2_LODIV5GFORCED_MASK 0x00008000
433 #define PHY_ANALOG_TXRF2_LODIV5GFORCED_GET(x) (((x) & 0x00008000) >> 15)
434 #define PHY_ANALOG_TXRF2_LODIV5GFORCED_SET(x) (((x) << 15) & 0x00008000)
435 #define PHY_ANALOG_TXRF2_PADRV2GN5G_MSB 19
436 #define PHY_ANALOG_TXRF2_PADRV2GN5G_LSB 16
437 #define PHY_ANALOG_TXRF2_PADRV2GN5G_MASK 0x000f0000
438 #define PHY_ANALOG_TXRF2_PADRV2GN5G_GET(x) (((x) & 0x000f0000) >> 16)
439 #define PHY_ANALOG_TXRF2_PADRV2GN5G_SET(x) (((x) << 16) & 0x000f0000)
440 #define PHY_ANALOG_TXRF2_PADRV3GN5G_MSB 23
441 #define PHY_ANALOG_TXRF2_PADRV3GN5G_LSB 20
442 #define PHY_ANALOG_TXRF2_PADRV3GN5G_MASK 0x00f00000
443 #define PHY_ANALOG_TXRF2_PADRV3GN5G_GET(x) (((x) & 0x00f00000) >> 20)
444 #define PHY_ANALOG_TXRF2_PADRV3GN5G_SET(x) (((x) << 20) & 0x00f00000)
445 #define PHY_ANALOG_TXRF2_PADRV4GN5G_MSB 27
446 #define PHY_ANALOG_TXRF2_PADRV4GN5G_LSB 24
447 #define PHY_ANALOG_TXRF2_PADRV4GN5G_MASK 0x0f000000
448 #define PHY_ANALOG_TXRF2_PADRV4GN5G_GET(x) (((x) & 0x0f000000) >> 24)
449 #define PHY_ANALOG_TXRF2_PADRV4GN5G_SET(x) (((x) << 24) & 0x0f000000)
450 #define PHY_ANALOG_TXRF2_LOCALTXGAIN5G_MSB 28
451 #define PHY_ANALOG_TXRF2_LOCALTXGAIN5G_LSB 28
452 #define PHY_ANALOG_TXRF2_LOCALTXGAIN5G_MASK 0x10000000
453 #define PHY_ANALOG_TXRF2_LOCALTXGAIN5G_GET(x) (((x) & 0x10000000) >> 28)
454 #define PHY_ANALOG_TXRF2_LOCALTXGAIN5G_SET(x) (((x) << 28) & 0x10000000)
455 #define PHY_ANALOG_TXRF2_OCAS2G_MSB 31
456 #define PHY_ANALOG_TXRF2_OCAS2G_LSB 29
457 #define PHY_ANALOG_TXRF2_OCAS2G_MASK 0xe0000000
458 #define PHY_ANALOG_TXRF2_OCAS2G_GET(x) (((x) & 0xe0000000) >> 29)
459 #define PHY_ANALOG_TXRF2_OCAS2G_SET(x) (((x) << 29) & 0xe0000000)
460
461 /* macros for TXRF3 */
462 #define PHY_ANALOG_TXRF3_ADDRESS 0x00000048
463 #define PHY_ANALOG_TXRF3_OFFSET 0x00000048
464 #define PHY_ANALOG_TXRF3_SPARE3_MSB 22
465 #define PHY_ANALOG_TXRF3_SPARE3_LSB 0
466 #define PHY_ANALOG_TXRF3_SPARE3_MASK 0x007fffff
467 #define PHY_ANALOG_TXRF3_SPARE3_GET(x) (((x) & 0x007fffff) >> 0)
468 #define PHY_ANALOG_TXRF3_SPARE3_SET(x) (((x) << 0) & 0x007fffff)
469 #define PHY_ANALOG_TXRF3_CAS5G_MSB 25
470 #define PHY_ANALOG_TXRF3_CAS5G_LSB 23
471 #define PHY_ANALOG_TXRF3_CAS5G_MASK 0x03800000
472 #define PHY_ANALOG_TXRF3_CAS5G_GET(x) (((x) & 0x03800000) >> 23)
473 #define PHY_ANALOG_TXRF3_CAS5G_SET(x) (((x) << 23) & 0x03800000)
474 #define PHY_ANALOG_TXRF3_OB5G_MSB 28
475 #define PHY_ANALOG_TXRF3_OB5G_LSB 26
476 #define PHY_ANALOG_TXRF3_OB5G_MASK 0x1c000000
477 #define PHY_ANALOG_TXRF3_OB5G_GET(x) (((x) & 0x1c000000) >> 26)
478 #define PHY_ANALOG_TXRF3_OB5G_SET(x) (((x) << 26) & 0x1c000000)
479 #define PHY_ANALOG_TXRF3_D2B5G_MSB 31
480 #define PHY_ANALOG_TXRF3_D2B5G_LSB 29
481 #define PHY_ANALOG_TXRF3_D2B5G_MASK 0xe0000000
482 #define PHY_ANALOG_TXRF3_D2B5G_GET(x) (((x) & 0xe0000000) >> 29)
483 #define PHY_ANALOG_TXRF3_D2B5G_SET(x) (((x) << 29) & 0xe0000000)
484
485 /* macros for TXRF4 */
486 #define PHY_ANALOG_TXRF4_ADDRESS 0x0000004c
487 #define PHY_ANALOG_TXRF4_OFFSET 0x0000004c
488 #define PHY_ANALOG_TXRF4_COMP2G_PSK_MSB 2
489 #define PHY_ANALOG_TXRF4_COMP2G_PSK_LSB 0
490 #define PHY_ANALOG_TXRF4_COMP2G_PSK_MASK 0x00000007
491 #define PHY_ANALOG_TXRF4_COMP2G_PSK_GET(x) (((x) & 0x00000007) >> 0)
492 #define PHY_ANALOG_TXRF4_COMP2G_PSK_SET(x) (((x) << 0) & 0x00000007)
493 #define PHY_ANALOG_TXRF4_COMP2G_CCK_MSB 5
494 #define PHY_ANALOG_TXRF4_COMP2G_CCK_LSB 3
495 #define PHY_ANALOG_TXRF4_COMP2G_CCK_MASK 0x00000038
496 #define PHY_ANALOG_TXRF4_COMP2G_CCK_GET(x) (((x) & 0x00000038) >> 3)
497 #define PHY_ANALOG_TXRF4_COMP2G_CCK_SET(x) (((x) << 3) & 0x00000038)
498 #define PHY_ANALOG_TXRF4_AMP2B2G_QAM_MSB 8
499 #define PHY_ANALOG_TXRF4_AMP2B2G_QAM_LSB 6
500 #define PHY_ANALOG_TXRF4_AMP2B2G_QAM_MASK 0x000001c0
501 #define PHY_ANALOG_TXRF4_AMP2B2G_QAM_GET(x) (((x) & 0x000001c0) >> 6)
502 #define PHY_ANALOG_TXRF4_AMP2B2G_QAM_SET(x) (((x) << 6) & 0x000001c0)
503 #define PHY_ANALOG_TXRF4_AMP2B2G_PSK_MSB 11
504 #define PHY_ANALOG_TXRF4_AMP2B2G_PSK_LSB 9
505 #define PHY_ANALOG_TXRF4_AMP2B2G_PSK_MASK 0x00000e00
506 #define PHY_ANALOG_TXRF4_AMP2B2G_PSK_GET(x) (((x) & 0x00000e00) >> 9)
507 #define PHY_ANALOG_TXRF4_AMP2B2G_PSK_SET(x) (((x) << 9) & 0x00000e00)
508 #define PHY_ANALOG_TXRF4_AMP2B2G_CCK_MSB 14
509 #define PHY_ANALOG_TXRF4_AMP2B2G_CCK_LSB 12
510 #define PHY_ANALOG_TXRF4_AMP2B2G_CCK_MASK 0x00007000
511 #define PHY_ANALOG_TXRF4_AMP2B2G_CCK_GET(x) (((x) & 0x00007000) >> 12)
512 #define PHY_ANALOG_TXRF4_AMP2B2G_CCK_SET(x) (((x) << 12) & 0x00007000)
513 #define PHY_ANALOG_TXRF4_AMP2CAS2G_MSB 17
514 #define PHY_ANALOG_TXRF4_AMP2CAS2G_LSB 15
515 #define PHY_ANALOG_TXRF4_AMP2CAS2G_MASK 0x00038000
516 #define PHY_ANALOG_TXRF4_AMP2CAS2G_GET(x) (((x) & 0x00038000) >> 15)
517 #define PHY_ANALOG_TXRF4_AMP2CAS2G_SET(x) (((x) << 15) & 0x00038000)
518 #define PHY_ANALOG_TXRF4_FILTR2G_MSB 19
519 #define PHY_ANALOG_TXRF4_FILTR2G_LSB 18
520 #define PHY_ANALOG_TXRF4_FILTR2G_MASK 0x000c0000
521 #define PHY_ANALOG_TXRF4_FILTR2G_GET(x) (((x) & 0x000c0000) >> 18)
522 #define PHY_ANALOG_TXRF4_FILTR2G_SET(x) (((x) << 18) & 0x000c0000)
523 #define PHY_ANALOG_TXRF4_PWDFB2_2G_MSB 20
524 #define PHY_ANALOG_TXRF4_PWDFB2_2G_LSB 20
525 #define PHY_ANALOG_TXRF4_PWDFB2_2G_MASK 0x00100000
526 #define PHY_ANALOG_TXRF4_PWDFB2_2G_GET(x) (((x) & 0x00100000) >> 20)
527 #define PHY_ANALOG_TXRF4_PWDFB2_2G_SET(x) (((x) << 20) & 0x00100000)
528 #define PHY_ANALOG_TXRF4_PWDFB1_2G_MSB 21
529 #define PHY_ANALOG_TXRF4_PWDFB1_2G_LSB 21
530 #define PHY_ANALOG_TXRF4_PWDFB1_2G_MASK 0x00200000
531 #define PHY_ANALOG_TXRF4_PWDFB1_2G_GET(x) (((x) & 0x00200000) >> 21)
532 #define PHY_ANALOG_TXRF4_PWDFB1_2G_SET(x) (((x) << 21) & 0x00200000)
533 #define PHY_ANALOG_TXRF4_PDFB2G_MSB 22
534 #define PHY_ANALOG_TXRF4_PDFB2G_LSB 22
535 #define PHY_ANALOG_TXRF4_PDFB2G_MASK 0x00400000
536 #define PHY_ANALOG_TXRF4_PDFB2G_GET(x) (((x) & 0x00400000) >> 22)
537 #define PHY_ANALOG_TXRF4_PDFB2G_SET(x) (((x) << 22) & 0x00400000)
538 #define PHY_ANALOG_TXRF4_RDIV5G_MSB 24
539 #define PHY_ANALOG_TXRF4_RDIV5G_LSB 23
540 #define PHY_ANALOG_TXRF4_RDIV5G_MASK 0x01800000
541 #define PHY_ANALOG_TXRF4_RDIV5G_GET(x) (((x) & 0x01800000) >> 23)
542 #define PHY_ANALOG_TXRF4_RDIV5G_SET(x) (((x) << 23) & 0x01800000)
543 #define PHY_ANALOG_TXRF4_CAPDIV5G_MSB 27
544 #define PHY_ANALOG_TXRF4_CAPDIV5G_LSB 25
545 #define PHY_ANALOG_TXRF4_CAPDIV5G_MASK 0x0e000000
546 #define PHY_ANALOG_TXRF4_CAPDIV5G_GET(x) (((x) & 0x0e000000) >> 25)
547 #define PHY_ANALOG_TXRF4_CAPDIV5G_SET(x) (((x) << 25) & 0x0e000000)
548 #define PHY_ANALOG_TXRF4_PDPREDIST5G_MSB 28
549 #define PHY_ANALOG_TXRF4_PDPREDIST5G_LSB 28
550 #define PHY_ANALOG_TXRF4_PDPREDIST5G_MASK 0x10000000
551 #define PHY_ANALOG_TXRF4_PDPREDIST5G_GET(x) (((x) & 0x10000000) >> 28)
552 #define PHY_ANALOG_TXRF4_PDPREDIST5G_SET(x) (((x) << 28) & 0x10000000)
553 #define PHY_ANALOG_TXRF4_RDIV2G_MSB 30
554 #define PHY_ANALOG_TXRF4_RDIV2G_LSB 29
555 #define PHY_ANALOG_TXRF4_RDIV2G_MASK 0x60000000
556 #define PHY_ANALOG_TXRF4_RDIV2G_GET(x) (((x) & 0x60000000) >> 29)
557 #define PHY_ANALOG_TXRF4_RDIV2G_SET(x) (((x) << 29) & 0x60000000)
558 #define PHY_ANALOG_TXRF4_PDPREDIST2G_MSB 31
559 #define PHY_ANALOG_TXRF4_PDPREDIST2G_LSB 31
560 #define PHY_ANALOG_TXRF4_PDPREDIST2G_MASK 0x80000000
561 #define PHY_ANALOG_TXRF4_PDPREDIST2G_GET(x) (((x) & 0x80000000) >> 31)
562 #define PHY_ANALOG_TXRF4_PDPREDIST2G_SET(x) (((x) << 31) & 0x80000000)
563
564 /* macros for TXRF5 */
565 #define PHY_ANALOG_TXRF5_ADDRESS 0x00000050
566 #define PHY_ANALOG_TXRF5_OFFSET 0x00000050
567 #define PHY_ANALOG_TXRF5_FBHI2G_MSB 0
568 #define PHY_ANALOG_TXRF5_FBHI2G_LSB 0
569 #define PHY_ANALOG_TXRF5_FBHI2G_MASK 0x00000001
570 #define PHY_ANALOG_TXRF5_FBHI2G_GET(x) (((x) & 0x00000001) >> 0)
571 #define PHY_ANALOG_TXRF5_FBLO2G_MSB 1
572 #define PHY_ANALOG_TXRF5_FBLO2G_LSB 1
573 #define PHY_ANALOG_TXRF5_FBLO2G_MASK 0x00000002
574 #define PHY_ANALOG_TXRF5_FBLO2G_GET(x) (((x) & 0x00000002) >> 1)
575 #define PHY_ANALOG_TXRF5_REFHI2G_MSB 4
576 #define PHY_ANALOG_TXRF5_REFHI2G_LSB 2
577 #define PHY_ANALOG_TXRF5_REFHI2G_MASK 0x0000001c
578 #define PHY_ANALOG_TXRF5_REFHI2G_GET(x) (((x) & 0x0000001c) >> 2)
579 #define PHY_ANALOG_TXRF5_REFHI2G_SET(x) (((x) << 2) & 0x0000001c)
580 #define PHY_ANALOG_TXRF5_REFLO2G_MSB 7
581 #define PHY_ANALOG_TXRF5_REFLO2G_LSB 5
582 #define PHY_ANALOG_TXRF5_REFLO2G_MASK 0x000000e0
583 #define PHY_ANALOG_TXRF5_REFLO2G_GET(x) (((x) & 0x000000e0) >> 5)
584 #define PHY_ANALOG_TXRF5_REFLO2G_SET(x) (((x) << 5) & 0x000000e0)
585 #define PHY_ANALOG_TXRF5_PK2B2G_QAM_MSB 9
586 #define PHY_ANALOG_TXRF5_PK2B2G_QAM_LSB 8
587 #define PHY_ANALOG_TXRF5_PK2B2G_QAM_MASK 0x00000300
588 #define PHY_ANALOG_TXRF5_PK2B2G_QAM_GET(x) (((x) & 0x00000300) >> 8)
589 #define PHY_ANALOG_TXRF5_PK2B2G_QAM_SET(x) (((x) << 8) & 0x00000300)
590 #define PHY_ANALOG_TXRF5_PK2B2G_PSK_MSB 11
591 #define PHY_ANALOG_TXRF5_PK2B2G_PSK_LSB 10
592 #define PHY_ANALOG_TXRF5_PK2B2G_PSK_MASK 0x00000c00
593 #define PHY_ANALOG_TXRF5_PK2B2G_PSK_GET(x) (((x) & 0x00000c00) >> 10)
594 #define PHY_ANALOG_TXRF5_PK2B2G_PSK_SET(x) (((x) << 10) & 0x00000c00)
595 #define PHY_ANALOG_TXRF5_PK2B2G_CCK_MSB 13
596 #define PHY_ANALOG_TXRF5_PK2B2G_CCK_LSB 12
597 #define PHY_ANALOG_TXRF5_PK2B2G_CCK_MASK 0x00003000
598 #define PHY_ANALOG_TXRF5_PK2B2G_CCK_GET(x) (((x) & 0x00003000) >> 12)
599 #define PHY_ANALOG_TXRF5_PK2B2G_CCK_SET(x) (((x) << 12) & 0x00003000)
600 #define PHY_ANALOG_TXRF5_PK1B2G_QAM_MSB 15
601 #define PHY_ANALOG_TXRF5_PK1B2G_QAM_LSB 14
602 #define PHY_ANALOG_TXRF5_PK1B2G_QAM_MASK 0x0000c000
603 #define PHY_ANALOG_TXRF5_PK1B2G_QAM_GET(x) (((x) & 0x0000c000) >> 14)
604 #define PHY_ANALOG_TXRF5_PK1B2G_QAM_SET(x) (((x) << 14) & 0x0000c000)
605 #define PHY_ANALOG_TXRF5_PK1B2G_PSK_MSB 17
606 #define PHY_ANALOG_TXRF5_PK1B2G_PSK_LSB 16
607 #define PHY_ANALOG_TXRF5_PK1B2G_PSK_MASK 0x00030000
608 #define PHY_ANALOG_TXRF5_PK1B2G_PSK_GET(x) (((x) & 0x00030000) >> 16)
609 #define PHY_ANALOG_TXRF5_PK1B2G_PSK_SET(x) (((x) << 16) & 0x00030000)
610 #define PHY_ANALOG_TXRF5_PK1B2G_CCK_MSB 19
611 #define PHY_ANALOG_TXRF5_PK1B2G_CCK_LSB 18
612 #define PHY_ANALOG_TXRF5_PK1B2G_CCK_MASK 0x000c0000
613 #define PHY_ANALOG_TXRF5_PK1B2G_CCK_GET(x) (((x) & 0x000c0000) >> 18)
614 #define PHY_ANALOG_TXRF5_PK1B2G_CCK_SET(x) (((x) << 18) & 0x000c0000)
615 #define PHY_ANALOG_TXRF5_MIOB2G_QAM_MSB 22
616 #define PHY_ANALOG_TXRF5_MIOB2G_QAM_LSB 20
617 #define PHY_ANALOG_TXRF5_MIOB2G_QAM_MASK 0x00700000
618 #define PHY_ANALOG_TXRF5_MIOB2G_QAM_GET(x) (((x) & 0x00700000) >> 20)
619 #define PHY_ANALOG_TXRF5_MIOB2G_QAM_SET(x) (((x) << 20) & 0x00700000)
620 #define PHY_ANALOG_TXRF5_MIOB2G_PSK_MSB 25
621 #define PHY_ANALOG_TXRF5_MIOB2G_PSK_LSB 23
622 #define PHY_ANALOG_TXRF5_MIOB2G_PSK_MASK 0x03800000
623 #define PHY_ANALOG_TXRF5_MIOB2G_PSK_GET(x) (((x) & 0x03800000) >> 23)
624 #define PHY_ANALOG_TXRF5_MIOB2G_PSK_SET(x) (((x) << 23) & 0x03800000)
625 #define PHY_ANALOG_TXRF5_MIOB2G_CCK_MSB 28
626 #define PHY_ANALOG_TXRF5_MIOB2G_CCK_LSB 26
627 #define PHY_ANALOG_TXRF5_MIOB2G_CCK_MASK 0x1c000000
628 #define PHY_ANALOG_TXRF5_MIOB2G_CCK_GET(x) (((x) & 0x1c000000) >> 26)
629 #define PHY_ANALOG_TXRF5_MIOB2G_CCK_SET(x) (((x) << 26) & 0x1c000000)
630 #define PHY_ANALOG_TXRF5_COMP2G_QAM_MSB 31
631 #define PHY_ANALOG_TXRF5_COMP2G_QAM_LSB 29
632 #define PHY_ANALOG_TXRF5_COMP2G_QAM_MASK 0xe0000000
633 #define PHY_ANALOG_TXRF5_COMP2G_QAM_GET(x) (((x) & 0xe0000000) >> 29)
634 #define PHY_ANALOG_TXRF5_COMP2G_QAM_SET(x) (((x) << 29) & 0xe0000000)
635
636 /* macros for TXRF6 */
637 #define PHY_ANALOG_TXRF6_ADDRESS 0x00000054
638 #define PHY_ANALOG_TXRF6_OFFSET 0x00000054
639 #define PHY_ANALOG_TXRF6_SPARE6_MSB 0
640 #define PHY_ANALOG_TXRF6_SPARE6_LSB 0
641 #define PHY_ANALOG_TXRF6_SPARE6_MASK 0x00000001
642 #define PHY_ANALOG_TXRF6_SPARE6_GET(x) (((x) & 0x00000001) >> 0)
643 #define PHY_ANALOG_TXRF6_SPARE6_SET(x) (((x) << 0) & 0x00000001)
644 #define PHY_ANALOG_TXRF6_PAL_LOCKED_MSB 1
645 #define PHY_ANALOG_TXRF6_PAL_LOCKED_LSB 1
646 #define PHY_ANALOG_TXRF6_PAL_LOCKED_MASK 0x00000002
647 #define PHY_ANALOG_TXRF6_PAL_LOCKED_GET(x) (((x) & 0x00000002) >> 1)
648 #define PHY_ANALOG_TXRF6_PADRVGN2G_SMOUT_MSB 7
649 #define PHY_ANALOG_TXRF6_PADRVGN2G_SMOUT_LSB 2
650 #define PHY_ANALOG_TXRF6_PADRVGN2G_SMOUT_MASK 0x000000fc
651 #define PHY_ANALOG_TXRF6_PADRVGN2G_SMOUT_GET(x) (((x) & 0x000000fc) >> 2)
652 #define PHY_ANALOG_TXRF6_GAINSTEP2G_MSB 10
653 #define PHY_ANALOG_TXRF6_GAINSTEP2G_LSB 8
654 #define PHY_ANALOG_TXRF6_GAINSTEP2G_MASK 0x00000700
655 #define PHY_ANALOG_TXRF6_GAINSTEP2G_GET(x) (((x) & 0x00000700) >> 8)
656 #define PHY_ANALOG_TXRF6_GAINSTEP2G_SET(x) (((x) << 8) & 0x00000700)
657 #define PHY_ANALOG_TXRF6_USE_GAIN_DELTA2G_MSB 11
658 #define PHY_ANALOG_TXRF6_USE_GAIN_DELTA2G_LSB 11
659 #define PHY_ANALOG_TXRF6_USE_GAIN_DELTA2G_MASK 0x00000800
660 #define PHY_ANALOG_TXRF6_USE_GAIN_DELTA2G_GET(x) (((x) & 0x00000800) >> 11)
661 #define PHY_ANALOG_TXRF6_USE_GAIN_DELTA2G_SET(x) (((x) << 11) & 0x00000800)
662 #define PHY_ANALOG_TXRF6_PADRVGN_INDEX_I2G_MSB 15
663 #define PHY_ANALOG_TXRF6_PADRVGN_INDEX_I2G_LSB 12
664 #define PHY_ANALOG_TXRF6_PADRVGN_INDEX_I2G_MASK 0x0000f000
665 #define PHY_ANALOG_TXRF6_PADRVGN_INDEX_I2G_GET(x) (((x) & 0x0000f000) >> 12)
666 #define PHY_ANALOG_TXRF6_PADRVGN_INDEX_I2G_SET(x) (((x) << 12) & 0x0000f000)
667 #define PHY_ANALOG_TXRF6_VCMONDELAY2G_MSB 18
668 #define PHY_ANALOG_TXRF6_VCMONDELAY2G_LSB 16
669 #define PHY_ANALOG_TXRF6_VCMONDELAY2G_MASK 0x00070000
670 #define PHY_ANALOG_TXRF6_VCMONDELAY2G_GET(x) (((x) & 0x00070000) >> 16)
671 #define PHY_ANALOG_TXRF6_VCMONDELAY2G_SET(x) (((x) << 16) & 0x00070000)
672 #define PHY_ANALOG_TXRF6_CAPDIV2G_MSB 21
673 #define PHY_ANALOG_TXRF6_CAPDIV2G_LSB 19
674 #define PHY_ANALOG_TXRF6_CAPDIV2G_MASK 0x00380000
675 #define PHY_ANALOG_TXRF6_CAPDIV2G_GET(x) (((x) & 0x00380000) >> 19)
676 #define PHY_ANALOG_TXRF6_CAPDIV2G_SET(x) (((x) << 19) & 0x00380000)
677 #define PHY_ANALOG_TXRF6_CAPDIV2GOVR_MSB 22
678 #define PHY_ANALOG_TXRF6_CAPDIV2GOVR_LSB 22
679 #define PHY_ANALOG_TXRF6_CAPDIV2GOVR_MASK 0x00400000
680 #define PHY_ANALOG_TXRF6_CAPDIV2GOVR_GET(x) (((x) & 0x00400000) >> 22)
681 #define PHY_ANALOG_TXRF6_CAPDIV2GOVR_SET(x) (((x) << 22) & 0x00400000)
682 #define PHY_ANALOG_TXRF6_ENPACAL2G_MSB 23
683 #define PHY_ANALOG_TXRF6_ENPACAL2G_LSB 23
684 #define PHY_ANALOG_TXRF6_ENPACAL2G_MASK 0x00800000
685 #define PHY_ANALOG_TXRF6_ENPACAL2G_GET(x) (((x) & 0x00800000) >> 23)
686 #define PHY_ANALOG_TXRF6_ENPACAL2G_SET(x) (((x) << 23) & 0x00800000)
687 #define PHY_ANALOG_TXRF6_OFFSET2G_MSB 30
688 #define PHY_ANALOG_TXRF6_OFFSET2G_LSB 24
689 #define PHY_ANALOG_TXRF6_OFFSET2G_MASK 0x7f000000
690 #define PHY_ANALOG_TXRF6_OFFSET2G_GET(x) (((x) & 0x7f000000) >> 24)
691 #define PHY_ANALOG_TXRF6_OFFSET2G_SET(x) (((x) << 24) & 0x7f000000)
692 #define PHY_ANALOG_TXRF6_ENOFFSETCAL2G_MSB 31
693 #define PHY_ANALOG_TXRF6_ENOFFSETCAL2G_LSB 31
694 #define PHY_ANALOG_TXRF6_ENOFFSETCAL2G_MASK 0x80000000
695 #define PHY_ANALOG_TXRF6_ENOFFSETCAL2G_GET(x) (((x) & 0x80000000) >> 31)
696 #define PHY_ANALOG_TXRF6_ENOFFSETCAL2G_SET(x) (((x) << 31) & 0x80000000)
697
698 /* macros for TXRF7 */
699 #define PHY_ANALOG_TXRF7_ADDRESS 0x00000058
700 #define PHY_ANALOG_TXRF7_OFFSET 0x00000058
701 #define PHY_ANALOG_TXRF7_SPARE7_MSB 1
702 #define PHY_ANALOG_TXRF7_SPARE7_LSB 0
703 #define PHY_ANALOG_TXRF7_SPARE7_MASK 0x00000003
704 #define PHY_ANALOG_TXRF7_SPARE7_GET(x) (((x) & 0x00000003) >> 0)
705 #define PHY_ANALOG_TXRF7_SPARE7_SET(x) (((x) << 0) & 0x00000003)
706 #define PHY_ANALOG_TXRF7_PADRVGNTAB_4_MSB 7
707 #define PHY_ANALOG_TXRF7_PADRVGNTAB_4_LSB 2
708 #define PHY_ANALOG_TXRF7_PADRVGNTAB_4_MASK 0x000000fc
709 #define PHY_ANALOG_TXRF7_PADRVGNTAB_4_GET(x) (((x) & 0x000000fc) >> 2)
710 #define PHY_ANALOG_TXRF7_PADRVGNTAB_4_SET(x) (((x) << 2) & 0x000000fc)
711 #define PHY_ANALOG_TXRF7_PADRVGNTAB_3_MSB 13
712 #define PHY_ANALOG_TXRF7_PADRVGNTAB_3_LSB 8
713 #define PHY_ANALOG_TXRF7_PADRVGNTAB_3_MASK 0x00003f00
714 #define PHY_ANALOG_TXRF7_PADRVGNTAB_3_GET(x) (((x) & 0x00003f00) >> 8)
715 #define PHY_ANALOG_TXRF7_PADRVGNTAB_3_SET(x) (((x) << 8) & 0x00003f00)
716 #define PHY_ANALOG_TXRF7_PADRVGNTAB_2_MSB 19
717 #define PHY_ANALOG_TXRF7_PADRVGNTAB_2_LSB 14
718 #define PHY_ANALOG_TXRF7_PADRVGNTAB_2_MASK 0x000fc000
719 #define PHY_ANALOG_TXRF7_PADRVGNTAB_2_GET(x) (((x) & 0x000fc000) >> 14)
720 #define PHY_ANALOG_TXRF7_PADRVGNTAB_2_SET(x) (((x) << 14) & 0x000fc000)
721 #define PHY_ANALOG_TXRF7_PADRVGNTAB_1_MSB 25
722 #define PHY_ANALOG_TXRF7_PADRVGNTAB_1_LSB 20
723 #define PHY_ANALOG_TXRF7_PADRVGNTAB_1_MASK 0x03f00000
724 #define PHY_ANALOG_TXRF7_PADRVGNTAB_1_GET(x) (((x) & 0x03f00000) >> 20)
725 #define PHY_ANALOG_TXRF7_PADRVGNTAB_1_SET(x) (((x) << 20) & 0x03f00000)
726 #define PHY_ANALOG_TXRF7_PADRVGNTAB_0_MSB 31
727 #define PHY_ANALOG_TXRF7_PADRVGNTAB_0_LSB 26
728 #define PHY_ANALOG_TXRF7_PADRVGNTAB_0_MASK 0xfc000000
729 #define PHY_ANALOG_TXRF7_PADRVGNTAB_0_GET(x) (((x) & 0xfc000000) >> 26)
730 #define PHY_ANALOG_TXRF7_PADRVGNTAB_0_SET(x) (((x) << 26) & 0xfc000000)
731
732 /* macros for TXRF8 */
733 #define PHY_ANALOG_TXRF8_ADDRESS 0x0000005c
734 #define PHY_ANALOG_TXRF8_OFFSET 0x0000005c
735 #define PHY_ANALOG_TXRF8_SPARE8_MSB 1
736 #define PHY_ANALOG_TXRF8_SPARE8_LSB 0
737 #define PHY_ANALOG_TXRF8_SPARE8_MASK 0x00000003
738 #define PHY_ANALOG_TXRF8_SPARE8_GET(x) (((x) & 0x00000003) >> 0)
739 #define PHY_ANALOG_TXRF8_SPARE8_SET(x) (((x) << 0) & 0x00000003)
740 #define PHY_ANALOG_TXRF8_PADRVGNTAB_9_MSB 7
741 #define PHY_ANALOG_TXRF8_PADRVGNTAB_9_LSB 2
742 #define PHY_ANALOG_TXRF8_PADRVGNTAB_9_MASK 0x000000fc
743 #define PHY_ANALOG_TXRF8_PADRVGNTAB_9_GET(x) (((x) & 0x000000fc) >> 2)
744 #define PHY_ANALOG_TXRF8_PADRVGNTAB_9_SET(x) (((x) << 2) & 0x000000fc)
745 #define PHY_ANALOG_TXRF8_PADRVGNTAB_8_MSB 13
746 #define PHY_ANALOG_TXRF8_PADRVGNTAB_8_LSB 8
747 #define PHY_ANALOG_TXRF8_PADRVGNTAB_8_MASK 0x00003f00
748 #define PHY_ANALOG_TXRF8_PADRVGNTAB_8_GET(x) (((x) & 0x00003f00) >> 8)
749 #define PHY_ANALOG_TXRF8_PADRVGNTAB_8_SET(x) (((x) << 8) & 0x00003f00)
750 #define PHY_ANALOG_TXRF8_PADRVGNTAB_7_MSB 19
751 #define PHY_ANALOG_TXRF8_PADRVGNTAB_7_LSB 14
752 #define PHY_ANALOG_TXRF8_PADRVGNTAB_7_MASK 0x000fc000
753 #define PHY_ANALOG_TXRF8_PADRVGNTAB_7_GET(x) (((x) & 0x000fc000) >> 14)
754 #define PHY_ANALOG_TXRF8_PADRVGNTAB_7_SET(x) (((x) << 14) & 0x000fc000)
755 #define PHY_ANALOG_TXRF8_PADRVGNTAB_6_MSB 25
756 #define PHY_ANALOG_TXRF8_PADRVGNTAB_6_LSB 20
757 #define PHY_ANALOG_TXRF8_PADRVGNTAB_6_MASK 0x03f00000
758 #define PHY_ANALOG_TXRF8_PADRVGNTAB_6_GET(x) (((x) & 0x03f00000) >> 20)
759 #define PHY_ANALOG_TXRF8_PADRVGNTAB_6_SET(x) (((x) << 20) & 0x03f00000)
760 #define PHY_ANALOG_TXRF8_PADRVGNTAB_5_MSB 31
761 #define PHY_ANALOG_TXRF8_PADRVGNTAB_5_LSB 26
762 #define PHY_ANALOG_TXRF8_PADRVGNTAB_5_MASK 0xfc000000
763 #define PHY_ANALOG_TXRF8_PADRVGNTAB_5_GET(x) (((x) & 0xfc000000) >> 26)
764 #define PHY_ANALOG_TXRF8_PADRVGNTAB_5_SET(x) (((x) << 26) & 0xfc000000)
765
766 /* macros for TXRF9 */
767 #define PHY_ANALOG_TXRF9_ADDRESS 0x00000060
768 #define PHY_ANALOG_TXRF9_OFFSET 0x00000060
769 #define PHY_ANALOG_TXRF9_SPARE9_MSB 1
770 #define PHY_ANALOG_TXRF9_SPARE9_LSB 0
771 #define PHY_ANALOG_TXRF9_SPARE9_MASK 0x00000003
772 #define PHY_ANALOG_TXRF9_SPARE9_GET(x) (((x) & 0x00000003) >> 0)
773 #define PHY_ANALOG_TXRF9_SPARE9_SET(x) (((x) << 0) & 0x00000003)
774 #define PHY_ANALOG_TXRF9_PADRVGNTAB_14_MSB 7
775 #define PHY_ANALOG_TXRF9_PADRVGNTAB_14_LSB 2
776 #define PHY_ANALOG_TXRF9_PADRVGNTAB_14_MASK 0x000000fc
777 #define PHY_ANALOG_TXRF9_PADRVGNTAB_14_GET(x) (((x) & 0x000000fc) >> 2)
778 #define PHY_ANALOG_TXRF9_PADRVGNTAB_14_SET(x) (((x) << 2) & 0x000000fc)
779 #define PHY_ANALOG_TXRF9_PADRVGNTAB_13_MSB 13
780 #define PHY_ANALOG_TXRF9_PADRVGNTAB_13_LSB 8
781 #define PHY_ANALOG_TXRF9_PADRVGNTAB_13_MASK 0x00003f00
782 #define PHY_ANALOG_TXRF9_PADRVGNTAB_13_GET(x) (((x) & 0x00003f00) >> 8)
783 #define PHY_ANALOG_TXRF9_PADRVGNTAB_13_SET(x) (((x) << 8) & 0x00003f00)
784 #define PHY_ANALOG_TXRF9_PADRVGNTAB_12_MSB 19
785 #define PHY_ANALOG_TXRF9_PADRVGNTAB_12_LSB 14
786 #define PHY_ANALOG_TXRF9_PADRVGNTAB_12_MASK 0x000fc000
787 #define PHY_ANALOG_TXRF9_PADRVGNTAB_12_GET(x) (((x) & 0x000fc000) >> 14)
788 #define PHY_ANALOG_TXRF9_PADRVGNTAB_12_SET(x) (((x) << 14) & 0x000fc000)
789 #define PHY_ANALOG_TXRF9_PADRVGNTAB_11_MSB 25
790 #define PHY_ANALOG_TXRF9_PADRVGNTAB_11_LSB 20
791 #define PHY_ANALOG_TXRF9_PADRVGNTAB_11_MASK 0x03f00000
792 #define PHY_ANALOG_TXRF9_PADRVGNTAB_11_GET(x) (((x) & 0x03f00000) >> 20)
793 #define PHY_ANALOG_TXRF9_PADRVGNTAB_11_SET(x) (((x) << 20) & 0x03f00000)
794 #define PHY_ANALOG_TXRF9_PADRVGNTAB_10_MSB 31
795 #define PHY_ANALOG_TXRF9_PADRVGNTAB_10_LSB 26
796 #define PHY_ANALOG_TXRF9_PADRVGNTAB_10_MASK 0xfc000000
797 #define PHY_ANALOG_TXRF9_PADRVGNTAB_10_GET(x) (((x) & 0xfc000000) >> 26)
798 #define PHY_ANALOG_TXRF9_PADRVGNTAB_10_SET(x) (((x) << 26) & 0xfc000000)
799
800 /* macros for TXRF10 */
801 #define PHY_ANALOG_TXRF10_ADDRESS 0x00000064
802 #define PHY_ANALOG_TXRF10_OFFSET 0x00000064
803 #define PHY_ANALOG_TXRF10_SPARE10_MSB 12
804 #define PHY_ANALOG_TXRF10_SPARE10_LSB 0
805 #define PHY_ANALOG_TXRF10_SPARE10_MASK 0x00001fff
806 #define PHY_ANALOG_TXRF10_SPARE10_GET(x) (((x) & 0x00001fff) >> 0)
807 #define PHY_ANALOG_TXRF10_SPARE10_SET(x) (((x) << 0) & 0x00001fff)
808 #define PHY_ANALOG_TXRF10_PDOUT5G_3CALTX_MSB 13
809 #define PHY_ANALOG_TXRF10_PDOUT5G_3CALTX_LSB 13
810 #define PHY_ANALOG_TXRF10_PDOUT5G_3CALTX_MASK 0x00002000
811 #define PHY_ANALOG_TXRF10_PDOUT5G_3CALTX_GET(x) (((x) & 0x00002000) >> 13)
812 #define PHY_ANALOG_TXRF10_PDOUT5G_3CALTX_SET(x) (((x) << 13) & 0x00002000)
813 #define PHY_ANALOG_TXRF10_D3B5GCALTX_MSB 16
814 #define PHY_ANALOG_TXRF10_D3B5GCALTX_LSB 14
815 #define PHY_ANALOG_TXRF10_D3B5GCALTX_MASK 0x0001c000
816 #define PHY_ANALOG_TXRF10_D3B5GCALTX_GET(x) (((x) & 0x0001c000) >> 14)
817 #define PHY_ANALOG_TXRF10_D3B5GCALTX_SET(x) (((x) << 14) & 0x0001c000)
818 #define PHY_ANALOG_TXRF10_D4B5GCALTX_MSB 19
819 #define PHY_ANALOG_TXRF10_D4B5GCALTX_LSB 17
820 #define PHY_ANALOG_TXRF10_D4B5GCALTX_MASK 0x000e0000
821 #define PHY_ANALOG_TXRF10_D4B5GCALTX_GET(x) (((x) & 0x000e0000) >> 17)
822 #define PHY_ANALOG_TXRF10_D4B5GCALTX_SET(x) (((x) << 17) & 0x000e0000)
823 #define PHY_ANALOG_TXRF10_PADRVGN2GCALTX_MSB 26
824 #define PHY_ANALOG_TXRF10_PADRVGN2GCALTX_LSB 20
825 #define PHY_ANALOG_TXRF10_PADRVGN2GCALTX_MASK 0x07f00000
826 #define PHY_ANALOG_TXRF10_PADRVGN2GCALTX_GET(x) (((x) & 0x07f00000) >> 20)
827 #define PHY_ANALOG_TXRF10_PADRVGN2GCALTX_SET(x) (((x) << 20) & 0x07f00000)
828 #define PHY_ANALOG_TXRF10_DB2GCALTX_MSB 29
829 #define PHY_ANALOG_TXRF10_DB2GCALTX_LSB 27
830 #define PHY_ANALOG_TXRF10_DB2GCALTX_MASK 0x38000000
831 #define PHY_ANALOG_TXRF10_DB2GCALTX_GET(x) (((x) & 0x38000000) >> 27)
832 #define PHY_ANALOG_TXRF10_DB2GCALTX_SET(x) (((x) << 27) & 0x38000000)
833 #define PHY_ANALOG_TXRF10_CALTXSHIFT_MSB 30
834 #define PHY_ANALOG_TXRF10_CALTXSHIFT_LSB 30
835 #define PHY_ANALOG_TXRF10_CALTXSHIFT_MASK 0x40000000
836 #define PHY_ANALOG_TXRF10_CALTXSHIFT_GET(x) (((x) & 0x40000000) >> 30)
837 #define PHY_ANALOG_TXRF10_CALTXSHIFT_SET(x) (((x) << 30) & 0x40000000)
838 #define PHY_ANALOG_TXRF10_CALTXSHIFTOVR_MSB 31
839 #define PHY_ANALOG_TXRF10_CALTXSHIFTOVR_LSB 31
840 #define PHY_ANALOG_TXRF10_CALTXSHIFTOVR_MASK 0x80000000
841 #define PHY_ANALOG_TXRF10_CALTXSHIFTOVR_GET(x) (((x) & 0x80000000) >> 31)
842 #define PHY_ANALOG_TXRF10_CALTXSHIFTOVR_SET(x) (((x) << 31) & 0x80000000)
843
844 /* macros for TXRF11 */
845 #define PHY_ANALOG_TXRF11_ADDRESS 0x00000068
846 #define PHY_ANALOG_TXRF11_OFFSET 0x00000068
847 #define PHY_ANALOG_TXRF11_SPARE11_MSB 1
848 #define PHY_ANALOG_TXRF11_SPARE11_LSB 0
849 #define PHY_ANALOG_TXRF11_SPARE11_MASK 0x00000003
850 #define PHY_ANALOG_TXRF11_SPARE11_GET(x) (((x) & 0x00000003) >> 0)
851 #define PHY_ANALOG_TXRF11_SPARE11_SET(x) (((x) << 0) & 0x00000003)
852 #define PHY_ANALOG_TXRF11_PWD_IR25MIXBIAS5G_MSB 4
853 #define PHY_ANALOG_TXRF11_PWD_IR25MIXBIAS5G_LSB 2
854 #define PHY_ANALOG_TXRF11_PWD_IR25MIXBIAS5G_MASK 0x0000001c
855 #define PHY_ANALOG_TXRF11_PWD_IR25MIXBIAS5G_GET(x) (((x) & 0x0000001c) >> 2)
856 #define PHY_ANALOG_TXRF11_PWD_IR25MIXBIAS5G_SET(x) (((x) << 2) & 0x0000001c)
857 #define PHY_ANALOG_TXRF11_PWD_IR25MIXDIV5G_MSB 7
858 #define PHY_ANALOG_TXRF11_PWD_IR25MIXDIV5G_LSB 5
859 #define PHY_ANALOG_TXRF11_PWD_IR25MIXDIV5G_MASK 0x000000e0
860 #define PHY_ANALOG_TXRF11_PWD_IR25MIXDIV5G_GET(x) (((x) & 0x000000e0) >> 5)
861 #define PHY_ANALOG_TXRF11_PWD_IR25MIXDIV5G_SET(x) (((x) << 5) & 0x000000e0)
862 #define PHY_ANALOG_TXRF11_PWD_IR25PA2G_MSB 10
863 #define PHY_ANALOG_TXRF11_PWD_IR25PA2G_LSB 8
864 #define PHY_ANALOG_TXRF11_PWD_IR25PA2G_MASK 0x00000700
865 #define PHY_ANALOG_TXRF11_PWD_IR25PA2G_GET(x) (((x) & 0x00000700) >> 8)
866 #define PHY_ANALOG_TXRF11_PWD_IR25PA2G_SET(x) (((x) << 8) & 0x00000700)
867 #define PHY_ANALOG_TXRF11_PWD_IR25MIXBIAS2G_MSB 13
868 #define PHY_ANALOG_TXRF11_PWD_IR25MIXBIAS2G_LSB 11
869 #define PHY_ANALOG_TXRF11_PWD_IR25MIXBIAS2G_MASK 0x00003800
870 #define PHY_ANALOG_TXRF11_PWD_IR25MIXBIAS2G_GET(x) (((x) & 0x00003800) >> 11)
871 #define PHY_ANALOG_TXRF11_PWD_IR25MIXBIAS2G_SET(x) (((x) << 11) & 0x00003800)
872 #define PHY_ANALOG_TXRF11_PWD_IR25MIXDIV2G_MSB 16
873 #define PHY_ANALOG_TXRF11_PWD_IR25MIXDIV2G_LSB 14
874 #define PHY_ANALOG_TXRF11_PWD_IR25MIXDIV2G_MASK 0x0001c000
875 #define PHY_ANALOG_TXRF11_PWD_IR25MIXDIV2G_GET(x) (((x) & 0x0001c000) >> 14)
876 #define PHY_ANALOG_TXRF11_PWD_IR25MIXDIV2G_SET(x) (((x) << 14) & 0x0001c000)
877 #define PHY_ANALOG_TXRF11_PWD_ICSPARE_MSB 19
878 #define PHY_ANALOG_TXRF11_PWD_ICSPARE_LSB 17
879 #define PHY_ANALOG_TXRF11_PWD_ICSPARE_MASK 0x000e0000
880 #define PHY_ANALOG_TXRF11_PWD_ICSPARE_GET(x) (((x) & 0x000e0000) >> 17)
881 #define PHY_ANALOG_TXRF11_PWD_ICSPARE_SET(x) (((x) << 17) & 0x000e0000)
882 #define PHY_ANALOG_TXRF11_PWD_IC25PA5G2_MSB 22
883 #define PHY_ANALOG_TXRF11_PWD_IC25PA5G2_LSB 20
884 #define PHY_ANALOG_TXRF11_PWD_IC25PA5G2_MASK 0x00700000
885 #define PHY_ANALOG_TXRF11_PWD_IC25PA5G2_GET(x) (((x) & 0x00700000) >> 20)
886 #define PHY_ANALOG_TXRF11_PWD_IC25PA5G2_SET(x) (((x) << 20) & 0x00700000)
887 #define PHY_ANALOG_TXRF11_PWD_IC25PA5G1_MSB 25
888 #define PHY_ANALOG_TXRF11_PWD_IC25PA5G1_LSB 23
889 #define PHY_ANALOG_TXRF11_PWD_IC25PA5G1_MASK 0x03800000
890 #define PHY_ANALOG_TXRF11_PWD_IC25PA5G1_GET(x) (((x) & 0x03800000) >> 23)
891 #define PHY_ANALOG_TXRF11_PWD_IC25PA5G1_SET(x) (((x) << 23) & 0x03800000)
892 #define PHY_ANALOG_TXRF11_PWD_IC25MIXBUF5G_MSB 28
893 #define PHY_ANALOG_TXRF11_PWD_IC25MIXBUF5G_LSB 26
894 #define PHY_ANALOG_TXRF11_PWD_IC25MIXBUF5G_MASK 0x1c000000
895 #define PHY_ANALOG_TXRF11_PWD_IC25MIXBUF5G_GET(x) (((x) & 0x1c000000) >> 26)
896 #define PHY_ANALOG_TXRF11_PWD_IC25MIXBUF5G_SET(x) (((x) << 26) & 0x1c000000)
897 #define PHY_ANALOG_TXRF11_PWD_IC25PA2G_MSB 31
898 #define PHY_ANALOG_TXRF11_PWD_IC25PA2G_LSB 29
899 #define PHY_ANALOG_TXRF11_PWD_IC25PA2G_MASK 0xe0000000
900 #define PHY_ANALOG_TXRF11_PWD_IC25PA2G_GET(x) (((x) & 0xe0000000) >> 29)
901 #define PHY_ANALOG_TXRF11_PWD_IC25PA2G_SET(x) (((x) << 29) & 0xe0000000)
902
903 /* macros for TXRF12 */
904 #define PHY_ANALOG_TXRF12_ADDRESS 0x0000006c
905 #define PHY_ANALOG_TXRF12_OFFSET 0x0000006c
906 #define PHY_ANALOG_TXRF12_SPARE12_2_MSB 7
907 #define PHY_ANALOG_TXRF12_SPARE12_2_LSB 0
908 #define PHY_ANALOG_TXRF12_SPARE12_2_MASK 0x000000ff
909 #define PHY_ANALOG_TXRF12_SPARE12_2_GET(x) (((x) & 0x000000ff) >> 0)
910 #define PHY_ANALOG_TXRF12_SPARE12_1_MSB 15
911 #define PHY_ANALOG_TXRF12_SPARE12_1_LSB 8
912 #define PHY_ANALOG_TXRF12_SPARE12_1_MASK 0x0000ff00
913 #define PHY_ANALOG_TXRF12_SPARE12_1_GET(x) (((x) & 0x0000ff00) >> 8)
914 #define PHY_ANALOG_TXRF12_SPARE12_1_SET(x) (((x) << 8) & 0x0000ff00)
915 #define PHY_ANALOG_TXRF12_ATBSEL5G_MSB 19
916 #define PHY_ANALOG_TXRF12_ATBSEL5G_LSB 16
917 #define PHY_ANALOG_TXRF12_ATBSEL5G_MASK 0x000f0000
918 #define PHY_ANALOG_TXRF12_ATBSEL5G_GET(x) (((x) & 0x000f0000) >> 16)
919 #define PHY_ANALOG_TXRF12_ATBSEL5G_SET(x) (((x) << 16) & 0x000f0000)
920 #define PHY_ANALOG_TXRF12_ATBSEL2G_MSB 22
921 #define PHY_ANALOG_TXRF12_ATBSEL2G_LSB 20
922 #define PHY_ANALOG_TXRF12_ATBSEL2G_MASK 0x00700000
923 #define PHY_ANALOG_TXRF12_ATBSEL2G_GET(x) (((x) & 0x00700000) >> 20)
924 #define PHY_ANALOG_TXRF12_ATBSEL2G_SET(x) (((x) << 20) & 0x00700000)
925 #define PHY_ANALOG_TXRF12_PWD_IRSPARE_MSB 25
926 #define PHY_ANALOG_TXRF12_PWD_IRSPARE_LSB 23
927 #define PHY_ANALOG_TXRF12_PWD_IRSPARE_MASK 0x03800000
928 #define PHY_ANALOG_TXRF12_PWD_IRSPARE_GET(x) (((x) & 0x03800000) >> 23)
929 #define PHY_ANALOG_TXRF12_PWD_IRSPARE_SET(x) (((x) << 23) & 0x03800000)
930 #define PHY_ANALOG_TXRF12_PWD_IR25PA5G2_MSB 28
931 #define PHY_ANALOG_TXRF12_PWD_IR25PA5G2_LSB 26
932 #define PHY_ANALOG_TXRF12_PWD_IR25PA5G2_MASK 0x1c000000
933 #define PHY_ANALOG_TXRF12_PWD_IR25PA5G2_GET(x) (((x) & 0x1c000000) >> 26)
934 #define PHY_ANALOG_TXRF12_PWD_IR25PA5G2_SET(x) (((x) << 26) & 0x1c000000)
935 #define PHY_ANALOG_TXRF12_PWD_IR25PA5G1_MSB 31
936 #define PHY_ANALOG_TXRF12_PWD_IR25PA5G1_LSB 29
937 #define PHY_ANALOG_TXRF12_PWD_IR25PA5G1_MASK 0xe0000000
938 #define PHY_ANALOG_TXRF12_PWD_IR25PA5G1_GET(x) (((x) & 0xe0000000) >> 29)
939 #define PHY_ANALOG_TXRF12_PWD_IR25PA5G1_SET(x) (((x) << 29) & 0xe0000000)
940
941 /* macros for SYNTH1 */
942 #define PHY_ANALOG_SYNTH1_ADDRESS 0x00000080
943 #define PHY_ANALOG_SYNTH1_OFFSET 0x00000080
944 #define PHY_ANALOG_SYNTH1_SEL_VCMONABUS_MSB 2
945 #define PHY_ANALOG_SYNTH1_SEL_VCMONABUS_LSB 0
946 #define PHY_ANALOG_SYNTH1_SEL_VCMONABUS_MASK 0x00000007
947 #define PHY_ANALOG_SYNTH1_SEL_VCMONABUS_GET(x) (((x) & 0x00000007) >> 0)
948 #define PHY_ANALOG_SYNTH1_SEL_VCMONABUS_SET(x) (((x) << 0) & 0x00000007)
949 #define PHY_ANALOG_SYNTH1_SEL_VCOABUS_MSB 5
950 #define PHY_ANALOG_SYNTH1_SEL_VCOABUS_LSB 3
951 #define PHY_ANALOG_SYNTH1_SEL_VCOABUS_MASK 0x00000038
952 #define PHY_ANALOG_SYNTH1_SEL_VCOABUS_GET(x) (((x) & 0x00000038) >> 3)
953 #define PHY_ANALOG_SYNTH1_SEL_VCOABUS_SET(x) (((x) << 3) & 0x00000038)
954 #define PHY_ANALOG_SYNTH1_MONITOR_SYNTHLOCKVCOK_MSB 6
955 #define PHY_ANALOG_SYNTH1_MONITOR_SYNTHLOCKVCOK_LSB 6
956 #define PHY_ANALOG_SYNTH1_MONITOR_SYNTHLOCKVCOK_MASK 0x00000040
957 #define PHY_ANALOG_SYNTH1_MONITOR_SYNTHLOCKVCOK_GET(x) (((x) & 0x00000040) >> 6)
958 #define PHY_ANALOG_SYNTH1_MONITOR_SYNTHLOCKVCOK_SET(x) (((x) << 6) & 0x00000040)
959 #define PHY_ANALOG_SYNTH1_MONITOR_VC2LOW_MSB 7
960 #define PHY_ANALOG_SYNTH1_MONITOR_VC2LOW_LSB 7
961 #define PHY_ANALOG_SYNTH1_MONITOR_VC2LOW_MASK 0x00000080
962 #define PHY_ANALOG_SYNTH1_MONITOR_VC2LOW_GET(x) (((x) & 0x00000080) >> 7)
963 #define PHY_ANALOG_SYNTH1_MONITOR_VC2LOW_SET(x) (((x) << 7) & 0x00000080)
964 #define PHY_ANALOG_SYNTH1_MONITOR_VC2HIGH_MSB 8
965 #define PHY_ANALOG_SYNTH1_MONITOR_VC2HIGH_LSB 8
966 #define PHY_ANALOG_SYNTH1_MONITOR_VC2HIGH_MASK 0x00000100
967 #define PHY_ANALOG_SYNTH1_MONITOR_VC2HIGH_GET(x) (((x) & 0x00000100) >> 8)
968 #define PHY_ANALOG_SYNTH1_MONITOR_VC2HIGH_SET(x) (((x) << 8) & 0x00000100)
969 #define PHY_ANALOG_SYNTH1_MONITOR_FB_DIV2_MSB 9
970 #define PHY_ANALOG_SYNTH1_MONITOR_FB_DIV2_LSB 9
971 #define PHY_ANALOG_SYNTH1_MONITOR_FB_DIV2_MASK 0x00000200
972 #define PHY_ANALOG_SYNTH1_MONITOR_FB_DIV2_GET(x) (((x) & 0x00000200) >> 9)
973 #define PHY_ANALOG_SYNTH1_MONITOR_FB_DIV2_SET(x) (((x) << 9) & 0x00000200)
974 #define PHY_ANALOG_SYNTH1_MONITOR_REF_MSB 10
975 #define PHY_ANALOG_SYNTH1_MONITOR_REF_LSB 10
976 #define PHY_ANALOG_SYNTH1_MONITOR_REF_MASK 0x00000400
977 #define PHY_ANALOG_SYNTH1_MONITOR_REF_GET(x) (((x) & 0x00000400) >> 10)
978 #define PHY_ANALOG_SYNTH1_MONITOR_REF_SET(x) (((x) << 10) & 0x00000400)
979 #define PHY_ANALOG_SYNTH1_MONITOR_FB_MSB 11
980 #define PHY_ANALOG_SYNTH1_MONITOR_FB_LSB 11
981 #define PHY_ANALOG_SYNTH1_MONITOR_FB_MASK 0x00000800
982 #define PHY_ANALOG_SYNTH1_MONITOR_FB_GET(x) (((x) & 0x00000800) >> 11)
983 #define PHY_ANALOG_SYNTH1_MONITOR_FB_SET(x) (((x) << 11) & 0x00000800)
984 #define PHY_ANALOG_SYNTH1_SEVENBITVCOCAP_MSB 12
985 #define PHY_ANALOG_SYNTH1_SEVENBITVCOCAP_LSB 12
986 #define PHY_ANALOG_SYNTH1_SEVENBITVCOCAP_MASK 0x00001000
987 #define PHY_ANALOG_SYNTH1_SEVENBITVCOCAP_GET(x) (((x) & 0x00001000) >> 12)
988 #define PHY_ANALOG_SYNTH1_SEVENBITVCOCAP_SET(x) (((x) << 12) & 0x00001000)
989 #define PHY_ANALOG_SYNTH1_PWUP_PD_MSB 15
990 #define PHY_ANALOG_SYNTH1_PWUP_PD_LSB 13
991 #define PHY_ANALOG_SYNTH1_PWUP_PD_MASK 0x0000e000
992 #define PHY_ANALOG_SYNTH1_PWUP_PD_GET(x) (((x) & 0x0000e000) >> 13)
993 #define PHY_ANALOG_SYNTH1_PWUP_PD_SET(x) (((x) << 13) & 0x0000e000)
994 #define PHY_ANALOG_SYNTH1_PWD_VCOBUF_MSB 16
995 #define PHY_ANALOG_SYNTH1_PWD_VCOBUF_LSB 16
996 #define PHY_ANALOG_SYNTH1_PWD_VCOBUF_MASK 0x00010000
997 #define PHY_ANALOG_SYNTH1_PWD_VCOBUF_GET(x) (((x) & 0x00010000) >> 16)
998 #define PHY_ANALOG_SYNTH1_PWD_VCOBUF_SET(x) (((x) << 16) & 0x00010000)
999 #define PHY_ANALOG_SYNTH1_VCOBUFGAIN_MSB 18
1000 #define PHY_ANALOG_SYNTH1_VCOBUFGAIN_LSB 17
1001 #define PHY_ANALOG_SYNTH1_VCOBUFGAIN_MASK 0x00060000
1002 #define PHY_ANALOG_SYNTH1_VCOBUFGAIN_GET(x) (((x) & 0x00060000) >> 17)
1003 #define PHY_ANALOG_SYNTH1_VCOBUFGAIN_SET(x) (((x) << 17) & 0x00060000)
1004 #define PHY_ANALOG_SYNTH1_VCOREGLEVEL_MSB 20
1005 #define PHY_ANALOG_SYNTH1_VCOREGLEVEL_LSB 19
1006 #define PHY_ANALOG_SYNTH1_VCOREGLEVEL_MASK 0x00180000
1007 #define PHY_ANALOG_SYNTH1_VCOREGLEVEL_GET(x) (((x) & 0x00180000) >> 19)
1008 #define PHY_ANALOG_SYNTH1_VCOREGLEVEL_SET(x) (((x) << 19) & 0x00180000)
1009 #define PHY_ANALOG_SYNTH1_VCOREGBYPASS_MSB 21
1010 #define PHY_ANALOG_SYNTH1_VCOREGBYPASS_LSB 21
1011 #define PHY_ANALOG_SYNTH1_VCOREGBYPASS_MASK 0x00200000
1012 #define PHY_ANALOG_SYNTH1_VCOREGBYPASS_GET(x) (((x) & 0x00200000) >> 21)
1013 #define PHY_ANALOG_SYNTH1_VCOREGBYPASS_SET(x) (((x) << 21) & 0x00200000)
1014 #define PHY_ANALOG_SYNTH1_PWUP_LOREF_MSB 22
1015 #define PHY_ANALOG_SYNTH1_PWUP_LOREF_LSB 22
1016 #define PHY_ANALOG_SYNTH1_PWUP_LOREF_MASK 0x00400000
1017 #define PHY_ANALOG_SYNTH1_PWUP_LOREF_GET(x) (((x) & 0x00400000) >> 22)
1018 #define PHY_ANALOG_SYNTH1_PWUP_LOREF_SET(x) (((x) << 22) & 0x00400000)
1019 #define PHY_ANALOG_SYNTH1_PWD_LOMIX_MSB 23
1020 #define PHY_ANALOG_SYNTH1_PWD_LOMIX_LSB 23
1021 #define PHY_ANALOG_SYNTH1_PWD_LOMIX_MASK 0x00800000
1022 #define PHY_ANALOG_SYNTH1_PWD_LOMIX_GET(x) (((x) & 0x00800000) >> 23)
1023 #define PHY_ANALOG_SYNTH1_PWD_LOMIX_SET(x) (((x) << 23) & 0x00800000)
1024 #define PHY_ANALOG_SYNTH1_PWD_LODIV_MSB 24
1025 #define PHY_ANALOG_SYNTH1_PWD_LODIV_LSB 24
1026 #define PHY_ANALOG_SYNTH1_PWD_LODIV_MASK 0x01000000
1027 #define PHY_ANALOG_SYNTH1_PWD_LODIV_GET(x) (((x) & 0x01000000) >> 24)
1028 #define PHY_ANALOG_SYNTH1_PWD_LODIV_SET(x) (((x) << 24) & 0x01000000)
1029 #define PHY_ANALOG_SYNTH1_PWD_LOBUF5G_MSB 25
1030 #define PHY_ANALOG_SYNTH1_PWD_LOBUF5G_LSB 25
1031 #define PHY_ANALOG_SYNTH1_PWD_LOBUF5G_MASK 0x02000000
1032 #define PHY_ANALOG_SYNTH1_PWD_LOBUF5G_GET(x) (((x) & 0x02000000) >> 25)
1033 #define PHY_ANALOG_SYNTH1_PWD_LOBUF5G_SET(x) (((x) << 25) & 0x02000000)
1034 #define PHY_ANALOG_SYNTH1_PWD_LOBUF2G_MSB 26
1035 #define PHY_ANALOG_SYNTH1_PWD_LOBUF2G_LSB 26
1036 #define PHY_ANALOG_SYNTH1_PWD_LOBUF2G_MASK 0x04000000
1037 #define PHY_ANALOG_SYNTH1_PWD_LOBUF2G_GET(x) (((x) & 0x04000000) >> 26)
1038 #define PHY_ANALOG_SYNTH1_PWD_LOBUF2G_SET(x) (((x) << 26) & 0x04000000)
1039 #define PHY_ANALOG_SYNTH1_PWD_PRESC_MSB 27
1040 #define PHY_ANALOG_SYNTH1_PWD_PRESC_LSB 27
1041 #define PHY_ANALOG_SYNTH1_PWD_PRESC_MASK 0x08000000
1042 #define PHY_ANALOG_SYNTH1_PWD_PRESC_GET(x) (((x) & 0x08000000) >> 27)
1043 #define PHY_ANALOG_SYNTH1_PWD_PRESC_SET(x) (((x) << 27) & 0x08000000)
1044 #define PHY_ANALOG_SYNTH1_PWD_VCO_MSB 28
1045 #define PHY_ANALOG_SYNTH1_PWD_VCO_LSB 28
1046 #define PHY_ANALOG_SYNTH1_PWD_VCO_MASK 0x10000000
1047 #define PHY_ANALOG_SYNTH1_PWD_VCO_GET(x) (((x) & 0x10000000) >> 28)
1048 #define PHY_ANALOG_SYNTH1_PWD_VCO_SET(x) (((x) << 28) & 0x10000000)
1049 #define PHY_ANALOG_SYNTH1_PWD_VCMON_MSB 29
1050 #define PHY_ANALOG_SYNTH1_PWD_VCMON_LSB 29
1051 #define PHY_ANALOG_SYNTH1_PWD_VCMON_MASK 0x20000000
1052 #define PHY_ANALOG_SYNTH1_PWD_VCMON_GET(x) (((x) & 0x20000000) >> 29)
1053 #define PHY_ANALOG_SYNTH1_PWD_VCMON_SET(x) (((x) << 29) & 0x20000000)
1054 #define PHY_ANALOG_SYNTH1_PWD_CP_MSB 30
1055 #define PHY_ANALOG_SYNTH1_PWD_CP_LSB 30
1056 #define PHY_ANALOG_SYNTH1_PWD_CP_MASK 0x40000000
1057 #define PHY_ANALOG_SYNTH1_PWD_CP_GET(x) (((x) & 0x40000000) >> 30)
1058 #define PHY_ANALOG_SYNTH1_PWD_CP_SET(x) (((x) << 30) & 0x40000000)
1059 #define PHY_ANALOG_SYNTH1_PWD_BIAS_MSB 31
1060 #define PHY_ANALOG_SYNTH1_PWD_BIAS_LSB 31
1061 #define PHY_ANALOG_SYNTH1_PWD_BIAS_MASK 0x80000000
1062 #define PHY_ANALOG_SYNTH1_PWD_BIAS_GET(x) (((x) & 0x80000000) >> 31)
1063 #define PHY_ANALOG_SYNTH1_PWD_BIAS_SET(x) (((x) << 31) & 0x80000000)
1064
1065 /* macros for SYNTH2 */
1066 #define PHY_ANALOG_SYNTH2_ADDRESS 0x00000084
1067 #define PHY_ANALOG_SYNTH2_OFFSET 0x00000084
1068 #define PHY_ANALOG_SYNTH2_CAPRANGE3_MSB 3
1069 #define PHY_ANALOG_SYNTH2_CAPRANGE3_LSB 0
1070 #define PHY_ANALOG_SYNTH2_CAPRANGE3_MASK 0x0000000f
1071 #define PHY_ANALOG_SYNTH2_CAPRANGE3_GET(x) (((x) & 0x0000000f) >> 0)
1072 #define PHY_ANALOG_SYNTH2_CAPRANGE3_SET(x) (((x) << 0) & 0x0000000f)
1073 #define PHY_ANALOG_SYNTH2_CAPRANGE2_MSB 7
1074 #define PHY_ANALOG_SYNTH2_CAPRANGE2_LSB 4
1075 #define PHY_ANALOG_SYNTH2_CAPRANGE2_MASK 0x000000f0
1076 #define PHY_ANALOG_SYNTH2_CAPRANGE2_GET(x) (((x) & 0x000000f0) >> 4)
1077 #define PHY_ANALOG_SYNTH2_CAPRANGE2_SET(x) (((x) << 4) & 0x000000f0)
1078 #define PHY_ANALOG_SYNTH2_CAPRANGE1_MSB 11
1079 #define PHY_ANALOG_SYNTH2_CAPRANGE1_LSB 8
1080 #define PHY_ANALOG_SYNTH2_CAPRANGE1_MASK 0x00000f00
1081 #define PHY_ANALOG_SYNTH2_CAPRANGE1_GET(x) (((x) & 0x00000f00) >> 8)
1082 #define PHY_ANALOG_SYNTH2_CAPRANGE1_SET(x) (((x) << 8) & 0x00000f00)
1083 #define PHY_ANALOG_SYNTH2_LOOPLEAKCUR_MSB 15
1084 #define PHY_ANALOG_SYNTH2_LOOPLEAKCUR_LSB 12
1085 #define PHY_ANALOG_SYNTH2_LOOPLEAKCUR_MASK 0x0000f000
1086 #define PHY_ANALOG_SYNTH2_LOOPLEAKCUR_GET(x) (((x) & 0x0000f000) >> 12)
1087 #define PHY_ANALOG_SYNTH2_LOOPLEAKCUR_SET(x) (((x) << 12) & 0x0000f000)
1088 #define PHY_ANALOG_SYNTH2_CPLOWLK_MSB 16
1089 #define PHY_ANALOG_SYNTH2_CPLOWLK_LSB 16
1090 #define PHY_ANALOG_SYNTH2_CPLOWLK_MASK 0x00010000
1091 #define PHY_ANALOG_SYNTH2_CPLOWLK_GET(x) (((x) & 0x00010000) >> 16)
1092 #define PHY_ANALOG_SYNTH2_CPLOWLK_SET(x) (((x) << 16) & 0x00010000)
1093 #define PHY_ANALOG_SYNTH2_CPSTEERING_EN_INTN_MSB 17
1094 #define PHY_ANALOG_SYNTH2_CPSTEERING_EN_INTN_LSB 17
1095 #define PHY_ANALOG_SYNTH2_CPSTEERING_EN_INTN_MASK 0x00020000
1096 #define PHY_ANALOG_SYNTH2_CPSTEERING_EN_INTN_GET(x) (((x) & 0x00020000) >> 17)
1097 #define PHY_ANALOG_SYNTH2_CPSTEERING_EN_INTN_SET(x) (((x) << 17) & 0x00020000)
1098 #define PHY_ANALOG_SYNTH2_CPBIAS_MSB 19
1099 #define PHY_ANALOG_SYNTH2_CPBIAS_LSB 18
1100 #define PHY_ANALOG_SYNTH2_CPBIAS_MASK 0x000c0000
1101 #define PHY_ANALOG_SYNTH2_CPBIAS_GET(x) (((x) & 0x000c0000) >> 18)
1102 #define PHY_ANALOG_SYNTH2_CPBIAS_SET(x) (((x) << 18) & 0x000c0000)
1103 #define PHY_ANALOG_SYNTH2_VC_LOW_REF_MSB 22
1104 #define PHY_ANALOG_SYNTH2_VC_LOW_REF_LSB 20
1105 #define PHY_ANALOG_SYNTH2_VC_LOW_REF_MASK 0x00700000
1106 #define PHY_ANALOG_SYNTH2_VC_LOW_REF_GET(x) (((x) & 0x00700000) >> 20)
1107 #define PHY_ANALOG_SYNTH2_VC_LOW_REF_SET(x) (((x) << 20) & 0x00700000)
1108 #define PHY_ANALOG_SYNTH2_VC_MID_REF_MSB 25
1109 #define PHY_ANALOG_SYNTH2_VC_MID_REF_LSB 23
1110 #define PHY_ANALOG_SYNTH2_VC_MID_REF_MASK 0x03800000
1111 #define PHY_ANALOG_SYNTH2_VC_MID_REF_GET(x) (((x) & 0x03800000) >> 23)
1112 #define PHY_ANALOG_SYNTH2_VC_MID_REF_SET(x) (((x) << 23) & 0x03800000)
1113 #define PHY_ANALOG_SYNTH2_VC_HI_REF_MSB 28
1114 #define PHY_ANALOG_SYNTH2_VC_HI_REF_LSB 26
1115 #define PHY_ANALOG_SYNTH2_VC_HI_REF_MASK 0x1c000000
1116 #define PHY_ANALOG_SYNTH2_VC_HI_REF_GET(x) (((x) & 0x1c000000) >> 26)
1117 #define PHY_ANALOG_SYNTH2_VC_HI_REF_SET(x) (((x) << 26) & 0x1c000000)
1118 #define PHY_ANALOG_SYNTH2_VC_CAL_REF_MSB 31
1119 #define PHY_ANALOG_SYNTH2_VC_CAL_REF_LSB 29
1120 #define PHY_ANALOG_SYNTH2_VC_CAL_REF_MASK 0xe0000000
1121 #define PHY_ANALOG_SYNTH2_VC_CAL_REF_GET(x) (((x) & 0xe0000000) >> 29)
1122 #define PHY_ANALOG_SYNTH2_VC_CAL_REF_SET(x) (((x) << 29) & 0xe0000000)
1123
1124 /* macros for SYNTH3 */
1125 #define PHY_ANALOG_SYNTH3_ADDRESS 0x00000088
1126 #define PHY_ANALOG_SYNTH3_OFFSET 0x00000088
1127 #define PHY_ANALOG_SYNTH3_WAIT_VC_CHECK_MSB 5
1128 #define PHY_ANALOG_SYNTH3_WAIT_VC_CHECK_LSB 0
1129 #define PHY_ANALOG_SYNTH3_WAIT_VC_CHECK_MASK 0x0000003f
1130 #define PHY_ANALOG_SYNTH3_WAIT_VC_CHECK_GET(x) (((x) & 0x0000003f) >> 0)
1131 #define PHY_ANALOG_SYNTH3_WAIT_VC_CHECK_SET(x) (((x) << 0) & 0x0000003f)
1132 #define PHY_ANALOG_SYNTH3_WAIT_CAL_LIN_MSB 11
1133 #define PHY_ANALOG_SYNTH3_WAIT_CAL_LIN_LSB 6
1134 #define PHY_ANALOG_SYNTH3_WAIT_CAL_LIN_MASK 0x00000fc0
1135 #define PHY_ANALOG_SYNTH3_WAIT_CAL_LIN_GET(x) (((x) & 0x00000fc0) >> 6)
1136 #define PHY_ANALOG_SYNTH3_WAIT_CAL_LIN_SET(x) (((x) << 6) & 0x00000fc0)
1137 #define PHY_ANALOG_SYNTH3_WAIT_CAL_BIN_MSB 17
1138 #define PHY_ANALOG_SYNTH3_WAIT_CAL_BIN_LSB 12
1139 #define PHY_ANALOG_SYNTH3_WAIT_CAL_BIN_MASK 0x0003f000
1140 #define PHY_ANALOG_SYNTH3_WAIT_CAL_BIN_GET(x) (((x) & 0x0003f000) >> 12)
1141 #define PHY_ANALOG_SYNTH3_WAIT_CAL_BIN_SET(x) (((x) << 12) & 0x0003f000)
1142 #define PHY_ANALOG_SYNTH3_WAIT_PWRUP_MSB 23
1143 #define PHY_ANALOG_SYNTH3_WAIT_PWRUP_LSB 18
1144 #define PHY_ANALOG_SYNTH3_WAIT_PWRUP_MASK 0x00fc0000
1145 #define PHY_ANALOG_SYNTH3_WAIT_PWRUP_GET(x) (((x) & 0x00fc0000) >> 18)
1146 #define PHY_ANALOG_SYNTH3_WAIT_PWRUP_SET(x) (((x) << 18) & 0x00fc0000)
1147 #define PHY_ANALOG_SYNTH3_WAIT_SHORTR_PWRUP_MSB 29
1148 #define PHY_ANALOG_SYNTH3_WAIT_SHORTR_PWRUP_LSB 24
1149 #define PHY_ANALOG_SYNTH3_WAIT_SHORTR_PWRUP_MASK 0x3f000000
1150 #define PHY_ANALOG_SYNTH3_WAIT_SHORTR_PWRUP_GET(x) (((x) & 0x3f000000) >> 24)
1151 #define PHY_ANALOG_SYNTH3_WAIT_SHORTR_PWRUP_SET(x) (((x) << 24) & 0x3f000000)
1152 #define PHY_ANALOG_SYNTH3_SEL_CLK_DIV2_MSB 30
1153 #define PHY_ANALOG_SYNTH3_SEL_CLK_DIV2_LSB 30
1154 #define PHY_ANALOG_SYNTH3_SEL_CLK_DIV2_MASK 0x40000000
1155 #define PHY_ANALOG_SYNTH3_SEL_CLK_DIV2_GET(x) (((x) & 0x40000000) >> 30)
1156 #define PHY_ANALOG_SYNTH3_SEL_CLK_DIV2_SET(x) (((x) << 30) & 0x40000000)
1157 #define PHY_ANALOG_SYNTH3_DIS_CLK_XTAL_MSB 31
1158 #define PHY_ANALOG_SYNTH3_DIS_CLK_XTAL_LSB 31
1159 #define PHY_ANALOG_SYNTH3_DIS_CLK_XTAL_MASK 0x80000000
1160 #define PHY_ANALOG_SYNTH3_DIS_CLK_XTAL_GET(x) (((x) & 0x80000000) >> 31)
1161 #define PHY_ANALOG_SYNTH3_DIS_CLK_XTAL_SET(x) (((x) << 31) & 0x80000000)
1162
1163 /* macros for SYNTH4 */
1164 #define PHY_ANALOG_SYNTH4_ADDRESS 0x0000008c
1165 #define PHY_ANALOG_SYNTH4_OFFSET 0x0000008c
1166 #define PHY_ANALOG_SYNTH4_PS_SINGLE_PULSE_MSB 0
1167 #define PHY_ANALOG_SYNTH4_PS_SINGLE_PULSE_LSB 0
1168 #define PHY_ANALOG_SYNTH4_PS_SINGLE_PULSE_MASK 0x00000001
1169 #define PHY_ANALOG_SYNTH4_PS_SINGLE_PULSE_GET(x) (((x) & 0x00000001) >> 0)
1170 #define PHY_ANALOG_SYNTH4_PS_SINGLE_PULSE_SET(x) (((x) << 0) & 0x00000001)
1171 #define PHY_ANALOG_SYNTH4_LONGSHIFTSEL_MSB 1
1172 #define PHY_ANALOG_SYNTH4_LONGSHIFTSEL_LSB 1
1173 #define PHY_ANALOG_SYNTH4_LONGSHIFTSEL_MASK 0x00000002
1174 #define PHY_ANALOG_SYNTH4_LONGSHIFTSEL_GET(x) (((x) & 0x00000002) >> 1)
1175 #define PHY_ANALOG_SYNTH4_LONGSHIFTSEL_SET(x) (((x) << 1) & 0x00000002)
1176 #define PHY_ANALOG_SYNTH4_LOBUF5GTUNE_OVR_MSB 3
1177 #define PHY_ANALOG_SYNTH4_LOBUF5GTUNE_OVR_LSB 2
1178 #define PHY_ANALOG_SYNTH4_LOBUF5GTUNE_OVR_MASK 0x0000000c
1179 #define PHY_ANALOG_SYNTH4_LOBUF5GTUNE_OVR_GET(x) (((x) & 0x0000000c) >> 2)
1180 #define PHY_ANALOG_SYNTH4_LOBUF5GTUNE_OVR_SET(x) (((x) << 2) & 0x0000000c)
1181 #define PHY_ANALOG_SYNTH4_FORCE_LOBUF5GTUNE_MSB 4
1182 #define PHY_ANALOG_SYNTH4_FORCE_LOBUF5GTUNE_LSB 4
1183 #define PHY_ANALOG_SYNTH4_FORCE_LOBUF5GTUNE_MASK 0x00000010
1184 #define PHY_ANALOG_SYNTH4_FORCE_LOBUF5GTUNE_GET(x) (((x) & 0x00000010) >> 4)
1185 #define PHY_ANALOG_SYNTH4_FORCE_LOBUF5GTUNE_SET(x) (((x) << 4) & 0x00000010)
1186 #define PHY_ANALOG_SYNTH4_PSCOUNT_FBSEL_MSB 5
1187 #define PHY_ANALOG_SYNTH4_PSCOUNT_FBSEL_LSB 5
1188 #define PHY_ANALOG_SYNTH4_PSCOUNT_FBSEL_MASK 0x00000020
1189 #define PHY_ANALOG_SYNTH4_PSCOUNT_FBSEL_GET(x) (((x) & 0x00000020) >> 5)
1190 #define PHY_ANALOG_SYNTH4_PSCOUNT_FBSEL_SET(x) (((x) << 5) & 0x00000020)
1191 #define PHY_ANALOG_SYNTH4_SDM_DITHER_MSB 7
1192 #define PHY_ANALOG_SYNTH4_SDM_DITHER_LSB 6
1193 #define PHY_ANALOG_SYNTH4_SDM_DITHER_MASK 0x000000c0
1194 #define PHY_ANALOG_SYNTH4_SDM_DITHER_GET(x) (((x) & 0x000000c0) >> 6)
1195 #define PHY_ANALOG_SYNTH4_SDM_DITHER_SET(x) (((x) << 6) & 0x000000c0)
1196 #define PHY_ANALOG_SYNTH4_SDM_MODE_MSB 8
1197 #define PHY_ANALOG_SYNTH4_SDM_MODE_LSB 8
1198 #define PHY_ANALOG_SYNTH4_SDM_MODE_MASK 0x00000100
1199 #define PHY_ANALOG_SYNTH4_SDM_MODE_GET(x) (((x) & 0x00000100) >> 8)
1200 #define PHY_ANALOG_SYNTH4_SDM_MODE_SET(x) (((x) << 8) & 0x00000100)
1201 #define PHY_ANALOG_SYNTH4_SDM_DISABLE_MSB 9
1202 #define PHY_ANALOG_SYNTH4_SDM_DISABLE_LSB 9
1203 #define PHY_ANALOG_SYNTH4_SDM_DISABLE_MASK 0x00000200
1204 #define PHY_ANALOG_SYNTH4_SDM_DISABLE_GET(x) (((x) & 0x00000200) >> 9)
1205 #define PHY_ANALOG_SYNTH4_SDM_DISABLE_SET(x) (((x) << 9) & 0x00000200)
1206 #define PHY_ANALOG_SYNTH4_RESET_PRESC_MSB 10
1207 #define PHY_ANALOG_SYNTH4_RESET_PRESC_LSB 10
1208 #define PHY_ANALOG_SYNTH4_RESET_PRESC_MASK 0x00000400
1209 #define PHY_ANALOG_SYNTH4_RESET_PRESC_GET(x) (((x) & 0x00000400) >> 10)
1210 #define PHY_ANALOG_SYNTH4_RESET_PRESC_SET(x) (((x) << 10) & 0x00000400)
1211 #define PHY_ANALOG_SYNTH4_PRESCSEL_MSB 12
1212 #define PHY_ANALOG_SYNTH4_PRESCSEL_LSB 11
1213 #define PHY_ANALOG_SYNTH4_PRESCSEL_MASK 0x00001800
1214 #define PHY_ANALOG_SYNTH4_PRESCSEL_GET(x) (((x) & 0x00001800) >> 11)
1215 #define PHY_ANALOG_SYNTH4_PRESCSEL_SET(x) (((x) << 11) & 0x00001800)
1216 #define PHY_ANALOG_SYNTH4_PFD_DISABLE_MSB 13
1217 #define PHY_ANALOG_SYNTH4_PFD_DISABLE_LSB 13
1218 #define PHY_ANALOG_SYNTH4_PFD_DISABLE_MASK 0x00002000
1219 #define PHY_ANALOG_SYNTH4_PFD_DISABLE_GET(x) (((x) & 0x00002000) >> 13)
1220 #define PHY_ANALOG_SYNTH4_PFD_DISABLE_SET(x) (((x) << 13) & 0x00002000)
1221 #define PHY_ANALOG_SYNTH4_PFDDELAY_FRACN_MSB 14
1222 #define PHY_ANALOG_SYNTH4_PFDDELAY_FRACN_LSB 14
1223 #define PHY_ANALOG_SYNTH4_PFDDELAY_FRACN_MASK 0x00004000
1224 #define PHY_ANALOG_SYNTH4_PFDDELAY_FRACN_GET(x) (((x) & 0x00004000) >> 14)
1225 #define PHY_ANALOG_SYNTH4_PFDDELAY_FRACN_SET(x) (((x) << 14) & 0x00004000)
1226 #define PHY_ANALOG_SYNTH4_FORCE_LO_ON_MSB 15
1227 #define PHY_ANALOG_SYNTH4_FORCE_LO_ON_LSB 15
1228 #define PHY_ANALOG_SYNTH4_FORCE_LO_ON_MASK 0x00008000
1229 #define PHY_ANALOG_SYNTH4_FORCE_LO_ON_GET(x) (((x) & 0x00008000) >> 15)
1230 #define PHY_ANALOG_SYNTH4_FORCE_LO_ON_SET(x) (((x) << 15) & 0x00008000)
1231 #define PHY_ANALOG_SYNTH4_CLKXTAL_EDGE_SEL_MSB 16
1232 #define PHY_ANALOG_SYNTH4_CLKXTAL_EDGE_SEL_LSB 16
1233 #define PHY_ANALOG_SYNTH4_CLKXTAL_EDGE_SEL_MASK 0x00010000
1234 #define PHY_ANALOG_SYNTH4_CLKXTAL_EDGE_SEL_GET(x) (((x) & 0x00010000) >> 16)
1235 #define PHY_ANALOG_SYNTH4_CLKXTAL_EDGE_SEL_SET(x) (((x) << 16) & 0x00010000)
1236 #define PHY_ANALOG_SYNTH4_VCOCAPPULLUP_MSB 17
1237 #define PHY_ANALOG_SYNTH4_VCOCAPPULLUP_LSB 17
1238 #define PHY_ANALOG_SYNTH4_VCOCAPPULLUP_MASK 0x00020000
1239 #define PHY_ANALOG_SYNTH4_VCOCAPPULLUP_GET(x) (((x) & 0x00020000) >> 17)
1240 #define PHY_ANALOG_SYNTH4_VCOCAPPULLUP_SET(x) (((x) << 17) & 0x00020000)
1241 #define PHY_ANALOG_SYNTH4_VCOCAP_OVR_MSB 25
1242 #define PHY_ANALOG_SYNTH4_VCOCAP_OVR_LSB 18
1243 #define PHY_ANALOG_SYNTH4_VCOCAP_OVR_MASK 0x03fc0000
1244 #define PHY_ANALOG_SYNTH4_VCOCAP_OVR_GET(x) (((x) & 0x03fc0000) >> 18)
1245 #define PHY_ANALOG_SYNTH4_VCOCAP_OVR_SET(x) (((x) << 18) & 0x03fc0000)
1246 #define PHY_ANALOG_SYNTH4_FORCE_VCOCAP_MSB 26
1247 #define PHY_ANALOG_SYNTH4_FORCE_VCOCAP_LSB 26
1248 #define PHY_ANALOG_SYNTH4_FORCE_VCOCAP_MASK 0x04000000
1249 #define PHY_ANALOG_SYNTH4_FORCE_VCOCAP_GET(x) (((x) & 0x04000000) >> 26)
1250 #define PHY_ANALOG_SYNTH4_FORCE_VCOCAP_SET(x) (((x) << 26) & 0x04000000)
1251 #define PHY_ANALOG_SYNTH4_FORCE_PINVC_MSB 27
1252 #define PHY_ANALOG_SYNTH4_FORCE_PINVC_LSB 27
1253 #define PHY_ANALOG_SYNTH4_FORCE_PINVC_MASK 0x08000000
1254 #define PHY_ANALOG_SYNTH4_FORCE_PINVC_GET(x) (((x) & 0x08000000) >> 27)
1255 #define PHY_ANALOG_SYNTH4_FORCE_PINVC_SET(x) (((x) << 27) & 0x08000000)
1256 #define PHY_ANALOG_SYNTH4_SHORTR_UNTIL_LOCKED_MSB 28
1257 #define PHY_ANALOG_SYNTH4_SHORTR_UNTIL_LOCKED_LSB 28
1258 #define PHY_ANALOG_SYNTH4_SHORTR_UNTIL_LOCKED_MASK 0x10000000
1259 #define PHY_ANALOG_SYNTH4_SHORTR_UNTIL_LOCKED_GET(x) (((x) & 0x10000000) >> 28)
1260 #define PHY_ANALOG_SYNTH4_SHORTR_UNTIL_LOCKED_SET(x) (((x) << 28) & 0x10000000)
1261 #define PHY_ANALOG_SYNTH4_ALWAYS_SHORTR_MSB 29
1262 #define PHY_ANALOG_SYNTH4_ALWAYS_SHORTR_LSB 29
1263 #define PHY_ANALOG_SYNTH4_ALWAYS_SHORTR_MASK 0x20000000
1264 #define PHY_ANALOG_SYNTH4_ALWAYS_SHORTR_GET(x) (((x) & 0x20000000) >> 29)
1265 #define PHY_ANALOG_SYNTH4_ALWAYS_SHORTR_SET(x) (((x) << 29) & 0x20000000)
1266 #define PHY_ANALOG_SYNTH4_DIS_LOSTVC_MSB 30
1267 #define PHY_ANALOG_SYNTH4_DIS_LOSTVC_LSB 30
1268 #define PHY_ANALOG_SYNTH4_DIS_LOSTVC_MASK 0x40000000
1269 #define PHY_ANALOG_SYNTH4_DIS_LOSTVC_GET(x) (((x) & 0x40000000) >> 30)
1270 #define PHY_ANALOG_SYNTH4_DIS_LOSTVC_SET(x) (((x) << 30) & 0x40000000)
1271 #define PHY_ANALOG_SYNTH4_DIS_LIN_CAPSEARCH_MSB 31
1272 #define PHY_ANALOG_SYNTH4_DIS_LIN_CAPSEARCH_LSB 31
1273 #define PHY_ANALOG_SYNTH4_DIS_LIN_CAPSEARCH_MASK 0x80000000
1274 #define PHY_ANALOG_SYNTH4_DIS_LIN_CAPSEARCH_GET(x) (((x) & 0x80000000) >> 31)
1275 #define PHY_ANALOG_SYNTH4_DIS_LIN_CAPSEARCH_SET(x) (((x) << 31) & 0x80000000)
1276
1277 /* macros for SYNTH5 */
1278 #define PHY_ANALOG_SYNTH5_ADDRESS 0x00000090
1279 #define PHY_ANALOG_SYNTH5_OFFSET 0x00000090
1280 #define PHY_ANALOG_SYNTH5_VCOBIAS_MSB 1
1281 #define PHY_ANALOG_SYNTH5_VCOBIAS_LSB 0
1282 #define PHY_ANALOG_SYNTH5_VCOBIAS_MASK 0x00000003
1283 #define PHY_ANALOG_SYNTH5_VCOBIAS_GET(x) (((x) & 0x00000003) >> 0)
1284 #define PHY_ANALOG_SYNTH5_VCOBIAS_SET(x) (((x) << 0) & 0x00000003)
1285 #define PHY_ANALOG_SYNTH5_PWDB_ICLOBUF5G50_MSB 4
1286 #define PHY_ANALOG_SYNTH5_PWDB_ICLOBUF5G50_LSB 2
1287 #define PHY_ANALOG_SYNTH5_PWDB_ICLOBUF5G50_MASK 0x0000001c
1288 #define PHY_ANALOG_SYNTH5_PWDB_ICLOBUF5G50_GET(x) (((x) & 0x0000001c) >> 2)
1289 #define PHY_ANALOG_SYNTH5_PWDB_ICLOBUF5G50_SET(x) (((x) << 2) & 0x0000001c)
1290 #define PHY_ANALOG_SYNTH5_PWDB_ICLOBUF2G50_MSB 7
1291 #define PHY_ANALOG_SYNTH5_PWDB_ICLOBUF2G50_LSB 5
1292 #define PHY_ANALOG_SYNTH5_PWDB_ICLOBUF2G50_MASK 0x000000e0
1293 #define PHY_ANALOG_SYNTH5_PWDB_ICLOBUF2G50_GET(x) (((x) & 0x000000e0) >> 5)
1294 #define PHY_ANALOG_SYNTH5_PWDB_ICLOBUF2G50_SET(x) (((x) << 5) & 0x000000e0)
1295 #define PHY_ANALOG_SYNTH5_PWDB_ICVCO25_MSB 10
1296 #define PHY_ANALOG_SYNTH5_PWDB_ICVCO25_LSB 8
1297 #define PHY_ANALOG_SYNTH5_PWDB_ICVCO25_MASK 0x00000700
1298 #define PHY_ANALOG_SYNTH5_PWDB_ICVCO25_GET(x) (((x) & 0x00000700) >> 8)
1299 #define PHY_ANALOG_SYNTH5_PWDB_ICVCO25_SET(x) (((x) << 8) & 0x00000700)
1300 #define PHY_ANALOG_SYNTH5_PWDB_ICVCOREG25_MSB 13
1301 #define PHY_ANALOG_SYNTH5_PWDB_ICVCOREG25_LSB 11
1302 #define PHY_ANALOG_SYNTH5_PWDB_ICVCOREG25_MASK 0x00003800
1303 #define PHY_ANALOG_SYNTH5_PWDB_ICVCOREG25_GET(x) (((x) & 0x00003800) >> 11)
1304 #define PHY_ANALOG_SYNTH5_PWDB_ICVCOREG25_SET(x) (((x) << 11) & 0x00003800)
1305 #define PHY_ANALOG_SYNTH5_PWDB_IRVCOREG50_MSB 14
1306 #define PHY_ANALOG_SYNTH5_PWDB_IRVCOREG50_LSB 14
1307 #define PHY_ANALOG_SYNTH5_PWDB_IRVCOREG50_MASK 0x00004000
1308 #define PHY_ANALOG_SYNTH5_PWDB_IRVCOREG50_GET(x) (((x) & 0x00004000) >> 14)
1309 #define PHY_ANALOG_SYNTH5_PWDB_IRVCOREG50_SET(x) (((x) << 14) & 0x00004000)
1310 #define PHY_ANALOG_SYNTH5_PWDB_ICLOMIX_MSB 17
1311 #define PHY_ANALOG_SYNTH5_PWDB_ICLOMIX_LSB 15
1312 #define PHY_ANALOG_SYNTH5_PWDB_ICLOMIX_MASK 0x00038000
1313 #define PHY_ANALOG_SYNTH5_PWDB_ICLOMIX_GET(x) (((x) & 0x00038000) >> 15)
1314 #define PHY_ANALOG_SYNTH5_PWDB_ICLOMIX_SET(x) (((x) << 15) & 0x00038000)
1315 #define PHY_ANALOG_SYNTH5_PWDB_ICLODIV50_MSB 20
1316 #define PHY_ANALOG_SYNTH5_PWDB_ICLODIV50_LSB 18
1317 #define PHY_ANALOG_SYNTH5_PWDB_ICLODIV50_MASK 0x001c0000
1318 #define PHY_ANALOG_SYNTH5_PWDB_ICLODIV50_GET(x) (((x) & 0x001c0000) >> 18)
1319 #define PHY_ANALOG_SYNTH5_PWDB_ICLODIV50_SET(x) (((x) << 18) & 0x001c0000)
1320 #define PHY_ANALOG_SYNTH5_PWDB_ICPRESC50_MSB 23
1321 #define PHY_ANALOG_SYNTH5_PWDB_ICPRESC50_LSB 21
1322 #define PHY_ANALOG_SYNTH5_PWDB_ICPRESC50_MASK 0x00e00000
1323 #define PHY_ANALOG_SYNTH5_PWDB_ICPRESC50_GET(x) (((x) & 0x00e00000) >> 21)
1324 #define PHY_ANALOG_SYNTH5_PWDB_ICPRESC50_SET(x) (((x) << 21) & 0x00e00000)
1325 #define PHY_ANALOG_SYNTH5_PWDB_IRVCMON25_MSB 26
1326 #define PHY_ANALOG_SYNTH5_PWDB_IRVCMON25_LSB 24
1327 #define PHY_ANALOG_SYNTH5_PWDB_IRVCMON25_MASK 0x07000000
1328 #define PHY_ANALOG_SYNTH5_PWDB_IRVCMON25_GET(x) (((x) & 0x07000000) >> 24)
1329 #define PHY_ANALOG_SYNTH5_PWDB_IRVCMON25_SET(x) (((x) << 24) & 0x07000000)
1330 #define PHY_ANALOG_SYNTH5_PWDB_IRPFDCP_MSB 29
1331 #define PHY_ANALOG_SYNTH5_PWDB_IRPFDCP_LSB 27
1332 #define PHY_ANALOG_SYNTH5_PWDB_IRPFDCP_MASK 0x38000000
1333 #define PHY_ANALOG_SYNTH5_PWDB_IRPFDCP_GET(x) (((x) & 0x38000000) >> 27)
1334 #define PHY_ANALOG_SYNTH5_PWDB_IRPFDCP_SET(x) (((x) << 27) & 0x38000000)
1335 #define PHY_ANALOG_SYNTH5_SPARE5A_MSB 31
1336 #define PHY_ANALOG_SYNTH5_SPARE5A_LSB 30
1337 #define PHY_ANALOG_SYNTH5_SPARE5A_MASK 0xc0000000
1338 #define PHY_ANALOG_SYNTH5_SPARE5A_GET(x) (((x) & 0xc0000000) >> 30)
1339 #define PHY_ANALOG_SYNTH5_SPARE5A_SET(x) (((x) << 30) & 0xc0000000)
1340
1341 /* macros for SYNTH6 */
1342 #define PHY_ANALOG_SYNTH6_ADDRESS 0x00000094
1343 #define PHY_ANALOG_SYNTH6_OFFSET 0x00000094
1344 #define PHY_ANALOG_SYNTH6_LOBUF5GTUNE_MSB 1
1345 #define PHY_ANALOG_SYNTH6_LOBUF5GTUNE_LSB 0
1346 #define PHY_ANALOG_SYNTH6_LOBUF5GTUNE_MASK 0x00000003
1347 #define PHY_ANALOG_SYNTH6_LOBUF5GTUNE_GET(x) (((x) & 0x00000003) >> 0)
1348 #define PHY_ANALOG_SYNTH6_LOOP_IP_MSB 8
1349 #define PHY_ANALOG_SYNTH6_LOOP_IP_LSB 2
1350 #define PHY_ANALOG_SYNTH6_LOOP_IP_MASK 0x000001fc
1351 #define PHY_ANALOG_SYNTH6_LOOP_IP_GET(x) (((x) & 0x000001fc) >> 2)
1352 #define PHY_ANALOG_SYNTH6_VC2LOW_MSB 9
1353 #define PHY_ANALOG_SYNTH6_VC2LOW_LSB 9
1354 #define PHY_ANALOG_SYNTH6_VC2LOW_MASK 0x00000200
1355 #define PHY_ANALOG_SYNTH6_VC2LOW_GET(x) (((x) & 0x00000200) >> 9)
1356 #define PHY_ANALOG_SYNTH6_VC2HIGH_MSB 10
1357 #define PHY_ANALOG_SYNTH6_VC2HIGH_LSB 10
1358 #define PHY_ANALOG_SYNTH6_VC2HIGH_MASK 0x00000400
1359 #define PHY_ANALOG_SYNTH6_VC2HIGH_GET(x) (((x) & 0x00000400) >> 10)
1360 #define PHY_ANALOG_SYNTH6_RESET_SDM_B_MSB 11
1361 #define PHY_ANALOG_SYNTH6_RESET_SDM_B_LSB 11
1362 #define PHY_ANALOG_SYNTH6_RESET_SDM_B_MASK 0x00000800
1363 #define PHY_ANALOG_SYNTH6_RESET_SDM_B_GET(x) (((x) & 0x00000800) >> 11)
1364 #define PHY_ANALOG_SYNTH6_RESET_PSCOUNTERS_MSB 12
1365 #define PHY_ANALOG_SYNTH6_RESET_PSCOUNTERS_LSB 12
1366 #define PHY_ANALOG_SYNTH6_RESET_PSCOUNTERS_MASK 0x00001000
1367 #define PHY_ANALOG_SYNTH6_RESET_PSCOUNTERS_GET(x) (((x) & 0x00001000) >> 12)
1368 #define PHY_ANALOG_SYNTH6_RESET_PFD_MSB 13
1369 #define PHY_ANALOG_SYNTH6_RESET_PFD_LSB 13
1370 #define PHY_ANALOG_SYNTH6_RESET_PFD_MASK 0x00002000
1371 #define PHY_ANALOG_SYNTH6_RESET_PFD_GET(x) (((x) & 0x00002000) >> 13)
1372 #define PHY_ANALOG_SYNTH6_RESET_RFD_MSB 14
1373 #define PHY_ANALOG_SYNTH6_RESET_RFD_LSB 14
1374 #define PHY_ANALOG_SYNTH6_RESET_RFD_MASK 0x00004000
1375 #define PHY_ANALOG_SYNTH6_RESET_RFD_GET(x) (((x) & 0x00004000) >> 14)
1376 #define PHY_ANALOG_SYNTH6_SHORT_R_MSB 15
1377 #define PHY_ANALOG_SYNTH6_SHORT_R_LSB 15
1378 #define PHY_ANALOG_SYNTH6_SHORT_R_MASK 0x00008000
1379 #define PHY_ANALOG_SYNTH6_SHORT_R_GET(x) (((x) & 0x00008000) >> 15)
1380 #define PHY_ANALOG_SYNTH6_VCO_CAP_ST_MSB 23
1381 #define PHY_ANALOG_SYNTH6_VCO_CAP_ST_LSB 16
1382 #define PHY_ANALOG_SYNTH6_VCO_CAP_ST_MASK 0x00ff0000
1383 #define PHY_ANALOG_SYNTH6_VCO_CAP_ST_GET(x) (((x) & 0x00ff0000) >> 16)
1384 #define PHY_ANALOG_SYNTH6_PIN_VC_MSB 24
1385 #define PHY_ANALOG_SYNTH6_PIN_VC_LSB 24
1386 #define PHY_ANALOG_SYNTH6_PIN_VC_MASK 0x01000000
1387 #define PHY_ANALOG_SYNTH6_PIN_VC_GET(x) (((x) & 0x01000000) >> 24)
1388 #define PHY_ANALOG_SYNTH6_SYNTH_LOCK_VC_OK_MSB 25
1389 #define PHY_ANALOG_SYNTH6_SYNTH_LOCK_VC_OK_LSB 25
1390 #define PHY_ANALOG_SYNTH6_SYNTH_LOCK_VC_OK_MASK 0x02000000
1391 #define PHY_ANALOG_SYNTH6_SYNTH_LOCK_VC_OK_GET(x) (((x) & 0x02000000) >> 25)
1392 #define PHY_ANALOG_SYNTH6_CAP_SEARCH_MSB 26
1393 #define PHY_ANALOG_SYNTH6_CAP_SEARCH_LSB 26
1394 #define PHY_ANALOG_SYNTH6_CAP_SEARCH_MASK 0x04000000
1395 #define PHY_ANALOG_SYNTH6_CAP_SEARCH_GET(x) (((x) & 0x04000000) >> 26)
1396 #define PHY_ANALOG_SYNTH6_SYNTH_SM_STATE_MSB 30
1397 #define PHY_ANALOG_SYNTH6_SYNTH_SM_STATE_LSB 27
1398 #define PHY_ANALOG_SYNTH6_SYNTH_SM_STATE_MASK 0x78000000
1399 #define PHY_ANALOG_SYNTH6_SYNTH_SM_STATE_GET(x) (((x) & 0x78000000) >> 27)
1400 #define PHY_ANALOG_SYNTH6_SYNTH_ON_MSB 31
1401 #define PHY_ANALOG_SYNTH6_SYNTH_ON_LSB 31
1402 #define PHY_ANALOG_SYNTH6_SYNTH_ON_MASK 0x80000000
1403 #define PHY_ANALOG_SYNTH6_SYNTH_ON_GET(x) (((x) & 0x80000000) >> 31)
1404
1405 /* macros for SYNTH7 */
1406 #define PHY_ANALOG_SYNTH7_ADDRESS 0x00000098
1407 #define PHY_ANALOG_SYNTH7_OFFSET 0x00000098
1408 #define PHY_ANALOG_SYNTH7_OVRCHANDECODER_MSB 0
1409 #define PHY_ANALOG_SYNTH7_OVRCHANDECODER_LSB 0
1410 #define PHY_ANALOG_SYNTH7_OVRCHANDECODER_MASK 0x00000001
1411 #define PHY_ANALOG_SYNTH7_OVRCHANDECODER_GET(x) (((x) & 0x00000001) >> 0)
1412 #define PHY_ANALOG_SYNTH7_OVRCHANDECODER_SET(x) (((x) << 0) & 0x00000001)
1413 #define PHY_ANALOG_SYNTH7_FORCE_FRACLSB_MSB 1
1414 #define PHY_ANALOG_SYNTH7_FORCE_FRACLSB_LSB 1
1415 #define PHY_ANALOG_SYNTH7_FORCE_FRACLSB_MASK 0x00000002
1416 #define PHY_ANALOG_SYNTH7_FORCE_FRACLSB_GET(x) (((x) & 0x00000002) >> 1)
1417 #define PHY_ANALOG_SYNTH7_FORCE_FRACLSB_SET(x) (((x) << 1) & 0x00000002)
1418 #define PHY_ANALOG_SYNTH7_CHANFRAC_MSB 18
1419 #define PHY_ANALOG_SYNTH7_CHANFRAC_LSB 2
1420 #define PHY_ANALOG_SYNTH7_CHANFRAC_MASK 0x0007fffc
1421 #define PHY_ANALOG_SYNTH7_CHANFRAC_GET(x) (((x) & 0x0007fffc) >> 2)
1422 #define PHY_ANALOG_SYNTH7_CHANFRAC_SET(x) (((x) << 2) & 0x0007fffc)
1423 #define PHY_ANALOG_SYNTH7_CHANSEL_MSB 27
1424 #define PHY_ANALOG_SYNTH7_CHANSEL_LSB 19
1425 #define PHY_ANALOG_SYNTH7_CHANSEL_MASK 0x0ff80000
1426 #define PHY_ANALOG_SYNTH7_CHANSEL_GET(x) (((x) & 0x0ff80000) >> 19)
1427 #define PHY_ANALOG_SYNTH7_CHANSEL_SET(x) (((x) << 19) & 0x0ff80000)
1428 #define PHY_ANALOG_SYNTH7_AMODEREFSEL_MSB 29
1429 #define PHY_ANALOG_SYNTH7_AMODEREFSEL_LSB 28
1430 #define PHY_ANALOG_SYNTH7_AMODEREFSEL_MASK 0x30000000
1431 #define PHY_ANALOG_SYNTH7_AMODEREFSEL_GET(x) (((x) & 0x30000000) >> 28)
1432 #define PHY_ANALOG_SYNTH7_AMODEREFSEL_SET(x) (((x) << 28) & 0x30000000)
1433 #define PHY_ANALOG_SYNTH7_FRACMODE_MSB 30
1434 #define PHY_ANALOG_SYNTH7_FRACMODE_LSB 30
1435 #define PHY_ANALOG_SYNTH7_FRACMODE_MASK 0x40000000
1436 #define PHY_ANALOG_SYNTH7_FRACMODE_GET(x) (((x) & 0x40000000) >> 30)
1437 #define PHY_ANALOG_SYNTH7_FRACMODE_SET(x) (((x) << 30) & 0x40000000)
1438 #define PHY_ANALOG_SYNTH7_LOADSYNTHCHANNEL_MSB 31
1439 #define PHY_ANALOG_SYNTH7_LOADSYNTHCHANNEL_LSB 31
1440 #define PHY_ANALOG_SYNTH7_LOADSYNTHCHANNEL_MASK 0x80000000
1441 #define PHY_ANALOG_SYNTH7_LOADSYNTHCHANNEL_GET(x) (((x) & 0x80000000) >> 31)
1442 #define PHY_ANALOG_SYNTH7_LOADSYNTHCHANNEL_SET(x) (((x) << 31) & 0x80000000)
1443
1444 /* macros for SYNTH8 */
1445 #define PHY_ANALOG_SYNTH8_ADDRESS 0x0000009c
1446 #define PHY_ANALOG_SYNTH8_OFFSET 0x0000009c
1447 #define PHY_ANALOG_SYNTH8_CPSTEERING_EN_FRACN_MSB 0
1448 #define PHY_ANALOG_SYNTH8_CPSTEERING_EN_FRACN_LSB 0
1449 #define PHY_ANALOG_SYNTH8_CPSTEERING_EN_FRACN_MASK 0x00000001
1450 #define PHY_ANALOG_SYNTH8_CPSTEERING_EN_FRACN_GET(x) (((x) & 0x00000001) >> 0)
1451 #define PHY_ANALOG_SYNTH8_CPSTEERING_EN_FRACN_SET(x) (((x) << 0) & 0x00000001)
1452 #define PHY_ANALOG_SYNTH8_LOOP_ICPB_MSB 7
1453 #define PHY_ANALOG_SYNTH8_LOOP_ICPB_LSB 1
1454 #define PHY_ANALOG_SYNTH8_LOOP_ICPB_MASK 0x000000fe
1455 #define PHY_ANALOG_SYNTH8_LOOP_ICPB_GET(x) (((x) & 0x000000fe) >> 1)
1456 #define PHY_ANALOG_SYNTH8_LOOP_ICPB_SET(x) (((x) << 1) & 0x000000fe)
1457 #define PHY_ANALOG_SYNTH8_LOOP_CSB_MSB 11
1458 #define PHY_ANALOG_SYNTH8_LOOP_CSB_LSB 8
1459 #define PHY_ANALOG_SYNTH8_LOOP_CSB_MASK 0x00000f00
1460 #define PHY_ANALOG_SYNTH8_LOOP_CSB_GET(x) (((x) & 0x00000f00) >> 8)
1461 #define PHY_ANALOG_SYNTH8_LOOP_CSB_SET(x) (((x) << 8) & 0x00000f00)
1462 #define PHY_ANALOG_SYNTH8_LOOP_RSB_MSB 16
1463 #define PHY_ANALOG_SYNTH8_LOOP_RSB_LSB 12
1464 #define PHY_ANALOG_SYNTH8_LOOP_RSB_MASK 0x0001f000
1465 #define PHY_ANALOG_SYNTH8_LOOP_RSB_GET(x) (((x) & 0x0001f000) >> 12)
1466 #define PHY_ANALOG_SYNTH8_LOOP_RSB_SET(x) (((x) << 12) & 0x0001f000)
1467 #define PHY_ANALOG_SYNTH8_LOOP_CPB_MSB 21
1468 #define PHY_ANALOG_SYNTH8_LOOP_CPB_LSB 17
1469 #define PHY_ANALOG_SYNTH8_LOOP_CPB_MASK 0x003e0000
1470 #define PHY_ANALOG_SYNTH8_LOOP_CPB_GET(x) (((x) & 0x003e0000) >> 17)
1471 #define PHY_ANALOG_SYNTH8_LOOP_CPB_SET(x) (((x) << 17) & 0x003e0000)
1472 #define PHY_ANALOG_SYNTH8_LOOP_3RD_ORDER_RB_MSB 26
1473 #define PHY_ANALOG_SYNTH8_LOOP_3RD_ORDER_RB_LSB 22
1474 #define PHY_ANALOG_SYNTH8_LOOP_3RD_ORDER_RB_MASK 0x07c00000
1475 #define PHY_ANALOG_SYNTH8_LOOP_3RD_ORDER_RB_GET(x) (((x) & 0x07c00000) >> 22)
1476 #define PHY_ANALOG_SYNTH8_LOOP_3RD_ORDER_RB_SET(x) (((x) << 22) & 0x07c00000)
1477 #define PHY_ANALOG_SYNTH8_REFDIVB_MSB 31
1478 #define PHY_ANALOG_SYNTH8_REFDIVB_LSB 27
1479 #define PHY_ANALOG_SYNTH8_REFDIVB_MASK 0xf8000000
1480 #define PHY_ANALOG_SYNTH8_REFDIVB_GET(x) (((x) & 0xf8000000) >> 27)
1481 #define PHY_ANALOG_SYNTH8_REFDIVB_SET(x) (((x) << 27) & 0xf8000000)
1482
1483 /* macros for SYNTH9 */
1484 #define PHY_ANALOG_SYNTH9_ADDRESS 0x000000a0
1485 #define PHY_ANALOG_SYNTH9_OFFSET 0x000000a0
1486 #define PHY_ANALOG_SYNTH9_PFDDELAY_INTN_MSB 0
1487 #define PHY_ANALOG_SYNTH9_PFDDELAY_INTN_LSB 0
1488 #define PHY_ANALOG_SYNTH9_PFDDELAY_INTN_MASK 0x00000001
1489 #define PHY_ANALOG_SYNTH9_PFDDELAY_INTN_GET(x) (((x) & 0x00000001) >> 0)
1490 #define PHY_ANALOG_SYNTH9_PFDDELAY_INTN_SET(x) (((x) << 0) & 0x00000001)
1491 #define PHY_ANALOG_SYNTH9_SLOPE_ICPA0_MSB 3
1492 #define PHY_ANALOG_SYNTH9_SLOPE_ICPA0_LSB 1
1493 #define PHY_ANALOG_SYNTH9_SLOPE_ICPA0_MASK 0x0000000e
1494 #define PHY_ANALOG_SYNTH9_SLOPE_ICPA0_GET(x) (((x) & 0x0000000e) >> 1)
1495 #define PHY_ANALOG_SYNTH9_SLOPE_ICPA0_SET(x) (((x) << 1) & 0x0000000e)
1496 #define PHY_ANALOG_SYNTH9_LOOP_ICPA0_MSB 7
1497 #define PHY_ANALOG_SYNTH9_LOOP_ICPA0_LSB 4
1498 #define PHY_ANALOG_SYNTH9_LOOP_ICPA0_MASK 0x000000f0
1499 #define PHY_ANALOG_SYNTH9_LOOP_ICPA0_GET(x) (((x) & 0x000000f0) >> 4)
1500 #define PHY_ANALOG_SYNTH9_LOOP_ICPA0_SET(x) (((x) << 4) & 0x000000f0)
1501 #define PHY_ANALOG_SYNTH9_LOOP_CSA0_MSB 11
1502 #define PHY_ANALOG_SYNTH9_LOOP_CSA0_LSB 8
1503 #define PHY_ANALOG_SYNTH9_LOOP_CSA0_MASK 0x00000f00
1504 #define PHY_ANALOG_SYNTH9_LOOP_CSA0_GET(x) (((x) & 0x00000f00) >> 8)
1505 #define PHY_ANALOG_SYNTH9_LOOP_CSA0_SET(x) (((x) << 8) & 0x00000f00)
1506 #define PHY_ANALOG_SYNTH9_LOOP_RSA0_MSB 16
1507 #define PHY_ANALOG_SYNTH9_LOOP_RSA0_LSB 12
1508 #define PHY_ANALOG_SYNTH9_LOOP_RSA0_MASK 0x0001f000
1509 #define PHY_ANALOG_SYNTH9_LOOP_RSA0_GET(x) (((x) & 0x0001f000) >> 12)
1510 #define PHY_ANALOG_SYNTH9_LOOP_RSA0_SET(x) (((x) << 12) & 0x0001f000)
1511 #define PHY_ANALOG_SYNTH9_LOOP_CPA0_MSB 21
1512 #define PHY_ANALOG_SYNTH9_LOOP_CPA0_LSB 17
1513 #define PHY_ANALOG_SYNTH9_LOOP_CPA0_MASK 0x003e0000
1514 #define PHY_ANALOG_SYNTH9_LOOP_CPA0_GET(x) (((x) & 0x003e0000) >> 17)
1515 #define PHY_ANALOG_SYNTH9_LOOP_CPA0_SET(x) (((x) << 17) & 0x003e0000)
1516 #define PHY_ANALOG_SYNTH9_LOOP_3RD_ORDER_RA_MSB 26
1517 #define PHY_ANALOG_SYNTH9_LOOP_3RD_ORDER_RA_LSB 22
1518 #define PHY_ANALOG_SYNTH9_LOOP_3RD_ORDER_RA_MASK 0x07c00000
1519 #define PHY_ANALOG_SYNTH9_LOOP_3RD_ORDER_RA_GET(x) (((x) & 0x07c00000) >> 22)
1520 #define PHY_ANALOG_SYNTH9_LOOP_3RD_ORDER_RA_SET(x) (((x) << 22) & 0x07c00000)
1521 #define PHY_ANALOG_SYNTH9_REFDIVA_MSB 31
1522 #define PHY_ANALOG_SYNTH9_REFDIVA_LSB 27
1523 #define PHY_ANALOG_SYNTH9_REFDIVA_MASK 0xf8000000
1524 #define PHY_ANALOG_SYNTH9_REFDIVA_GET(x) (((x) & 0xf8000000) >> 27)
1525 #define PHY_ANALOG_SYNTH9_REFDIVA_SET(x) (((x) << 27) & 0xf8000000)
1526
1527 /* macros for SYNTH10 */
1528 #define PHY_ANALOG_SYNTH10_ADDRESS 0x000000a4
1529 #define PHY_ANALOG_SYNTH10_OFFSET 0x000000a4
1530 #define PHY_ANALOG_SYNTH10_SPARE10A_MSB 0
1531 #define PHY_ANALOG_SYNTH10_SPARE10A_LSB 0
1532 #define PHY_ANALOG_SYNTH10_SPARE10A_MASK 0x00000001
1533 #define PHY_ANALOG_SYNTH10_SPARE10A_GET(x) (((x) & 0x00000001) >> 0)
1534 #define PHY_ANALOG_SYNTH10_SPARE10A_SET(x) (((x) << 0) & 0x00000001)
1535 #define PHY_ANALOG_SYNTH10_PWDB_ICLOBIAS50_MSB 3
1536 #define PHY_ANALOG_SYNTH10_PWDB_ICLOBIAS50_LSB 1
1537 #define PHY_ANALOG_SYNTH10_PWDB_ICLOBIAS50_MASK 0x0000000e
1538 #define PHY_ANALOG_SYNTH10_PWDB_ICLOBIAS50_GET(x) (((x) & 0x0000000e) >> 1)
1539 #define PHY_ANALOG_SYNTH10_PWDB_ICLOBIAS50_SET(x) (((x) << 1) & 0x0000000e)
1540 #define PHY_ANALOG_SYNTH10_EN_2X_LOOPFILT_MSB 4
1541 #define PHY_ANALOG_SYNTH10_EN_2X_LOOPFILT_LSB 4
1542 #define PHY_ANALOG_SYNTH10_EN_2X_LOOPFILT_MASK 0x00000010
1543 #define PHY_ANALOG_SYNTH10_EN_2X_LOOPFILT_GET(x) (((x) & 0x00000010) >> 4)
1544 #define PHY_ANALOG_SYNTH10_EN_2X_LOOPFILT_SET(x) (((x) << 4) & 0x00000010)
1545 #define PHY_ANALOG_SYNTH10_PWDB_IRSPARE25_MSB 7
1546 #define PHY_ANALOG_SYNTH10_PWDB_IRSPARE25_LSB 5
1547 #define PHY_ANALOG_SYNTH10_PWDB_IRSPARE25_MASK 0x000000e0
1548 #define PHY_ANALOG_SYNTH10_PWDB_IRSPARE25_GET(x) (((x) & 0x000000e0) >> 5)
1549 #define PHY_ANALOG_SYNTH10_PWDB_IRSPARE25_SET(x) (((x) << 5) & 0x000000e0)
1550 #define PHY_ANALOG_SYNTH10_PWDB_ICSPARE25_MSB 10
1551 #define PHY_ANALOG_SYNTH10_PWDB_ICSPARE25_LSB 8
1552 #define PHY_ANALOG_SYNTH10_PWDB_ICSPARE25_MASK 0x00000700
1553 #define PHY_ANALOG_SYNTH10_PWDB_ICSPARE25_GET(x) (((x) & 0x00000700) >> 8)
1554 #define PHY_ANALOG_SYNTH10_PWDB_ICSPARE25_SET(x) (((x) << 8) & 0x00000700)
1555 #define PHY_ANALOG_SYNTH10_SLOPE_ICPA1_MSB 13
1556 #define PHY_ANALOG_SYNTH10_SLOPE_ICPA1_LSB 11
1557 #define PHY_ANALOG_SYNTH10_SLOPE_ICPA1_MASK 0x00003800
1558 #define PHY_ANALOG_SYNTH10_SLOPE_ICPA1_GET(x) (((x) & 0x00003800) >> 11)
1559 #define PHY_ANALOG_SYNTH10_SLOPE_ICPA1_SET(x) (((x) << 11) & 0x00003800)
1560 #define PHY_ANALOG_SYNTH10_LOOP_ICPA1_MSB 17
1561 #define PHY_ANALOG_SYNTH10_LOOP_ICPA1_LSB 14
1562 #define PHY_ANALOG_SYNTH10_LOOP_ICPA1_MASK 0x0003c000
1563 #define PHY_ANALOG_SYNTH10_LOOP_ICPA1_GET(x) (((x) & 0x0003c000) >> 14)
1564 #define PHY_ANALOG_SYNTH10_LOOP_ICPA1_SET(x) (((x) << 14) & 0x0003c000)
1565 #define PHY_ANALOG_SYNTH10_LOOP_CSA1_MSB 21
1566 #define PHY_ANALOG_SYNTH10_LOOP_CSA1_LSB 18
1567 #define PHY_ANALOG_SYNTH10_LOOP_CSA1_MASK 0x003c0000
1568 #define PHY_ANALOG_SYNTH10_LOOP_CSA1_GET(x) (((x) & 0x003c0000) >> 18)
1569 #define PHY_ANALOG_SYNTH10_LOOP_CSA1_SET(x) (((x) << 18) & 0x003c0000)
1570 #define PHY_ANALOG_SYNTH10_LOOP_RSA1_MSB 26
1571 #define PHY_ANALOG_SYNTH10_LOOP_RSA1_LSB 22
1572 #define PHY_ANALOG_SYNTH10_LOOP_RSA1_MASK 0x07c00000
1573 #define PHY_ANALOG_SYNTH10_LOOP_RSA1_GET(x) (((x) & 0x07c00000) >> 22)
1574 #define PHY_ANALOG_SYNTH10_LOOP_RSA1_SET(x) (((x) << 22) & 0x07c00000)
1575 #define PHY_ANALOG_SYNTH10_LOOP_CPA1_MSB 31
1576 #define PHY_ANALOG_SYNTH10_LOOP_CPA1_LSB 27
1577 #define PHY_ANALOG_SYNTH10_LOOP_CPA1_MASK 0xf8000000
1578 #define PHY_ANALOG_SYNTH10_LOOP_CPA1_GET(x) (((x) & 0xf8000000) >> 27)
1579 #define PHY_ANALOG_SYNTH10_LOOP_CPA1_SET(x) (((x) << 27) & 0xf8000000)
1580
1581 /* macros for SYNTH11 */
1582 #define PHY_ANALOG_SYNTH11_ADDRESS 0x000000a8
1583 #define PHY_ANALOG_SYNTH11_OFFSET 0x000000a8
1584 #define PHY_ANALOG_SYNTH11_SPARE11A_MSB 4
1585 #define PHY_ANALOG_SYNTH11_SPARE11A_LSB 0
1586 #define PHY_ANALOG_SYNTH11_SPARE11A_MASK 0x0000001f
1587 #define PHY_ANALOG_SYNTH11_SPARE11A_GET(x) (((x) & 0x0000001f) >> 0)
1588 #define PHY_ANALOG_SYNTH11_SPARE11A_SET(x) (((x) << 0) & 0x0000001f)
1589 #define PHY_ANALOG_SYNTH11_FORCE_LOBUF5G_ON_MSB 5
1590 #define PHY_ANALOG_SYNTH11_FORCE_LOBUF5G_ON_LSB 5
1591 #define PHY_ANALOG_SYNTH11_FORCE_LOBUF5G_ON_MASK 0x00000020
1592 #define PHY_ANALOG_SYNTH11_FORCE_LOBUF5G_ON_GET(x) (((x) & 0x00000020) >> 5)
1593 #define PHY_ANALOG_SYNTH11_FORCE_LOBUF5G_ON_SET(x) (((x) << 5) & 0x00000020)
1594 #define PHY_ANALOG_SYNTH11_LOREFSEL_MSB 7
1595 #define PHY_ANALOG_SYNTH11_LOREFSEL_LSB 6
1596 #define PHY_ANALOG_SYNTH11_LOREFSEL_MASK 0x000000c0
1597 #define PHY_ANALOG_SYNTH11_LOREFSEL_GET(x) (((x) & 0x000000c0) >> 6)
1598 #define PHY_ANALOG_SYNTH11_LOREFSEL_SET(x) (((x) << 6) & 0x000000c0)
1599 #define PHY_ANALOG_SYNTH11_LOBUF2GTUNE_MSB 9
1600 #define PHY_ANALOG_SYNTH11_LOBUF2GTUNE_LSB 8
1601 #define PHY_ANALOG_SYNTH11_LOBUF2GTUNE_MASK 0x00000300
1602 #define PHY_ANALOG_SYNTH11_LOBUF2GTUNE_GET(x) (((x) & 0x00000300) >> 8)
1603 #define PHY_ANALOG_SYNTH11_LOBUF2GTUNE_SET(x) (((x) << 8) & 0x00000300)
1604 #define PHY_ANALOG_SYNTH11_CPSTEERING_MODE_MSB 10
1605 #define PHY_ANALOG_SYNTH11_CPSTEERING_MODE_LSB 10
1606 #define PHY_ANALOG_SYNTH11_CPSTEERING_MODE_MASK 0x00000400
1607 #define PHY_ANALOG_SYNTH11_CPSTEERING_MODE_GET(x) (((x) & 0x00000400) >> 10)
1608 #define PHY_ANALOG_SYNTH11_CPSTEERING_MODE_SET(x) (((x) << 10) & 0x00000400)
1609 #define PHY_ANALOG_SYNTH11_SLOPE_ICPA2_MSB 13
1610 #define PHY_ANALOG_SYNTH11_SLOPE_ICPA2_LSB 11
1611 #define PHY_ANALOG_SYNTH11_SLOPE_ICPA2_MASK 0x00003800
1612 #define PHY_ANALOG_SYNTH11_SLOPE_ICPA2_GET(x) (((x) & 0x00003800) >> 11)
1613 #define PHY_ANALOG_SYNTH11_SLOPE_ICPA2_SET(x) (((x) << 11) & 0x00003800)
1614 #define PHY_ANALOG_SYNTH11_LOOP_ICPA2_MSB 17
1615 #define PHY_ANALOG_SYNTH11_LOOP_ICPA2_LSB 14
1616 #define PHY_ANALOG_SYNTH11_LOOP_ICPA2_MASK 0x0003c000
1617 #define PHY_ANALOG_SYNTH11_LOOP_ICPA2_GET(x) (((x) & 0x0003c000) >> 14)
1618 #define PHY_ANALOG_SYNTH11_LOOP_ICPA2_SET(x) (((x) << 14) & 0x0003c000)
1619 #define PHY_ANALOG_SYNTH11_LOOP_CSA2_MSB 21
1620 #define PHY_ANALOG_SYNTH11_LOOP_CSA2_LSB 18
1621 #define PHY_ANALOG_SYNTH11_LOOP_CSA2_MASK 0x003c0000
1622 #define PHY_ANALOG_SYNTH11_LOOP_CSA2_GET(x) (((x) & 0x003c0000) >> 18)
1623 #define PHY_ANALOG_SYNTH11_LOOP_CSA2_SET(x) (((x) << 18) & 0x003c0000)
1624 #define PHY_ANALOG_SYNTH11_LOOP_RSA2_MSB 26
1625 #define PHY_ANALOG_SYNTH11_LOOP_RSA2_LSB 22
1626 #define PHY_ANALOG_SYNTH11_LOOP_RSA2_MASK 0x07c00000
1627 #define PHY_ANALOG_SYNTH11_LOOP_RSA2_GET(x) (((x) & 0x07c00000) >> 22)
1628 #define PHY_ANALOG_SYNTH11_LOOP_RSA2_SET(x) (((x) << 22) & 0x07c00000)
1629 #define PHY_ANALOG_SYNTH11_LOOP_CPA2_MSB 31
1630 #define PHY_ANALOG_SYNTH11_LOOP_CPA2_LSB 27
1631 #define PHY_ANALOG_SYNTH11_LOOP_CPA2_MASK 0xf8000000
1632 #define PHY_ANALOG_SYNTH11_LOOP_CPA2_GET(x) (((x) & 0xf8000000) >> 27)
1633 #define PHY_ANALOG_SYNTH11_LOOP_CPA2_SET(x) (((x) << 27) & 0xf8000000)
1634
1635 /* macros for SYNTH12 */
1636 #define PHY_ANALOG_SYNTH12_ADDRESS 0x000000ac
1637 #define PHY_ANALOG_SYNTH12_OFFSET 0x000000ac
1638 #define PHY_ANALOG_SYNTH12_SPARE12A_MSB 17
1639 #define PHY_ANALOG_SYNTH12_SPARE12A_LSB 0
1640 #define PHY_ANALOG_SYNTH12_SPARE12A_MASK 0x0003ffff
1641 #define PHY_ANALOG_SYNTH12_SPARE12A_GET(x) (((x) & 0x0003ffff) >> 0)
1642 #define PHY_ANALOG_SYNTH12_SPARE12A_SET(x) (((x) << 0) & 0x0003ffff)
1643 #define PHY_ANALOG_SYNTH12_STRCONT_MSB 18
1644 #define PHY_ANALOG_SYNTH12_STRCONT_LSB 18
1645 #define PHY_ANALOG_SYNTH12_STRCONT_MASK 0x00040000
1646 #define PHY_ANALOG_SYNTH12_STRCONT_GET(x) (((x) & 0x00040000) >> 18)
1647 #define PHY_ANALOG_SYNTH12_STRCONT_SET(x) (((x) << 18) & 0x00040000)
1648 #define PHY_ANALOG_SYNTH12_VREFMUL3_MSB 22
1649 #define PHY_ANALOG_SYNTH12_VREFMUL3_LSB 19
1650 #define PHY_ANALOG_SYNTH12_VREFMUL3_MASK 0x00780000
1651 #define PHY_ANALOG_SYNTH12_VREFMUL3_GET(x) (((x) & 0x00780000) >> 19)
1652 #define PHY_ANALOG_SYNTH12_VREFMUL3_SET(x) (((x) << 19) & 0x00780000)
1653 #define PHY_ANALOG_SYNTH12_VREFMUL2_MSB 26
1654 #define PHY_ANALOG_SYNTH12_VREFMUL2_LSB 23
1655 #define PHY_ANALOG_SYNTH12_VREFMUL2_MASK 0x07800000
1656 #define PHY_ANALOG_SYNTH12_VREFMUL2_GET(x) (((x) & 0x07800000) >> 23)
1657 #define PHY_ANALOG_SYNTH12_VREFMUL2_SET(x) (((x) << 23) & 0x07800000)
1658 #define PHY_ANALOG_SYNTH12_VREFMUL1_MSB 30
1659 #define PHY_ANALOG_SYNTH12_VREFMUL1_LSB 27
1660 #define PHY_ANALOG_SYNTH12_VREFMUL1_MASK 0x78000000
1661 #define PHY_ANALOG_SYNTH12_VREFMUL1_GET(x) (((x) & 0x78000000) >> 27)
1662 #define PHY_ANALOG_SYNTH12_VREFMUL1_SET(x) (((x) << 27) & 0x78000000)
1663 #define PHY_ANALOG_SYNTH12_CLK_DOUBLER_EN_MSB 31
1664 #define PHY_ANALOG_SYNTH12_CLK_DOUBLER_EN_LSB 31
1665 #define PHY_ANALOG_SYNTH12_CLK_DOUBLER_EN_MASK 0x80000000
1666 #define PHY_ANALOG_SYNTH12_CLK_DOUBLER_EN_GET(x) (((x) & 0x80000000) >> 31)
1667 #define PHY_ANALOG_SYNTH12_CLK_DOUBLER_EN_SET(x) (((x) << 31) & 0x80000000)
1668
1669 /* macros for BIAS1 */
1670 #define PHY_ANALOG_BIAS1_ADDRESS 0x000000c0
1671 #define PHY_ANALOG_BIAS1_OFFSET 0x000000c0
1672 #define PHY_ANALOG_BIAS1_SPARE1_MSB 6
1673 #define PHY_ANALOG_BIAS1_SPARE1_LSB 0
1674 #define PHY_ANALOG_BIAS1_SPARE1_MASK 0x0000007f
1675 #define PHY_ANALOG_BIAS1_SPARE1_GET(x) (((x) & 0x0000007f) >> 0)
1676 #define PHY_ANALOG_BIAS1_SPARE1_SET(x) (((x) << 0) & 0x0000007f)
1677 #define PHY_ANALOG_BIAS1_PWD_IC25V2IQ_MSB 9
1678 #define PHY_ANALOG_BIAS1_PWD_IC25V2IQ_LSB 7
1679 #define PHY_ANALOG_BIAS1_PWD_IC25V2IQ_MASK 0x00000380
1680 #define PHY_ANALOG_BIAS1_PWD_IC25V2IQ_GET(x) (((x) & 0x00000380) >> 7)
1681 #define PHY_ANALOG_BIAS1_PWD_IC25V2IQ_SET(x) (((x) << 7) & 0x00000380)
1682 #define PHY_ANALOG_BIAS1_PWD_IC25V2II_MSB 12
1683 #define PHY_ANALOG_BIAS1_PWD_IC25V2II_LSB 10
1684 #define PHY_ANALOG_BIAS1_PWD_IC25V2II_MASK 0x00001c00
1685 #define PHY_ANALOG_BIAS1_PWD_IC25V2II_GET(x) (((x) & 0x00001c00) >> 10)
1686 #define PHY_ANALOG_BIAS1_PWD_IC25V2II_SET(x) (((x) << 10) & 0x00001c00)
1687 #define PHY_ANALOG_BIAS1_PWD_IC25BB_MSB 15
1688 #define PHY_ANALOG_BIAS1_PWD_IC25BB_LSB 13
1689 #define PHY_ANALOG_BIAS1_PWD_IC25BB_MASK 0x0000e000
1690 #define PHY_ANALOG_BIAS1_PWD_IC25BB_GET(x) (((x) & 0x0000e000) >> 13)
1691 #define PHY_ANALOG_BIAS1_PWD_IC25BB_SET(x) (((x) << 13) & 0x0000e000)
1692 #define PHY_ANALOG_BIAS1_PWD_IC25DAC_MSB 18
1693 #define PHY_ANALOG_BIAS1_PWD_IC25DAC_LSB 16
1694 #define PHY_ANALOG_BIAS1_PWD_IC25DAC_MASK 0x00070000
1695 #define PHY_ANALOG_BIAS1_PWD_IC25DAC_GET(x) (((x) & 0x00070000) >> 16)
1696 #define PHY_ANALOG_BIAS1_PWD_IC25DAC_SET(x) (((x) << 16) & 0x00070000)
1697 #define PHY_ANALOG_BIAS1_PWD_IC25FIR_MSB 21
1698 #define PHY_ANALOG_BIAS1_PWD_IC25FIR_LSB 19
1699 #define PHY_ANALOG_BIAS1_PWD_IC25FIR_MASK 0x00380000
1700 #define PHY_ANALOG_BIAS1_PWD_IC25FIR_GET(x) (((x) & 0x00380000) >> 19)
1701 #define PHY_ANALOG_BIAS1_PWD_IC25FIR_SET(x) (((x) << 19) & 0x00380000)
1702 #define PHY_ANALOG_BIAS1_PWD_IC25ADC_MSB 24
1703 #define PHY_ANALOG_BIAS1_PWD_IC25ADC_LSB 22
1704 #define PHY_ANALOG_BIAS1_PWD_IC25ADC_MASK 0x01c00000
1705 #define PHY_ANALOG_BIAS1_PWD_IC25ADC_GET(x) (((x) & 0x01c00000) >> 22)
1706 #define PHY_ANALOG_BIAS1_PWD_IC25ADC_SET(x) (((x) << 22) & 0x01c00000)
1707 #define PHY_ANALOG_BIAS1_BIAS_SEL_MSB 31
1708 #define PHY_ANALOG_BIAS1_BIAS_SEL_LSB 25
1709 #define PHY_ANALOG_BIAS1_BIAS_SEL_MASK 0xfe000000
1710 #define PHY_ANALOG_BIAS1_BIAS_SEL_GET(x) (((x) & 0xfe000000) >> 25)
1711 #define PHY_ANALOG_BIAS1_BIAS_SEL_SET(x) (((x) << 25) & 0xfe000000)
1712
1713 /* macros for BIAS2 */
1714 #define PHY_ANALOG_BIAS2_ADDRESS 0x000000c4
1715 #define PHY_ANALOG_BIAS2_OFFSET 0x000000c4
1716 #define PHY_ANALOG_BIAS2_SPARE2_MSB 4
1717 #define PHY_ANALOG_BIAS2_SPARE2_LSB 0
1718 #define PHY_ANALOG_BIAS2_SPARE2_MASK 0x0000001f
1719 #define PHY_ANALOG_BIAS2_SPARE2_GET(x) (((x) & 0x0000001f) >> 0)
1720 #define PHY_ANALOG_BIAS2_SPARE2_SET(x) (((x) << 0) & 0x0000001f)
1721 #define PHY_ANALOG_BIAS2_PWD_IC25XTALREG_MSB 7
1722 #define PHY_ANALOG_BIAS2_PWD_IC25XTALREG_LSB 5
1723 #define PHY_ANALOG_BIAS2_PWD_IC25XTALREG_MASK 0x000000e0
1724 #define PHY_ANALOG_BIAS2_PWD_IC25XTALREG_GET(x) (((x) & 0x000000e0) >> 5)
1725 #define PHY_ANALOG_BIAS2_PWD_IC25XTALREG_SET(x) (((x) << 5) & 0x000000e0)
1726 #define PHY_ANALOG_BIAS2_PWD_IC25XTAL_MSB 10
1727 #define PHY_ANALOG_BIAS2_PWD_IC25XTAL_LSB 8
1728 #define PHY_ANALOG_BIAS2_PWD_IC25XTAL_MASK 0x00000700
1729 #define PHY_ANALOG_BIAS2_PWD_IC25XTAL_GET(x) (((x) & 0x00000700) >> 8)
1730 #define PHY_ANALOG_BIAS2_PWD_IC25XTAL_SET(x) (((x) << 8) & 0x00000700)
1731 #define PHY_ANALOG_BIAS2_PWD_IC25TXRF_MSB 13
1732 #define PHY_ANALOG_BIAS2_PWD_IC25TXRF_LSB 11
1733 #define PHY_ANALOG_BIAS2_PWD_IC25TXRF_MASK 0x00003800
1734 #define PHY_ANALOG_BIAS2_PWD_IC25TXRF_GET(x) (((x) & 0x00003800) >> 11)
1735 #define PHY_ANALOG_BIAS2_PWD_IC25TXRF_SET(x) (((x) << 11) & 0x00003800)
1736 #define PHY_ANALOG_BIAS2_PWD_IC25RXRF_MSB 16
1737 #define PHY_ANALOG_BIAS2_PWD_IC25RXRF_LSB 14
1738 #define PHY_ANALOG_BIAS2_PWD_IC25RXRF_MASK 0x0001c000
1739 #define PHY_ANALOG_BIAS2_PWD_IC25RXRF_GET(x) (((x) & 0x0001c000) >> 14)
1740 #define PHY_ANALOG_BIAS2_PWD_IC25RXRF_SET(x) (((x) << 14) & 0x0001c000)
1741 #define PHY_ANALOG_BIAS2_PWD_IC50SYNTH_MSB 19
1742 #define PHY_ANALOG_BIAS2_PWD_IC50SYNTH_LSB 17
1743 #define PHY_ANALOG_BIAS2_PWD_IC50SYNTH_MASK 0x000e0000
1744 #define PHY_ANALOG_BIAS2_PWD_IC50SYNTH_GET(x) (((x) & 0x000e0000) >> 17)
1745 #define PHY_ANALOG_BIAS2_PWD_IC50SYNTH_SET(x) (((x) << 17) & 0x000e0000)
1746 #define PHY_ANALOG_BIAS2_PWD_IC25PLLREG_MSB 22
1747 #define PHY_ANALOG_BIAS2_PWD_IC25PLLREG_LSB 20
1748 #define PHY_ANALOG_BIAS2_PWD_IC25PLLREG_MASK 0x00700000
1749 #define PHY_ANALOG_BIAS2_PWD_IC25PLLREG_GET(x) (((x) & 0x00700000) >> 20)
1750 #define PHY_ANALOG_BIAS2_PWD_IC25PLLREG_SET(x) (((x) << 20) & 0x00700000)
1751 #define PHY_ANALOG_BIAS2_PWD_IC25PLLCP2_MSB 25
1752 #define PHY_ANALOG_BIAS2_PWD_IC25PLLCP2_LSB 23
1753 #define PHY_ANALOG_BIAS2_PWD_IC25PLLCP2_MASK 0x03800000
1754 #define PHY_ANALOG_BIAS2_PWD_IC25PLLCP2_GET(x) (((x) & 0x03800000) >> 23)
1755 #define PHY_ANALOG_BIAS2_PWD_IC25PLLCP2_SET(x) (((x) << 23) & 0x03800000)
1756 #define PHY_ANALOG_BIAS2_PWD_IC25PLLCP_MSB 28
1757 #define PHY_ANALOG_BIAS2_PWD_IC25PLLCP_LSB 26
1758 #define PHY_ANALOG_BIAS2_PWD_IC25PLLCP_MASK 0x1c000000
1759 #define PHY_ANALOG_BIAS2_PWD_IC25PLLCP_GET(x) (((x) & 0x1c000000) >> 26)
1760 #define PHY_ANALOG_BIAS2_PWD_IC25PLLCP_SET(x) (((x) << 26) & 0x1c000000)
1761 #define PHY_ANALOG_BIAS2_PWD_IC25PLLGM_MSB 31
1762 #define PHY_ANALOG_BIAS2_PWD_IC25PLLGM_LSB 29
1763 #define PHY_ANALOG_BIAS2_PWD_IC25PLLGM_MASK 0xe0000000
1764 #define PHY_ANALOG_BIAS2_PWD_IC25PLLGM_GET(x) (((x) & 0xe0000000) >> 29)
1765 #define PHY_ANALOG_BIAS2_PWD_IC25PLLGM_SET(x) (((x) << 29) & 0xe0000000)
1766
1767 /* macros for BIAS3 */
1768 #define PHY_ANALOG_BIAS3_ADDRESS 0x000000c8
1769 #define PHY_ANALOG_BIAS3_OFFSET 0x000000c8
1770 #define PHY_ANALOG_BIAS3_SPARE3_MSB 1
1771 #define PHY_ANALOG_BIAS3_SPARE3_LSB 0
1772 #define PHY_ANALOG_BIAS3_SPARE3_MASK 0x00000003
1773 #define PHY_ANALOG_BIAS3_SPARE3_GET(x) (((x) & 0x00000003) >> 0)
1774 #define PHY_ANALOG_BIAS3_SPARE3_SET(x) (((x) << 0) & 0x00000003)
1775 #define PHY_ANALOG_BIAS3_PWD_IR25XTALREG_MSB 4
1776 #define PHY_ANALOG_BIAS3_PWD_IR25XTALREG_LSB 2
1777 #define PHY_ANALOG_BIAS3_PWD_IR25XTALREG_MASK 0x0000001c
1778 #define PHY_ANALOG_BIAS3_PWD_IR25XTALREG_GET(x) (((x) & 0x0000001c) >> 2)
1779 #define PHY_ANALOG_BIAS3_PWD_IR25XTALREG_SET(x) (((x) << 2) & 0x0000001c)
1780 #define PHY_ANALOG_BIAS3_PWD_IR25TXRF_MSB 7
1781 #define PHY_ANALOG_BIAS3_PWD_IR25TXRF_LSB 5
1782 #define PHY_ANALOG_BIAS3_PWD_IR25TXRF_MASK 0x000000e0
1783 #define PHY_ANALOG_BIAS3_PWD_IR25TXRF_GET(x) (((x) & 0x000000e0) >> 5)
1784 #define PHY_ANALOG_BIAS3_PWD_IR25TXRF_SET(x) (((x) << 5) & 0x000000e0)
1785 #define PHY_ANALOG_BIAS3_PWD_IR25RXRF_MSB 10
1786 #define PHY_ANALOG_BIAS3_PWD_IR25RXRF_LSB 8
1787 #define PHY_ANALOG_BIAS3_PWD_IR25RXRF_MASK 0x00000700
1788 #define PHY_ANALOG_BIAS3_PWD_IR25RXRF_GET(x) (((x) & 0x00000700) >> 8)
1789 #define PHY_ANALOG_BIAS3_PWD_IR25RXRF_SET(x) (((x) << 8) & 0x00000700)
1790 #define PHY_ANALOG_BIAS3_PWD_IR50SYNTH_MSB 13
1791 #define PHY_ANALOG_BIAS3_PWD_IR50SYNTH_LSB 11
1792 #define PHY_ANALOG_BIAS3_PWD_IR50SYNTH_MASK 0x00003800
1793 #define PHY_ANALOG_BIAS3_PWD_IR50SYNTH_GET(x) (((x) & 0x00003800) >> 11)
1794 #define PHY_ANALOG_BIAS3_PWD_IR50SYNTH_SET(x) (((x) << 11) & 0x00003800)
1795 #define PHY_ANALOG_BIAS3_PWD_IR25PLLREG_MSB 16
1796 #define PHY_ANALOG_BIAS3_PWD_IR25PLLREG_LSB 14
1797 #define PHY_ANALOG_BIAS3_PWD_IR25PLLREG_MASK 0x0001c000
1798 #define PHY_ANALOG_BIAS3_PWD_IR25PLLREG_GET(x) (((x) & 0x0001c000) >> 14)
1799 #define PHY_ANALOG_BIAS3_PWD_IR25PLLREG_SET(x) (((x) << 14) & 0x0001c000)
1800 #define PHY_ANALOG_BIAS3_PWD_IR25BB_MSB 19
1801 #define PHY_ANALOG_BIAS3_PWD_IR25BB_LSB 17
1802 #define PHY_ANALOG_BIAS3_PWD_IR25BB_MASK 0x000e0000
1803 #define PHY_ANALOG_BIAS3_PWD_IR25BB_GET(x) (((x) & 0x000e0000) >> 17)
1804 #define PHY_ANALOG_BIAS3_PWD_IR25BB_SET(x) (((x) << 17) & 0x000e0000)
1805 #define PHY_ANALOG_BIAS3_PWD_IR50DAC_MSB 22
1806 #define PHY_ANALOG_BIAS3_PWD_IR50DAC_LSB 20
1807 #define PHY_ANALOG_BIAS3_PWD_IR50DAC_MASK 0x00700000
1808 #define PHY_ANALOG_BIAS3_PWD_IR50DAC_GET(x) (((x) & 0x00700000) >> 20)
1809 #define PHY_ANALOG_BIAS3_PWD_IR50DAC_SET(x) (((x) << 20) & 0x00700000)
1810 #define PHY_ANALOG_BIAS3_PWD_IR25DAC_MSB 25
1811 #define PHY_ANALOG_BIAS3_PWD_IR25DAC_LSB 23
1812 #define PHY_ANALOG_BIAS3_PWD_IR25DAC_MASK 0x03800000
1813 #define PHY_ANALOG_BIAS3_PWD_IR25DAC_GET(x) (((x) & 0x03800000) >> 23)
1814 #define PHY_ANALOG_BIAS3_PWD_IR25DAC_SET(x) (((x) << 23) & 0x03800000)
1815 #define PHY_ANALOG_BIAS3_PWD_IR25FIR_MSB 28
1816 #define PHY_ANALOG_BIAS3_PWD_IR25FIR_LSB 26
1817 #define PHY_ANALOG_BIAS3_PWD_IR25FIR_MASK 0x1c000000
1818 #define PHY_ANALOG_BIAS3_PWD_IR25FIR_GET(x) (((x) & 0x1c000000) >> 26)
1819 #define PHY_ANALOG_BIAS3_PWD_IR25FIR_SET(x) (((x) << 26) & 0x1c000000)
1820 #define PHY_ANALOG_BIAS3_PWD_IR50ADC_MSB 31
1821 #define PHY_ANALOG_BIAS3_PWD_IR50ADC_LSB 29
1822 #define PHY_ANALOG_BIAS3_PWD_IR50ADC_MASK 0xe0000000
1823 #define PHY_ANALOG_BIAS3_PWD_IR50ADC_GET(x) (((x) & 0xe0000000) >> 29)
1824 #define PHY_ANALOG_BIAS3_PWD_IR50ADC_SET(x) (((x) << 29) & 0xe0000000)
1825
1826 /* macros for BIAS4 */
1827 #define PHY_ANALOG_BIAS4_ADDRESS 0x000000cc
1828 #define PHY_ANALOG_BIAS4_OFFSET 0x000000cc
1829 #define PHY_ANALOG_BIAS4_SPARE4_MSB 13
1830 #define PHY_ANALOG_BIAS4_SPARE4_LSB 0
1831 #define PHY_ANALOG_BIAS4_SPARE4_MASK 0x00003fff
1832 #define PHY_ANALOG_BIAS4_SPARE4_GET(x) (((x) & 0x00003fff) >> 0)
1833 #define PHY_ANALOG_BIAS4_SPARE4_SET(x) (((x) << 0) & 0x00003fff)
1834 #define PHY_ANALOG_BIAS4_PWD_IR25SPAREC_MSB 16
1835 #define PHY_ANALOG_BIAS4_PWD_IR25SPAREC_LSB 14
1836 #define PHY_ANALOG_BIAS4_PWD_IR25SPAREC_MASK 0x0001c000
1837 #define PHY_ANALOG_BIAS4_PWD_IR25SPAREC_GET(x) (((x) & 0x0001c000) >> 14)
1838 #define PHY_ANALOG_BIAS4_PWD_IR25SPAREC_SET(x) (((x) << 14) & 0x0001c000)
1839 #define PHY_ANALOG_BIAS4_PWD_IR25SPAREB_MSB 19
1840 #define PHY_ANALOG_BIAS4_PWD_IR25SPAREB_LSB 17
1841 #define PHY_ANALOG_BIAS4_PWD_IR25SPAREB_MASK 0x000e0000
1842 #define PHY_ANALOG_BIAS4_PWD_IR25SPAREB_GET(x) (((x) & 0x000e0000) >> 17)
1843 #define PHY_ANALOG_BIAS4_PWD_IR25SPAREB_SET(x) (((x) << 17) & 0x000e0000)
1844 #define PHY_ANALOG_BIAS4_PWD_IR25SPAREA_MSB 22
1845 #define PHY_ANALOG_BIAS4_PWD_IR25SPAREA_LSB 20
1846 #define PHY_ANALOG_BIAS4_PWD_IR25SPAREA_MASK 0x00700000
1847 #define PHY_ANALOG_BIAS4_PWD_IR25SPAREA_GET(x) (((x) & 0x00700000) >> 20)
1848 #define PHY_ANALOG_BIAS4_PWD_IR25SPAREA_SET(x) (((x) << 20) & 0x00700000)
1849 #define PHY_ANALOG_BIAS4_PWD_IC25SPAREC_MSB 25
1850 #define PHY_ANALOG_BIAS4_PWD_IC25SPAREC_LSB 23
1851 #define PHY_ANALOG_BIAS4_PWD_IC25SPAREC_MASK 0x03800000
1852 #define PHY_ANALOG_BIAS4_PWD_IC25SPAREC_GET(x) (((x) & 0x03800000) >> 23)
1853 #define PHY_ANALOG_BIAS4_PWD_IC25SPAREC_SET(x) (((x) << 23) & 0x03800000)
1854 #define PHY_ANALOG_BIAS4_PWD_IC25SPAREB_MSB 28
1855 #define PHY_ANALOG_BIAS4_PWD_IC25SPAREB_LSB 26
1856 #define PHY_ANALOG_BIAS4_PWD_IC25SPAREB_MASK 0x1c000000
1857 #define PHY_ANALOG_BIAS4_PWD_IC25SPAREB_GET(x) (((x) & 0x1c000000) >> 26)
1858 #define PHY_ANALOG_BIAS4_PWD_IC25SPAREB_SET(x) (((x) << 26) & 0x1c000000)
1859 #define PHY_ANALOG_BIAS4_PWD_IC25SPAREA_MSB 31
1860 #define PHY_ANALOG_BIAS4_PWD_IC25SPAREA_LSB 29
1861 #define PHY_ANALOG_BIAS4_PWD_IC25SPAREA_MASK 0xe0000000
1862 #define PHY_ANALOG_BIAS4_PWD_IC25SPAREA_GET(x) (((x) & 0xe0000000) >> 29)
1863 #define PHY_ANALOG_BIAS4_PWD_IC25SPAREA_SET(x) (((x) << 29) & 0xe0000000)
1864
1865 /* macros for RXTX1 */
1866 #define PHY_ANALOG_RXTX1_ADDRESS 0x00000100
1867 #define PHY_ANALOG_RXTX1_OFFSET 0x00000100
1868 #define PHY_ANALOG_RXTX1_SCFIR_GAIN_MSB 0
1869 #define PHY_ANALOG_RXTX1_SCFIR_GAIN_LSB 0
1870 #define PHY_ANALOG_RXTX1_SCFIR_GAIN_MASK 0x00000001
1871 #define PHY_ANALOG_RXTX1_SCFIR_GAIN_GET(x) (((x) & 0x00000001) >> 0)
1872 #define PHY_ANALOG_RXTX1_SCFIR_GAIN_SET(x) (((x) << 0) & 0x00000001)
1873 #define PHY_ANALOG_RXTX1_MANRXGAIN_MSB 1
1874 #define PHY_ANALOG_RXTX1_MANRXGAIN_LSB 1
1875 #define PHY_ANALOG_RXTX1_MANRXGAIN_MASK 0x00000002
1876 #define PHY_ANALOG_RXTX1_MANRXGAIN_GET(x) (((x) & 0x00000002) >> 1)
1877 #define PHY_ANALOG_RXTX1_MANRXGAIN_SET(x) (((x) << 1) & 0x00000002)
1878 #define PHY_ANALOG_RXTX1_AGC_DBDAC_MSB 5
1879 #define PHY_ANALOG_RXTX1_AGC_DBDAC_LSB 2
1880 #define PHY_ANALOG_RXTX1_AGC_DBDAC_MASK 0x0000003c
1881 #define PHY_ANALOG_RXTX1_AGC_DBDAC_GET(x) (((x) & 0x0000003c) >> 2)
1882 #define PHY_ANALOG_RXTX1_AGC_DBDAC_SET(x) (((x) << 2) & 0x0000003c)
1883 #define PHY_ANALOG_RXTX1_OVR_AGC_DBDAC_MSB 6
1884 #define PHY_ANALOG_RXTX1_OVR_AGC_DBDAC_LSB 6
1885 #define PHY_ANALOG_RXTX1_OVR_AGC_DBDAC_MASK 0x00000040
1886 #define PHY_ANALOG_RXTX1_OVR_AGC_DBDAC_GET(x) (((x) & 0x00000040) >> 6)
1887 #define PHY_ANALOG_RXTX1_OVR_AGC_DBDAC_SET(x) (((x) << 6) & 0x00000040)
1888 #define PHY_ANALOG_RXTX1_ENABLE_PAL_MSB 7
1889 #define PHY_ANALOG_RXTX1_ENABLE_PAL_LSB 7
1890 #define PHY_ANALOG_RXTX1_ENABLE_PAL_MASK 0x00000080
1891 #define PHY_ANALOG_RXTX1_ENABLE_PAL_GET(x) (((x) & 0x00000080) >> 7)
1892 #define PHY_ANALOG_RXTX1_ENABLE_PAL_SET(x) (((x) << 7) & 0x00000080)
1893 #define PHY_ANALOG_RXTX1_ENABLE_PAL_OVR_MSB 8
1894 #define PHY_ANALOG_RXTX1_ENABLE_PAL_OVR_LSB 8
1895 #define PHY_ANALOG_RXTX1_ENABLE_PAL_OVR_MASK 0x00000100
1896 #define PHY_ANALOG_RXTX1_ENABLE_PAL_OVR_GET(x) (((x) & 0x00000100) >> 8)
1897 #define PHY_ANALOG_RXTX1_ENABLE_PAL_OVR_SET(x) (((x) << 8) & 0x00000100)
1898 #define PHY_ANALOG_RXTX1_TX1DB_BIQUAD_MSB 11
1899 #define PHY_ANALOG_RXTX1_TX1DB_BIQUAD_LSB 9
1900 #define PHY_ANALOG_RXTX1_TX1DB_BIQUAD_MASK 0x00000e00
1901 #define PHY_ANALOG_RXTX1_TX1DB_BIQUAD_GET(x) (((x) & 0x00000e00) >> 9)
1902 #define PHY_ANALOG_RXTX1_TX1DB_BIQUAD_SET(x) (((x) << 9) & 0x00000e00)
1903 #define PHY_ANALOG_RXTX1_TX6DB_BIQUAD_MSB 13
1904 #define PHY_ANALOG_RXTX1_TX6DB_BIQUAD_LSB 12
1905 #define PHY_ANALOG_RXTX1_TX6DB_BIQUAD_MASK 0x00003000
1906 #define PHY_ANALOG_RXTX1_TX6DB_BIQUAD_GET(x) (((x) & 0x00003000) >> 12)
1907 #define PHY_ANALOG_RXTX1_TX6DB_BIQUAD_SET(x) (((x) << 12) & 0x00003000)
1908 #define PHY_ANALOG_RXTX1_PADRVHALFGN2G_MSB 14
1909 #define PHY_ANALOG_RXTX1_PADRVHALFGN2G_LSB 14
1910 #define PHY_ANALOG_RXTX1_PADRVHALFGN2G_MASK 0x00004000
1911 #define PHY_ANALOG_RXTX1_PADRVHALFGN2G_GET(x) (((x) & 0x00004000) >> 14)
1912 #define PHY_ANALOG_RXTX1_PADRVHALFGN2G_SET(x) (((x) << 14) & 0x00004000)
1913 #define PHY_ANALOG_RXTX1_PADRV2GN_MSB 18
1914 #define PHY_ANALOG_RXTX1_PADRV2GN_LSB 15
1915 #define PHY_ANALOG_RXTX1_PADRV2GN_MASK 0x00078000
1916 #define PHY_ANALOG_RXTX1_PADRV2GN_GET(x) (((x) & 0x00078000) >> 15)
1917 #define PHY_ANALOG_RXTX1_PADRV2GN_SET(x) (((x) << 15) & 0x00078000)
1918 #define PHY_ANALOG_RXTX1_PADRV3GN5G_MSB 22
1919 #define PHY_ANALOG_RXTX1_PADRV3GN5G_LSB 19
1920 #define PHY_ANALOG_RXTX1_PADRV3GN5G_MASK 0x00780000
1921 #define PHY_ANALOG_RXTX1_PADRV3GN5G_GET(x) (((x) & 0x00780000) >> 19)
1922 #define PHY_ANALOG_RXTX1_PADRV3GN5G_SET(x) (((x) << 19) & 0x00780000)
1923 #define PHY_ANALOG_RXTX1_PADRV4GN5G_MSB 26
1924 #define PHY_ANALOG_RXTX1_PADRV4GN5G_LSB 23
1925 #define PHY_ANALOG_RXTX1_PADRV4GN5G_MASK 0x07800000
1926 #define PHY_ANALOG_RXTX1_PADRV4GN5G_GET(x) (((x) & 0x07800000) >> 23)
1927 #define PHY_ANALOG_RXTX1_PADRV4GN5G_SET(x) (((x) << 23) & 0x07800000)
1928 #define PHY_ANALOG_RXTX1_TXBB_GC_MSB 30
1929 #define PHY_ANALOG_RXTX1_TXBB_GC_LSB 27
1930 #define PHY_ANALOG_RXTX1_TXBB_GC_MASK 0x78000000
1931 #define PHY_ANALOG_RXTX1_TXBB_GC_GET(x) (((x) & 0x78000000) >> 27)
1932 #define PHY_ANALOG_RXTX1_TXBB_GC_SET(x) (((x) << 27) & 0x78000000)
1933 #define PHY_ANALOG_RXTX1_MANTXGAIN_MSB 31
1934 #define PHY_ANALOG_RXTX1_MANTXGAIN_LSB 31
1935 #define PHY_ANALOG_RXTX1_MANTXGAIN_MASK 0x80000000
1936 #define PHY_ANALOG_RXTX1_MANTXGAIN_GET(x) (((x) & 0x80000000) >> 31)
1937 #define PHY_ANALOG_RXTX1_MANTXGAIN_SET(x) (((x) << 31) & 0x80000000)
1938
1939 /* macros for RXTX2 */
1940 #define PHY_ANALOG_RXTX2_ADDRESS 0x00000104
1941 #define PHY_ANALOG_RXTX2_OFFSET 0x00000104
1942 #define PHY_ANALOG_RXTX2_BMODE_MSB 0
1943 #define PHY_ANALOG_RXTX2_BMODE_LSB 0
1944 #define PHY_ANALOG_RXTX2_BMODE_MASK 0x00000001
1945 #define PHY_ANALOG_RXTX2_BMODE_GET(x) (((x) & 0x00000001) >> 0)
1946 #define PHY_ANALOG_RXTX2_BMODE_SET(x) (((x) << 0) & 0x00000001)
1947 #define PHY_ANALOG_RXTX2_BMODE_OVR_MSB 1
1948 #define PHY_ANALOG_RXTX2_BMODE_OVR_LSB 1
1949 #define PHY_ANALOG_RXTX2_BMODE_OVR_MASK 0x00000002
1950 #define PHY_ANALOG_RXTX2_BMODE_OVR_GET(x) (((x) & 0x00000002) >> 1)
1951 #define PHY_ANALOG_RXTX2_BMODE_OVR_SET(x) (((x) << 1) & 0x00000002)
1952 #define PHY_ANALOG_RXTX2_SYNTHON_MSB 2
1953 #define PHY_ANALOG_RXTX2_SYNTHON_LSB 2
1954 #define PHY_ANALOG_RXTX2_SYNTHON_MASK 0x00000004
1955 #define PHY_ANALOG_RXTX2_SYNTHON_GET(x) (((x) & 0x00000004) >> 2)
1956 #define PHY_ANALOG_RXTX2_SYNTHON_SET(x) (((x) << 2) & 0x00000004)
1957 #define PHY_ANALOG_RXTX2_SYNTHON_OVR_MSB 3
1958 #define PHY_ANALOG_RXTX2_SYNTHON_OVR_LSB 3
1959 #define PHY_ANALOG_RXTX2_SYNTHON_OVR_MASK 0x00000008
1960 #define PHY_ANALOG_RXTX2_SYNTHON_OVR_GET(x) (((x) & 0x00000008) >> 3)
1961 #define PHY_ANALOG_RXTX2_SYNTHON_OVR_SET(x) (((x) << 3) & 0x00000008)
1962 #define PHY_ANALOG_RXTX2_BW_ST_MSB 5
1963 #define PHY_ANALOG_RXTX2_BW_ST_LSB 4
1964 #define PHY_ANALOG_RXTX2_BW_ST_MASK 0x00000030
1965 #define PHY_ANALOG_RXTX2_BW_ST_GET(x) (((x) & 0x00000030) >> 4)
1966 #define PHY_ANALOG_RXTX2_BW_ST_SET(x) (((x) << 4) & 0x00000030)
1967 #define PHY_ANALOG_RXTX2_BW_ST_OVR_MSB 6
1968 #define PHY_ANALOG_RXTX2_BW_ST_OVR_LSB 6
1969 #define PHY_ANALOG_RXTX2_BW_ST_OVR_MASK 0x00000040
1970 #define PHY_ANALOG_RXTX2_BW_ST_OVR_GET(x) (((x) & 0x00000040) >> 6)
1971 #define PHY_ANALOG_RXTX2_BW_ST_OVR_SET(x) (((x) << 6) & 0x00000040)
1972 #define PHY_ANALOG_RXTX2_TXON_MSB 7
1973 #define PHY_ANALOG_RXTX2_TXON_LSB 7
1974 #define PHY_ANALOG_RXTX2_TXON_MASK 0x00000080
1975 #define PHY_ANALOG_RXTX2_TXON_GET(x) (((x) & 0x00000080) >> 7)
1976 #define PHY_ANALOG_RXTX2_TXON_SET(x) (((x) << 7) & 0x00000080)
1977 #define PHY_ANALOG_RXTX2_TXON_OVR_MSB 8
1978 #define PHY_ANALOG_RXTX2_TXON_OVR_LSB 8
1979 #define PHY_ANALOG_RXTX2_TXON_OVR_MASK 0x00000100
1980 #define PHY_ANALOG_RXTX2_TXON_OVR_GET(x) (((x) & 0x00000100) >> 8)
1981 #define PHY_ANALOG_RXTX2_TXON_OVR_SET(x) (((x) << 8) & 0x00000100)
1982 #define PHY_ANALOG_RXTX2_PAON_MSB 9
1983 #define PHY_ANALOG_RXTX2_PAON_LSB 9
1984 #define PHY_ANALOG_RXTX2_PAON_MASK 0x00000200
1985 #define PHY_ANALOG_RXTX2_PAON_GET(x) (((x) & 0x00000200) >> 9)
1986 #define PHY_ANALOG_RXTX2_PAON_SET(x) (((x) << 9) & 0x00000200)
1987 #define PHY_ANALOG_RXTX2_PAON_OVR_MSB 10
1988 #define PHY_ANALOG_RXTX2_PAON_OVR_LSB 10
1989 #define PHY_ANALOG_RXTX2_PAON_OVR_MASK 0x00000400
1990 #define PHY_ANALOG_RXTX2_PAON_OVR_GET(x) (((x) & 0x00000400) >> 10)
1991 #define PHY_ANALOG_RXTX2_PAON_OVR_SET(x) (((x) << 10) & 0x00000400)
1992 #define PHY_ANALOG_RXTX2_RXON_MSB 11
1993 #define PHY_ANALOG_RXTX2_RXON_LSB 11
1994 #define PHY_ANALOG_RXTX2_RXON_MASK 0x00000800
1995 #define PHY_ANALOG_RXTX2_RXON_GET(x) (((x) & 0x00000800) >> 11)
1996 #define PHY_ANALOG_RXTX2_RXON_SET(x) (((x) << 11) & 0x00000800)
1997 #define PHY_ANALOG_RXTX2_RXON_OVR_MSB 12
1998 #define PHY_ANALOG_RXTX2_RXON_OVR_LSB 12
1999 #define PHY_ANALOG_RXTX2_RXON_OVR_MASK 0x00001000
2000 #define PHY_ANALOG_RXTX2_RXON_OVR_GET(x) (((x) & 0x00001000) >> 12)
2001 #define PHY_ANALOG_RXTX2_RXON_OVR_SET(x) (((x) << 12) & 0x00001000)
2002 #define PHY_ANALOG_RXTX2_AGCON_MSB 13
2003 #define PHY_ANALOG_RXTX2_AGCON_LSB 13
2004 #define PHY_ANALOG_RXTX2_AGCON_MASK 0x00002000
2005 #define PHY_ANALOG_RXTX2_AGCON_GET(x) (((x) & 0x00002000) >> 13)
2006 #define PHY_ANALOG_RXTX2_AGCON_SET(x) (((x) << 13) & 0x00002000)
2007 #define PHY_ANALOG_RXTX2_AGCON_OVR_MSB 14
2008 #define PHY_ANALOG_RXTX2_AGCON_OVR_LSB 14
2009 #define PHY_ANALOG_RXTX2_AGCON_OVR_MASK 0x00004000
2010 #define PHY_ANALOG_RXTX2_AGCON_OVR_GET(x) (((x) & 0x00004000) >> 14)
2011 #define PHY_ANALOG_RXTX2_AGCON_OVR_SET(x) (((x) << 14) & 0x00004000)
2012 #define PHY_ANALOG_RXTX2_TXMOD_MSB 17
2013 #define PHY_ANALOG_RXTX2_TXMOD_LSB 15
2014 #define PHY_ANALOG_RXTX2_TXMOD_MASK 0x00038000
2015 #define PHY_ANALOG_RXTX2_TXMOD_GET(x) (((x) & 0x00038000) >> 15)
2016 #define PHY_ANALOG_RXTX2_TXMOD_SET(x) (((x) << 15) & 0x00038000)
2017 #define PHY_ANALOG_RXTX2_TXMOD_OVR_MSB 18
2018 #define PHY_ANALOG_RXTX2_TXMOD_OVR_LSB 18
2019 #define PHY_ANALOG_RXTX2_TXMOD_OVR_MASK 0x00040000
2020 #define PHY_ANALOG_RXTX2_TXMOD_OVR_GET(x) (((x) & 0x00040000) >> 18)
2021 #define PHY_ANALOG_RXTX2_TXMOD_OVR_SET(x) (((x) << 18) & 0x00040000)
2022 #define PHY_ANALOG_RXTX2_RX1DB_BIQUAD_MSB 21
2023 #define PHY_ANALOG_RXTX2_RX1DB_BIQUAD_LSB 19
2024 #define PHY_ANALOG_RXTX2_RX1DB_BIQUAD_MASK 0x00380000
2025 #define PHY_ANALOG_RXTX2_RX1DB_BIQUAD_GET(x) (((x) & 0x00380000) >> 19)
2026 #define PHY_ANALOG_RXTX2_RX1DB_BIQUAD_SET(x) (((x) << 19) & 0x00380000)
2027 #define PHY_ANALOG_RXTX2_RX6DB_BIQUAD_MSB 23
2028 #define PHY_ANALOG_RXTX2_RX6DB_BIQUAD_LSB 22
2029 #define PHY_ANALOG_RXTX2_RX6DB_BIQUAD_MASK 0x00c00000
2030 #define PHY_ANALOG_RXTX2_RX6DB_BIQUAD_GET(x) (((x) & 0x00c00000) >> 22)
2031 #define PHY_ANALOG_RXTX2_RX6DB_BIQUAD_SET(x) (((x) << 22) & 0x00c00000)
2032 #define PHY_ANALOG_RXTX2_MXRGAIN_MSB 25
2033 #define PHY_ANALOG_RXTX2_MXRGAIN_LSB 24
2034 #define PHY_ANALOG_RXTX2_MXRGAIN_MASK 0x03000000
2035 #define PHY_ANALOG_RXTX2_MXRGAIN_GET(x) (((x) & 0x03000000) >> 24)
2036 #define PHY_ANALOG_RXTX2_MXRGAIN_SET(x) (((x) << 24) & 0x03000000)
2037 #define PHY_ANALOG_RXTX2_VGAGAIN_MSB 28
2038 #define PHY_ANALOG_RXTX2_VGAGAIN_LSB 26
2039 #define PHY_ANALOG_RXTX2_VGAGAIN_MASK 0x1c000000
2040 #define PHY_ANALOG_RXTX2_VGAGAIN_GET(x) (((x) & 0x1c000000) >> 26)
2041 #define PHY_ANALOG_RXTX2_VGAGAIN_SET(x) (((x) << 26) & 0x1c000000)
2042 #define PHY_ANALOG_RXTX2_LNAGAIN_MSB 31
2043 #define PHY_ANALOG_RXTX2_LNAGAIN_LSB 29
2044 #define PHY_ANALOG_RXTX2_LNAGAIN_MASK 0xe0000000
2045 #define PHY_ANALOG_RXTX2_LNAGAIN_GET(x) (((x) & 0xe0000000) >> 29)
2046 #define PHY_ANALOG_RXTX2_LNAGAIN_SET(x) (((x) << 29) & 0xe0000000)
2047
2048 /* macros for RXTX3 */
2049 #define PHY_ANALOG_RXTX3_ADDRESS 0x00000108
2050 #define PHY_ANALOG_RXTX3_OFFSET 0x00000108
2051 #define PHY_ANALOG_RXTX3_SPARE3_MSB 2
2052 #define PHY_ANALOG_RXTX3_SPARE3_LSB 0
2053 #define PHY_ANALOG_RXTX3_SPARE3_MASK 0x00000007
2054 #define PHY_ANALOG_RXTX3_SPARE3_GET(x) (((x) & 0x00000007) >> 0)
2055 #define PHY_ANALOG_RXTX3_SPARE3_SET(x) (((x) << 0) & 0x00000007)
2056 #define PHY_ANALOG_RXTX3_DACFULLSCALE_MSB 3
2057 #define PHY_ANALOG_RXTX3_DACFULLSCALE_LSB 3
2058 #define PHY_ANALOG_RXTX3_DACFULLSCALE_MASK 0x00000008
2059 #define PHY_ANALOG_RXTX3_DACFULLSCALE_GET(x) (((x) & 0x00000008) >> 3)
2060 #define PHY_ANALOG_RXTX3_DACFULLSCALE_SET(x) (((x) << 3) & 0x00000008)
2061 #define PHY_ANALOG_RXTX3_DACRSTB_MSB 4
2062 #define PHY_ANALOG_RXTX3_DACRSTB_LSB 4
2063 #define PHY_ANALOG_RXTX3_DACRSTB_MASK 0x00000010
2064 #define PHY_ANALOG_RXTX3_DACRSTB_GET(x) (((x) & 0x00000010) >> 4)
2065 #define PHY_ANALOG_RXTX3_DACRSTB_SET(x) (((x) << 4) & 0x00000010)
2066 #define PHY_ANALOG_RXTX3_ADDACLOOPBACK_MSB 5
2067 #define PHY_ANALOG_RXTX3_ADDACLOOPBACK_LSB 5
2068 #define PHY_ANALOG_RXTX3_ADDACLOOPBACK_MASK 0x00000020
2069 #define PHY_ANALOG_RXTX3_ADDACLOOPBACK_GET(x) (((x) & 0x00000020) >> 5)
2070 #define PHY_ANALOG_RXTX3_ADDACLOOPBACK_SET(x) (((x) << 5) & 0x00000020)
2071 #define PHY_ANALOG_RXTX3_ADCSHORT_MSB 6
2072 #define PHY_ANALOG_RXTX3_ADCSHORT_LSB 6
2073 #define PHY_ANALOG_RXTX3_ADCSHORT_MASK 0x00000040
2074 #define PHY_ANALOG_RXTX3_ADCSHORT_GET(x) (((x) & 0x00000040) >> 6)
2075 #define PHY_ANALOG_RXTX3_ADCSHORT_SET(x) (((x) << 6) & 0x00000040)
2076 #define PHY_ANALOG_RXTX3_DACPWD_MSB 7
2077 #define PHY_ANALOG_RXTX3_DACPWD_LSB 7
2078 #define PHY_ANALOG_RXTX3_DACPWD_MASK 0x00000080
2079 #define PHY_ANALOG_RXTX3_DACPWD_GET(x) (((x) & 0x00000080) >> 7)
2080 #define PHY_ANALOG_RXTX3_DACPWD_SET(x) (((x) << 7) & 0x00000080)
2081 #define PHY_ANALOG_RXTX3_DACPWD_OVR_MSB 8
2082 #define PHY_ANALOG_RXTX3_DACPWD_OVR_LSB 8
2083 #define PHY_ANALOG_RXTX3_DACPWD_OVR_MASK 0x00000100
2084 #define PHY_ANALOG_RXTX3_DACPWD_OVR_GET(x) (((x) & 0x00000100) >> 8)
2085 #define PHY_ANALOG_RXTX3_DACPWD_OVR_SET(x) (((x) << 8) & 0x00000100)
2086 #define PHY_ANALOG_RXTX3_ADCPWD_MSB 9
2087 #define PHY_ANALOG_RXTX3_ADCPWD_LSB 9
2088 #define PHY_ANALOG_RXTX3_ADCPWD_MASK 0x00000200
2089 #define PHY_ANALOG_RXTX3_ADCPWD_GET(x) (((x) & 0x00000200) >> 9)
2090 #define PHY_ANALOG_RXTX3_ADCPWD_SET(x) (((x) << 9) & 0x00000200)
2091 #define PHY_ANALOG_RXTX3_ADCPWD_OVR_MSB 10
2092 #define PHY_ANALOG_RXTX3_ADCPWD_OVR_LSB 10
2093 #define PHY_ANALOG_RXTX3_ADCPWD_OVR_MASK 0x00000400
2094 #define PHY_ANALOG_RXTX3_ADCPWD_OVR_GET(x) (((x) & 0x00000400) >> 10)
2095 #define PHY_ANALOG_RXTX3_ADCPWD_OVR_SET(x) (((x) << 10) & 0x00000400)
2096 #define PHY_ANALOG_RXTX3_AGC_CALDAC_MSB 16
2097 #define PHY_ANALOG_RXTX3_AGC_CALDAC_LSB 11
2098 #define PHY_ANALOG_RXTX3_AGC_CALDAC_MASK 0x0001f800
2099 #define PHY_ANALOG_RXTX3_AGC_CALDAC_GET(x) (((x) & 0x0001f800) >> 11)
2100 #define PHY_ANALOG_RXTX3_AGC_CALDAC_SET(x) (((x) << 11) & 0x0001f800)
2101 #define PHY_ANALOG_RXTX3_AGC_CAL_MSB 17
2102 #define PHY_ANALOG_RXTX3_AGC_CAL_LSB 17
2103 #define PHY_ANALOG_RXTX3_AGC_CAL_MASK 0x00020000
2104 #define PHY_ANALOG_RXTX3_AGC_CAL_GET(x) (((x) & 0x00020000) >> 17)
2105 #define PHY_ANALOG_RXTX3_AGC_CAL_SET(x) (((x) << 17) & 0x00020000)
2106 #define PHY_ANALOG_RXTX3_AGC_CAL_OVR_MSB 18
2107 #define PHY_ANALOG_RXTX3_AGC_CAL_OVR_LSB 18
2108 #define PHY_ANALOG_RXTX3_AGC_CAL_OVR_MASK 0x00040000
2109 #define PHY_ANALOG_RXTX3_AGC_CAL_OVR_GET(x) (((x) & 0x00040000) >> 18)
2110 #define PHY_ANALOG_RXTX3_AGC_CAL_OVR_SET(x) (((x) << 18) & 0x00040000)
2111 #define PHY_ANALOG_RXTX3_LOFORCEDON_MSB 19
2112 #define PHY_ANALOG_RXTX3_LOFORCEDON_LSB 19
2113 #define PHY_ANALOG_RXTX3_LOFORCEDON_MASK 0x00080000
2114 #define PHY_ANALOG_RXTX3_LOFORCEDON_GET(x) (((x) & 0x00080000) >> 19)
2115 #define PHY_ANALOG_RXTX3_LOFORCEDON_SET(x) (((x) << 19) & 0x00080000)
2116 #define PHY_ANALOG_RXTX3_CALRESIDUE_MSB 20
2117 #define PHY_ANALOG_RXTX3_CALRESIDUE_LSB 20
2118 #define PHY_ANALOG_RXTX3_CALRESIDUE_MASK 0x00100000
2119 #define PHY_ANALOG_RXTX3_CALRESIDUE_GET(x) (((x) & 0x00100000) >> 20)
2120 #define PHY_ANALOG_RXTX3_CALRESIDUE_SET(x) (((x) << 20) & 0x00100000)
2121 #define PHY_ANALOG_RXTX3_CALRESIDUE_OVR_MSB 21
2122 #define PHY_ANALOG_RXTX3_CALRESIDUE_OVR_LSB 21
2123 #define PHY_ANALOG_RXTX3_CALRESIDUE_OVR_MASK 0x00200000
2124 #define PHY_ANALOG_RXTX3_CALRESIDUE_OVR_GET(x) (((x) & 0x00200000) >> 21)
2125 #define PHY_ANALOG_RXTX3_CALRESIDUE_OVR_SET(x) (((x) << 21) & 0x00200000)
2126 #define PHY_ANALOG_RXTX3_CALFC_MSB 22
2127 #define PHY_ANALOG_RXTX3_CALFC_LSB 22
2128 #define PHY_ANALOG_RXTX3_CALFC_MASK 0x00400000
2129 #define PHY_ANALOG_RXTX3_CALFC_GET(x) (((x) & 0x00400000) >> 22)
2130 #define PHY_ANALOG_RXTX3_CALFC_SET(x) (((x) << 22) & 0x00400000)
2131 #define PHY_ANALOG_RXTX3_CALFC_OVR_MSB 23
2132 #define PHY_ANALOG_RXTX3_CALFC_OVR_LSB 23
2133 #define PHY_ANALOG_RXTX3_CALFC_OVR_MASK 0x00800000
2134 #define PHY_ANALOG_RXTX3_CALFC_OVR_GET(x) (((x) & 0x00800000) >> 23)
2135 #define PHY_ANALOG_RXTX3_CALFC_OVR_SET(x) (((x) << 23) & 0x00800000)
2136 #define PHY_ANALOG_RXTX3_CALTX_MSB 24
2137 #define PHY_ANALOG_RXTX3_CALTX_LSB 24
2138 #define PHY_ANALOG_RXTX3_CALTX_MASK 0x01000000
2139 #define PHY_ANALOG_RXTX3_CALTX_GET(x) (((x) & 0x01000000) >> 24)
2140 #define PHY_ANALOG_RXTX3_CALTX_SET(x) (((x) << 24) & 0x01000000)
2141 #define PHY_ANALOG_RXTX3_CALTX_OVR_MSB 25
2142 #define PHY_ANALOG_RXTX3_CALTX_OVR_LSB 25
2143 #define PHY_ANALOG_RXTX3_CALTX_OVR_MASK 0x02000000
2144 #define PHY_ANALOG_RXTX3_CALTX_OVR_GET(x) (((x) & 0x02000000) >> 25)
2145 #define PHY_ANALOG_RXTX3_CALTX_OVR_SET(x) (((x) << 25) & 0x02000000)
2146 #define PHY_ANALOG_RXTX3_CALTXSHIFT_MSB 26
2147 #define PHY_ANALOG_RXTX3_CALTXSHIFT_LSB 26
2148 #define PHY_ANALOG_RXTX3_CALTXSHIFT_MASK 0x04000000
2149 #define PHY_ANALOG_RXTX3_CALTXSHIFT_GET(x) (((x) & 0x04000000) >> 26)
2150 #define PHY_ANALOG_RXTX3_CALTXSHIFT_SET(x) (((x) << 26) & 0x04000000)
2151 #define PHY_ANALOG_RXTX3_CALTXSHIFT_OVR_MSB 27
2152 #define PHY_ANALOG_RXTX3_CALTXSHIFT_OVR_LSB 27
2153 #define PHY_ANALOG_RXTX3_CALTXSHIFT_OVR_MASK 0x08000000
2154 #define PHY_ANALOG_RXTX3_CALTXSHIFT_OVR_GET(x) (((x) & 0x08000000) >> 27)
2155 #define PHY_ANALOG_RXTX3_CALTXSHIFT_OVR_SET(x) (((x) << 27) & 0x08000000)
2156 #define PHY_ANALOG_RXTX3_CALPA_MSB 28
2157 #define PHY_ANALOG_RXTX3_CALPA_LSB 28
2158 #define PHY_ANALOG_RXTX3_CALPA_MASK 0x10000000
2159 #define PHY_ANALOG_RXTX3_CALPA_GET(x) (((x) & 0x10000000) >> 28)
2160 #define PHY_ANALOG_RXTX3_CALPA_SET(x) (((x) << 28) & 0x10000000)
2161 #define PHY_ANALOG_RXTX3_CALPA_OVR_MSB 29
2162 #define PHY_ANALOG_RXTX3_CALPA_OVR_LSB 29
2163 #define PHY_ANALOG_RXTX3_CALPA_OVR_MASK 0x20000000
2164 #define PHY_ANALOG_RXTX3_CALPA_OVR_GET(x) (((x) & 0x20000000) >> 29)
2165 #define PHY_ANALOG_RXTX3_CALPA_OVR_SET(x) (((x) << 29) & 0x20000000)
2166 #define PHY_ANALOG_RXTX3_SPURON_MSB 30
2167 #define PHY_ANALOG_RXTX3_SPURON_LSB 30
2168 #define PHY_ANALOG_RXTX3_SPURON_MASK 0x40000000
2169 #define PHY_ANALOG_RXTX3_SPURON_GET(x) (((x) & 0x40000000) >> 30)
2170 #define PHY_ANALOG_RXTX3_SPURON_SET(x) (((x) << 30) & 0x40000000)
2171 #define PHY_ANALOG_RXTX3_SPURON_OVR_MSB 31
2172 #define PHY_ANALOG_RXTX3_SPURON_OVR_LSB 31
2173 #define PHY_ANALOG_RXTX3_SPURON_OVR_MASK 0x80000000
2174 #define PHY_ANALOG_RXTX3_SPURON_OVR_GET(x) (((x) & 0x80000000) >> 31)
2175 #define PHY_ANALOG_RXTX3_SPURON_OVR_SET(x) (((x) << 31) & 0x80000000)
2176
2177 /* macros for BB1 */
2178 #define PHY_ANALOG_BB1_ADDRESS 0x00000140
2179 #define PHY_ANALOG_BB1_OFFSET 0x00000140
2180 #define PHY_ANALOG_BB1_I2V_CURR2X_MSB 0
2181 #define PHY_ANALOG_BB1_I2V_CURR2X_LSB 0
2182 #define PHY_ANALOG_BB1_I2V_CURR2X_MASK 0x00000001
2183 #define PHY_ANALOG_BB1_I2V_CURR2X_GET(x) (((x) & 0x00000001) >> 0)
2184 #define PHY_ANALOG_BB1_I2V_CURR2X_SET(x) (((x) << 0) & 0x00000001)
2185 #define PHY_ANALOG_BB1_ENABLE_LOQ_MSB 1
2186 #define PHY_ANALOG_BB1_ENABLE_LOQ_LSB 1
2187 #define PHY_ANALOG_BB1_ENABLE_LOQ_MASK 0x00000002
2188 #define PHY_ANALOG_BB1_ENABLE_LOQ_GET(x) (((x) & 0x00000002) >> 1)
2189 #define PHY_ANALOG_BB1_ENABLE_LOQ_SET(x) (((x) << 1) & 0x00000002)
2190 #define PHY_ANALOG_BB1_FORCE_LOQ_MSB 2
2191 #define PHY_ANALOG_BB1_FORCE_LOQ_LSB 2
2192 #define PHY_ANALOG_BB1_FORCE_LOQ_MASK 0x00000004
2193 #define PHY_ANALOG_BB1_FORCE_LOQ_GET(x) (((x) & 0x00000004) >> 2)
2194 #define PHY_ANALOG_BB1_FORCE_LOQ_SET(x) (((x) << 2) & 0x00000004)
2195 #define PHY_ANALOG_BB1_ENABLE_NOTCH_MSB 3
2196 #define PHY_ANALOG_BB1_ENABLE_NOTCH_LSB 3
2197 #define PHY_ANALOG_BB1_ENABLE_NOTCH_MASK 0x00000008
2198 #define PHY_ANALOG_BB1_ENABLE_NOTCH_GET(x) (((x) & 0x00000008) >> 3)
2199 #define PHY_ANALOG_BB1_ENABLE_NOTCH_SET(x) (((x) << 3) & 0x00000008)
2200 #define PHY_ANALOG_BB1_FORCE_NOTCH_MSB 4
2201 #define PHY_ANALOG_BB1_FORCE_NOTCH_LSB 4
2202 #define PHY_ANALOG_BB1_FORCE_NOTCH_MASK 0x00000010
2203 #define PHY_ANALOG_BB1_FORCE_NOTCH_GET(x) (((x) & 0x00000010) >> 4)
2204 #define PHY_ANALOG_BB1_FORCE_NOTCH_SET(x) (((x) << 4) & 0x00000010)
2205 #define PHY_ANALOG_BB1_ENABLE_BIQUAD_MSB 5
2206 #define PHY_ANALOG_BB1_ENABLE_BIQUAD_LSB 5
2207 #define PHY_ANALOG_BB1_ENABLE_BIQUAD_MASK 0x00000020
2208 #define PHY_ANALOG_BB1_ENABLE_BIQUAD_GET(x) (((x) & 0x00000020) >> 5)
2209 #define PHY_ANALOG_BB1_ENABLE_BIQUAD_SET(x) (((x) << 5) & 0x00000020)
2210 #define PHY_ANALOG_BB1_FORCE_BIQUAD_MSB 6
2211 #define PHY_ANALOG_BB1_FORCE_BIQUAD_LSB 6
2212 #define PHY_ANALOG_BB1_FORCE_BIQUAD_MASK 0x00000040
2213 #define PHY_ANALOG_BB1_FORCE_BIQUAD_GET(x) (((x) & 0x00000040) >> 6)
2214 #define PHY_ANALOG_BB1_FORCE_BIQUAD_SET(x) (((x) << 6) & 0x00000040)
2215 #define PHY_ANALOG_BB1_ENABLE_OSDAC_MSB 7
2216 #define PHY_ANALOG_BB1_ENABLE_OSDAC_LSB 7
2217 #define PHY_ANALOG_BB1_ENABLE_OSDAC_MASK 0x00000080
2218 #define PHY_ANALOG_BB1_ENABLE_OSDAC_GET(x) (((x) & 0x00000080) >> 7)
2219 #define PHY_ANALOG_BB1_ENABLE_OSDAC_SET(x) (((x) << 7) & 0x00000080)
2220 #define PHY_ANALOG_BB1_FORCE_OSDAC_MSB 8
2221 #define PHY_ANALOG_BB1_FORCE_OSDAC_LSB 8
2222 #define PHY_ANALOG_BB1_FORCE_OSDAC_MASK 0x00000100
2223 #define PHY_ANALOG_BB1_FORCE_OSDAC_GET(x) (((x) & 0x00000100) >> 8)
2224 #define PHY_ANALOG_BB1_FORCE_OSDAC_SET(x) (((x) << 8) & 0x00000100)
2225 #define PHY_ANALOG_BB1_ENABLE_V2I_MSB 9
2226 #define PHY_ANALOG_BB1_ENABLE_V2I_LSB 9
2227 #define PHY_ANALOG_BB1_ENABLE_V2I_MASK 0x00000200
2228 #define PHY_ANALOG_BB1_ENABLE_V2I_GET(x) (((x) & 0x00000200) >> 9)
2229 #define PHY_ANALOG_BB1_ENABLE_V2I_SET(x) (((x) << 9) & 0x00000200)
2230 #define PHY_ANALOG_BB1_FORCE_V2I_MSB 10
2231 #define PHY_ANALOG_BB1_FORCE_V2I_LSB 10
2232 #define PHY_ANALOG_BB1_FORCE_V2I_MASK 0x00000400
2233 #define PHY_ANALOG_BB1_FORCE_V2I_GET(x) (((x) & 0x00000400) >> 10)
2234 #define PHY_ANALOG_BB1_FORCE_V2I_SET(x) (((x) << 10) & 0x00000400)
2235 #define PHY_ANALOG_BB1_ENABLE_I2V_MSB 11
2236 #define PHY_ANALOG_BB1_ENABLE_I2V_LSB 11
2237 #define PHY_ANALOG_BB1_ENABLE_I2V_MASK 0x00000800
2238 #define PHY_ANALOG_BB1_ENABLE_I2V_GET(x) (((x) & 0x00000800) >> 11)
2239 #define PHY_ANALOG_BB1_ENABLE_I2V_SET(x) (((x) << 11) & 0x00000800)
2240 #define PHY_ANALOG_BB1_FORCE_I2V_MSB 12
2241 #define PHY_ANALOG_BB1_FORCE_I2V_LSB 12
2242 #define PHY_ANALOG_BB1_FORCE_I2V_MASK 0x00001000
2243 #define PHY_ANALOG_BB1_FORCE_I2V_GET(x) (((x) & 0x00001000) >> 12)
2244 #define PHY_ANALOG_BB1_FORCE_I2V_SET(x) (((x) << 12) & 0x00001000)
2245 #define PHY_ANALOG_BB1_CMSEL_MSB 15
2246 #define PHY_ANALOG_BB1_CMSEL_LSB 13
2247 #define PHY_ANALOG_BB1_CMSEL_MASK 0x0000e000
2248 #define PHY_ANALOG_BB1_CMSEL_GET(x) (((x) & 0x0000e000) >> 13)
2249 #define PHY_ANALOG_BB1_CMSEL_SET(x) (((x) << 13) & 0x0000e000)
2250 #define PHY_ANALOG_BB1_ATBSEL_MSB 17
2251 #define PHY_ANALOG_BB1_ATBSEL_LSB 16
2252 #define PHY_ANALOG_BB1_ATBSEL_MASK 0x00030000
2253 #define PHY_ANALOG_BB1_ATBSEL_GET(x) (((x) & 0x00030000) >> 16)
2254 #define PHY_ANALOG_BB1_ATBSEL_SET(x) (((x) << 16) & 0x00030000)
2255 #define PHY_ANALOG_BB1_PD_OSDAC_CALTX_CALPA_MSB 18
2256 #define PHY_ANALOG_BB1_PD_OSDAC_CALTX_CALPA_LSB 18
2257 #define PHY_ANALOG_BB1_PD_OSDAC_CALTX_CALPA_MASK 0x00040000
2258 #define PHY_ANALOG_BB1_PD_OSDAC_CALTX_CALPA_GET(x) (((x) & 0x00040000) >> 18)
2259 #define PHY_ANALOG_BB1_PD_OSDAC_CALTX_CALPA_SET(x) (((x) << 18) & 0x00040000)
2260 #define PHY_ANALOG_BB1_OFSTCORRI2VQ_MSB 23
2261 #define PHY_ANALOG_BB1_OFSTCORRI2VQ_LSB 19
2262 #define PHY_ANALOG_BB1_OFSTCORRI2VQ_MASK 0x00f80000
2263 #define PHY_ANALOG_BB1_OFSTCORRI2VQ_GET(x) (((x) & 0x00f80000) >> 19)
2264 #define PHY_ANALOG_BB1_OFSTCORRI2VQ_SET(x) (((x) << 19) & 0x00f80000)
2265 #define PHY_ANALOG_BB1_OFSTCORRI2VI_MSB 28
2266 #define PHY_ANALOG_BB1_OFSTCORRI2VI_LSB 24
2267 #define PHY_ANALOG_BB1_OFSTCORRI2VI_MASK 0x1f000000
2268 #define PHY_ANALOG_BB1_OFSTCORRI2VI_GET(x) (((x) & 0x1f000000) >> 24)
2269 #define PHY_ANALOG_BB1_OFSTCORRI2VI_SET(x) (((x) << 24) & 0x1f000000)
2270 #define PHY_ANALOG_BB1_LOCALOFFSET_MSB 29
2271 #define PHY_ANALOG_BB1_LOCALOFFSET_LSB 29
2272 #define PHY_ANALOG_BB1_LOCALOFFSET_MASK 0x20000000
2273 #define PHY_ANALOG_BB1_LOCALOFFSET_GET(x) (((x) & 0x20000000) >> 29)
2274 #define PHY_ANALOG_BB1_LOCALOFFSET_SET(x) (((x) << 29) & 0x20000000)
2275 #define PHY_ANALOG_BB1_RANGE_OSDAC_MSB 31
2276 #define PHY_ANALOG_BB1_RANGE_OSDAC_LSB 30
2277 #define PHY_ANALOG_BB1_RANGE_OSDAC_MASK 0xc0000000
2278 #define PHY_ANALOG_BB1_RANGE_OSDAC_GET(x) (((x) & 0xc0000000) >> 30)
2279 #define PHY_ANALOG_BB1_RANGE_OSDAC_SET(x) (((x) << 30) & 0xc0000000)
2280
2281 /* macros for BB2 */
2282 #define PHY_ANALOG_BB2_ADDRESS 0x00000144
2283 #define PHY_ANALOG_BB2_OFFSET 0x00000144
2284 #define PHY_ANALOG_BB2_SPARE_MSB 6
2285 #define PHY_ANALOG_BB2_SPARE_LSB 0
2286 #define PHY_ANALOG_BB2_SPARE_MASK 0x0000007f
2287 #define PHY_ANALOG_BB2_SPARE_GET(x) (((x) & 0x0000007f) >> 0)
2288 #define PHY_ANALOG_BB2_SPARE_SET(x) (((x) << 0) & 0x0000007f)
2289 #define PHY_ANALOG_BB2_SEL_TEST_MSB 9
2290 #define PHY_ANALOG_BB2_SEL_TEST_LSB 7
2291 #define PHY_ANALOG_BB2_SEL_TEST_MASK 0x00000380
2292 #define PHY_ANALOG_BB2_SEL_TEST_GET(x) (((x) & 0x00000380) >> 7)
2293 #define PHY_ANALOG_BB2_SEL_TEST_SET(x) (((x) << 7) & 0x00000380)
2294 #define PHY_ANALOG_BB2_SCFIR_CAP_MSB 14
2295 #define PHY_ANALOG_BB2_SCFIR_CAP_LSB 10
2296 #define PHY_ANALOG_BB2_SCFIR_CAP_MASK 0x00007c00
2297 #define PHY_ANALOG_BB2_SCFIR_CAP_GET(x) (((x) & 0x00007c00) >> 10)
2298 #define PHY_ANALOG_BB2_SCFIR_CAP_SET(x) (((x) << 10) & 0x00007c00)
2299 #define PHY_ANALOG_BB2_OVERRIDE_SCFIR_CAP_MSB 15
2300 #define PHY_ANALOG_BB2_OVERRIDE_SCFIR_CAP_LSB 15
2301 #define PHY_ANALOG_BB2_OVERRIDE_SCFIR_CAP_MASK 0x00008000
2302 #define PHY_ANALOG_BB2_OVERRIDE_SCFIR_CAP_GET(x) (((x) & 0x00008000) >> 15)
2303 #define PHY_ANALOG_BB2_OVERRIDE_SCFIR_CAP_SET(x) (((x) << 15) & 0x00008000)
2304 #define PHY_ANALOG_BB2_FNOTCH_MSB 19
2305 #define PHY_ANALOG_BB2_FNOTCH_LSB 16
2306 #define PHY_ANALOG_BB2_FNOTCH_MASK 0x000f0000
2307 #define PHY_ANALOG_BB2_FNOTCH_GET(x) (((x) & 0x000f0000) >> 16)
2308 #define PHY_ANALOG_BB2_FNOTCH_SET(x) (((x) << 16) & 0x000f0000)
2309 #define PHY_ANALOG_BB2_OVERRIDE_FNOTCH_MSB 20
2310 #define PHY_ANALOG_BB2_OVERRIDE_FNOTCH_LSB 20
2311 #define PHY_ANALOG_BB2_OVERRIDE_FNOTCH_MASK 0x00100000
2312 #define PHY_ANALOG_BB2_OVERRIDE_FNOTCH_GET(x) (((x) & 0x00100000) >> 20)
2313 #define PHY_ANALOG_BB2_OVERRIDE_FNOTCH_SET(x) (((x) << 20) & 0x00100000)
2314 #define PHY_ANALOG_BB2_FILTERFC_MSB 25
2315 #define PHY_ANALOG_BB2_FILTERFC_LSB 21
2316 #define PHY_ANALOG_BB2_FILTERFC_MASK 0x03e00000
2317 #define PHY_ANALOG_BB2_FILTERFC_GET(x) (((x) & 0x03e00000) >> 21)
2318 #define PHY_ANALOG_BB2_FILTERFC_SET(x) (((x) << 21) & 0x03e00000)
2319 #define PHY_ANALOG_BB2_OVERRIDE_FILTERFC_MSB 26
2320 #define PHY_ANALOG_BB2_OVERRIDE_FILTERFC_LSB 26
2321 #define PHY_ANALOG_BB2_OVERRIDE_FILTERFC_MASK 0x04000000
2322 #define PHY_ANALOG_BB2_OVERRIDE_FILTERFC_GET(x) (((x) & 0x04000000) >> 26)
2323 #define PHY_ANALOG_BB2_OVERRIDE_FILTERFC_SET(x) (((x) << 26) & 0x04000000)
2324 #define PHY_ANALOG_BB2_I2V2RXOUT_EN_MSB 27
2325 #define PHY_ANALOG_BB2_I2V2RXOUT_EN_LSB 27
2326 #define PHY_ANALOG_BB2_I2V2RXOUT_EN_MASK 0x08000000
2327 #define PHY_ANALOG_BB2_I2V2RXOUT_EN_GET(x) (((x) & 0x08000000) >> 27)
2328 #define PHY_ANALOG_BB2_I2V2RXOUT_EN_SET(x) (((x) << 27) & 0x08000000)
2329 #define PHY_ANALOG_BB2_BQ2RXOUT_EN_MSB 28
2330 #define PHY_ANALOG_BB2_BQ2RXOUT_EN_LSB 28
2331 #define PHY_ANALOG_BB2_BQ2RXOUT_EN_MASK 0x10000000
2332 #define PHY_ANALOG_BB2_BQ2RXOUT_EN_GET(x) (((x) & 0x10000000) >> 28)
2333 #define PHY_ANALOG_BB2_BQ2RXOUT_EN_SET(x) (((x) << 28) & 0x10000000)
2334 #define PHY_ANALOG_BB2_RXIN2I2V_EN_MSB 29
2335 #define PHY_ANALOG_BB2_RXIN2I2V_EN_LSB 29
2336 #define PHY_ANALOG_BB2_RXIN2I2V_EN_MASK 0x20000000
2337 #define PHY_ANALOG_BB2_RXIN2I2V_EN_GET(x) (((x) & 0x20000000) >> 29)
2338 #define PHY_ANALOG_BB2_RXIN2I2V_EN_SET(x) (((x) << 29) & 0x20000000)
2339 #define PHY_ANALOG_BB2_RXIN2BQ_EN_MSB 30
2340 #define PHY_ANALOG_BB2_RXIN2BQ_EN_LSB 30
2341 #define PHY_ANALOG_BB2_RXIN2BQ_EN_MASK 0x40000000
2342 #define PHY_ANALOG_BB2_RXIN2BQ_EN_GET(x) (((x) & 0x40000000) >> 30)
2343 #define PHY_ANALOG_BB2_RXIN2BQ_EN_SET(x) (((x) << 30) & 0x40000000)
2344 #define PHY_ANALOG_BB2_SWITCH_OVERRIDE_MSB 31
2345 #define PHY_ANALOG_BB2_SWITCH_OVERRIDE_LSB 31
2346 #define PHY_ANALOG_BB2_SWITCH_OVERRIDE_MASK 0x80000000
2347 #define PHY_ANALOG_BB2_SWITCH_OVERRIDE_GET(x) (((x) & 0x80000000) >> 31)
2348 #define PHY_ANALOG_BB2_SWITCH_OVERRIDE_SET(x) (((x) << 31) & 0x80000000)
2349
2350 /* macros for TOP1 */
2351 #define PHY_ANALOG_TOP1_ADDRESS 0x00000280
2352 #define PHY_ANALOG_TOP1_OFFSET 0x00000280
2353 #define PHY_ANALOG_TOP1_SEL_KVCO_MSB 1
2354 #define PHY_ANALOG_TOP1_SEL_KVCO_LSB 0
2355 #define PHY_ANALOG_TOP1_SEL_KVCO_MASK 0x00000003
2356 #define PHY_ANALOG_TOP1_SEL_KVCO_GET(x) (((x) & 0x00000003) >> 0)
2357 #define PHY_ANALOG_TOP1_SEL_KVCO_SET(x) (((x) << 0) & 0x00000003)
2358 #define PHY_ANALOG_TOP1_PLLATB_MSB 3
2359 #define PHY_ANALOG_TOP1_PLLATB_LSB 2
2360 #define PHY_ANALOG_TOP1_PLLATB_MASK 0x0000000c
2361 #define PHY_ANALOG_TOP1_PLLATB_GET(x) (((x) & 0x0000000c) >> 2)
2362 #define PHY_ANALOG_TOP1_PLLATB_SET(x) (((x) << 2) & 0x0000000c)
2363 #define PHY_ANALOG_TOP1_PLL_SVREG_MSB 4
2364 #define PHY_ANALOG_TOP1_PLL_SVREG_LSB 4
2365 #define PHY_ANALOG_TOP1_PLL_SVREG_MASK 0x00000010
2366 #define PHY_ANALOG_TOP1_PLL_SVREG_GET(x) (((x) & 0x00000010) >> 4)
2367 #define PHY_ANALOG_TOP1_PLL_SVREG_SET(x) (((x) << 4) & 0x00000010)
2368 #define PHY_ANALOG_TOP1_HI_FREQ_EN_MSB 5
2369 #define PHY_ANALOG_TOP1_HI_FREQ_EN_LSB 5
2370 #define PHY_ANALOG_TOP1_HI_FREQ_EN_MASK 0x00000020
2371 #define PHY_ANALOG_TOP1_HI_FREQ_EN_GET(x) (((x) & 0x00000020) >> 5)
2372 #define PHY_ANALOG_TOP1_HI_FREQ_EN_SET(x) (((x) << 5) & 0x00000020)
2373 #define PHY_ANALOG_TOP1_PWDPLL_MSB 6
2374 #define PHY_ANALOG_TOP1_PWDPLL_LSB 6
2375 #define PHY_ANALOG_TOP1_PWDPLL_MASK 0x00000040
2376 #define PHY_ANALOG_TOP1_PWDPLL_GET(x) (((x) & 0x00000040) >> 6)
2377 #define PHY_ANALOG_TOP1_PWDPLL_SET(x) (((x) << 6) & 0x00000040)
2378 #define PHY_ANALOG_TOP1_PWDEXTCLKBUF_MSB 7
2379 #define PHY_ANALOG_TOP1_PWDEXTCLKBUF_LSB 7
2380 #define PHY_ANALOG_TOP1_PWDEXTCLKBUF_MASK 0x00000080
2381 #define PHY_ANALOG_TOP1_PWDEXTCLKBUF_GET(x) (((x) & 0x00000080) >> 7)
2382 #define PHY_ANALOG_TOP1_PWDEXTCLKBUF_SET(x) (((x) << 7) & 0x00000080)
2383 #define PHY_ANALOG_TOP1_ADCPWD_PHASE_MSB 9
2384 #define PHY_ANALOG_TOP1_ADCPWD_PHASE_LSB 8
2385 #define PHY_ANALOG_TOP1_ADCPWD_PHASE_MASK 0x00000300
2386 #define PHY_ANALOG_TOP1_ADCPWD_PHASE_GET(x) (((x) & 0x00000300) >> 8)
2387 #define PHY_ANALOG_TOP1_ADCPWD_PHASE_SET(x) (((x) << 8) & 0x00000300)
2388 #define PHY_ANALOG_TOP1_ADCCLK_PHASE_MSB 11
2389 #define PHY_ANALOG_TOP1_ADCCLK_PHASE_LSB 10
2390 #define PHY_ANALOG_TOP1_ADCCLK_PHASE_MASK 0x00000c00
2391 #define PHY_ANALOG_TOP1_ADCCLK_PHASE_GET(x) (((x) & 0x00000c00) >> 10)
2392 #define PHY_ANALOG_TOP1_ADCCLK_PHASE_SET(x) (((x) << 10) & 0x00000c00)
2393 #define PHY_ANALOG_TOP1_DAC_CLK_SEL_MSB 13
2394 #define PHY_ANALOG_TOP1_DAC_CLK_SEL_LSB 12
2395 #define PHY_ANALOG_TOP1_DAC_CLK_SEL_MASK 0x00003000
2396 #define PHY_ANALOG_TOP1_DAC_CLK_SEL_GET(x) (((x) & 0x00003000) >> 12)
2397 #define PHY_ANALOG_TOP1_DAC_CLK_SEL_SET(x) (((x) << 12) & 0x00003000)
2398 #define PHY_ANALOG_TOP1_ADC_CLK_SEL_MSB 15
2399 #define PHY_ANALOG_TOP1_ADC_CLK_SEL_LSB 14
2400 #define PHY_ANALOG_TOP1_ADC_CLK_SEL_MASK 0x0000c000
2401 #define PHY_ANALOG_TOP1_ADC_CLK_SEL_GET(x) (((x) & 0x0000c000) >> 14)
2402 #define PHY_ANALOG_TOP1_ADC_CLK_SEL_SET(x) (((x) << 14) & 0x0000c000)
2403 #define PHY_ANALOG_TOP1_REFDIV_MSB 19
2404 #define PHY_ANALOG_TOP1_REFDIV_LSB 16
2405 #define PHY_ANALOG_TOP1_REFDIV_MASK 0x000f0000
2406 #define PHY_ANALOG_TOP1_REFDIV_GET(x) (((x) & 0x000f0000) >> 16)
2407 #define PHY_ANALOG_TOP1_REFDIV_SET(x) (((x) << 16) & 0x000f0000)
2408 #define PHY_ANALOG_TOP1_DIV_MSB 29
2409 #define PHY_ANALOG_TOP1_DIV_LSB 20
2410 #define PHY_ANALOG_TOP1_DIV_MASK 0x3ff00000
2411 #define PHY_ANALOG_TOP1_DIV_GET(x) (((x) & 0x3ff00000) >> 20)
2412 #define PHY_ANALOG_TOP1_DIV_SET(x) (((x) << 20) & 0x3ff00000)
2413 #define PHY_ANALOG_TOP1_PLLBYPASS_MSB 30
2414 #define PHY_ANALOG_TOP1_PLLBYPASS_LSB 30
2415 #define PHY_ANALOG_TOP1_PLLBYPASS_MASK 0x40000000
2416 #define PHY_ANALOG_TOP1_PLLBYPASS_GET(x) (((x) & 0x40000000) >> 30)
2417 #define PHY_ANALOG_TOP1_PLLBYPASS_SET(x) (((x) << 30) & 0x40000000)
2418 #define PHY_ANALOG_TOP1_CLKMOD_RSTB_MSB 31
2419 #define PHY_ANALOG_TOP1_CLKMOD_RSTB_LSB 31
2420 #define PHY_ANALOG_TOP1_CLKMOD_RSTB_MASK 0x80000000
2421 #define PHY_ANALOG_TOP1_CLKMOD_RSTB_GET(x) (((x) & 0x80000000) >> 31)
2422 #define PHY_ANALOG_TOP1_CLKMOD_RSTB_SET(x) (((x) << 31) & 0x80000000)
2423
2424 /* macros for TOP2 */
2425 #define PHY_ANALOG_TOP2_ADDRESS 0x00000284
2426 #define PHY_ANALOG_TOP2_OFFSET 0x00000284
2427 #define PHY_ANALOG_TOP2_PLL_LOWLEAK_MSB 0
2428 #define PHY_ANALOG_TOP2_PLL_LOWLEAK_LSB 0
2429 #define PHY_ANALOG_TOP2_PLL_LOWLEAK_MASK 0x00000001
2430 #define PHY_ANALOG_TOP2_PLL_LOWLEAK_GET(x) (((x) & 0x00000001) >> 0)
2431 #define PHY_ANALOG_TOP2_PLL_LOWLEAK_SET(x) (((x) << 0) & 0x00000001)
2432 #define PHY_ANALOG_TOP2_PLL_LEAK_MSB 4
2433 #define PHY_ANALOG_TOP2_PLL_LEAK_LSB 1
2434 #define PHY_ANALOG_TOP2_PLL_LEAK_MASK 0x0000001e
2435 #define PHY_ANALOG_TOP2_PLL_LEAK_GET(x) (((x) & 0x0000001e) >> 1)
2436 #define PHY_ANALOG_TOP2_PLL_LEAK_SET(x) (((x) << 1) & 0x0000001e)
2437 #define PHY_ANALOG_TOP2_PLLFRAC_MSB 19
2438 #define PHY_ANALOG_TOP2_PLLFRAC_LSB 5
2439 #define PHY_ANALOG_TOP2_PLLFRAC_MASK 0x000fffe0
2440 #define PHY_ANALOG_TOP2_PLLFRAC_GET(x) (((x) & 0x000fffe0) >> 5)
2441 #define PHY_ANALOG_TOP2_PLLFRAC_SET(x) (((x) << 5) & 0x000fffe0)
2442 #define PHY_ANALOG_TOP2_PWD_PLLSDM_MSB 20
2443 #define PHY_ANALOG_TOP2_PWD_PLLSDM_LSB 20
2444 #define PHY_ANALOG_TOP2_PWD_PLLSDM_MASK 0x00100000
2445 #define PHY_ANALOG_TOP2_PWD_PLLSDM_GET(x) (((x) & 0x00100000) >> 20)
2446 #define PHY_ANALOG_TOP2_PWD_PLLSDM_SET(x) (((x) << 20) & 0x00100000)
2447 #define PHY_ANALOG_TOP2_PLLICP_MSB 23
2448 #define PHY_ANALOG_TOP2_PLLICP_LSB 21
2449 #define PHY_ANALOG_TOP2_PLLICP_MASK 0x00e00000
2450 #define PHY_ANALOG_TOP2_PLLICP_GET(x) (((x) & 0x00e00000) >> 21)
2451 #define PHY_ANALOG_TOP2_PLLICP_SET(x) (((x) << 21) & 0x00e00000)
2452 #define PHY_ANALOG_TOP2_PLLFILTER_MSB 31
2453 #define PHY_ANALOG_TOP2_PLLFILTER_LSB 24
2454 #define PHY_ANALOG_TOP2_PLLFILTER_MASK 0xff000000
2455 #define PHY_ANALOG_TOP2_PLLFILTER_GET(x) (((x) & 0xff000000) >> 24)
2456 #define PHY_ANALOG_TOP2_PLLFILTER_SET(x) (((x) << 24) & 0xff000000)
2457
2458 /* macros for TOP3 */
2459 #define PHY_ANALOG_TOP3_ADDRESS 0x00000288
2460 #define PHY_ANALOG_TOP3_OFFSET 0x00000288
2461 #define PHY_ANALOG_TOP3_INT2GND_MSB 0
2462 #define PHY_ANALOG_TOP3_INT2GND_LSB 0
2463 #define PHY_ANALOG_TOP3_INT2GND_MASK 0x00000001
2464 #define PHY_ANALOG_TOP3_INT2GND_GET(x) (((x) & 0x00000001) >> 0)
2465 #define PHY_ANALOG_TOP3_INT2GND_SET(x) (((x) << 0) & 0x00000001)
2466 #define PHY_ANALOG_TOP3_PWDPALCLK_MSB 1
2467 #define PHY_ANALOG_TOP3_PWDPALCLK_LSB 1
2468 #define PHY_ANALOG_TOP3_PWDPALCLK_MASK 0x00000002
2469 #define PHY_ANALOG_TOP3_PWDPALCLK_GET(x) (((x) & 0x00000002) >> 1)
2470 #define PHY_ANALOG_TOP3_PWDPALCLK_SET(x) (((x) << 1) & 0x00000002)
2471 #define PHY_ANALOG_TOP3_PWDAGCCLK_MSB 2
2472 #define PHY_ANALOG_TOP3_PWDAGCCLK_LSB 2
2473 #define PHY_ANALOG_TOP3_PWDAGCCLK_MASK 0x00000004
2474 #define PHY_ANALOG_TOP3_PWDAGCCLK_GET(x) (((x) & 0x00000004) >> 2)
2475 #define PHY_ANALOG_TOP3_PWDAGCCLK_SET(x) (((x) << 2) & 0x00000004)
2476 #define PHY_ANALOG_TOP3_PWDV2I_MSB 3
2477 #define PHY_ANALOG_TOP3_PWDV2I_LSB 3
2478 #define PHY_ANALOG_TOP3_PWDV2I_MASK 0x00000008
2479 #define PHY_ANALOG_TOP3_PWDV2I_GET(x) (((x) & 0x00000008) >> 3)
2480 #define PHY_ANALOG_TOP3_PWDV2I_SET(x) (((x) << 3) & 0x00000008)
2481 #define PHY_ANALOG_TOP3_PWDBIAS_MSB 4
2482 #define PHY_ANALOG_TOP3_PWDBIAS_LSB 4
2483 #define PHY_ANALOG_TOP3_PWDBIAS_MASK 0x00000010
2484 #define PHY_ANALOG_TOP3_PWDBIAS_GET(x) (((x) & 0x00000010) >> 4)
2485 #define PHY_ANALOG_TOP3_PWDBIAS_SET(x) (((x) << 4) & 0x00000010)
2486 #define PHY_ANALOG_TOP3_PWDBG_MSB 5
2487 #define PHY_ANALOG_TOP3_PWDBG_LSB 5
2488 #define PHY_ANALOG_TOP3_PWDBG_MASK 0x00000020
2489 #define PHY_ANALOG_TOP3_PWDBG_GET(x) (((x) & 0x00000020) >> 5)
2490 #define PHY_ANALOG_TOP3_PWDBG_SET(x) (((x) << 5) & 0x00000020)
2491 #define PHY_ANALOG_TOP3_XTAL_SELVREG_MSB 6
2492 #define PHY_ANALOG_TOP3_XTAL_SELVREG_LSB 6
2493 #define PHY_ANALOG_TOP3_XTAL_SELVREG_MASK 0x00000040
2494 #define PHY_ANALOG_TOP3_XTAL_SELVREG_GET(x) (((x) & 0x00000040) >> 6)
2495 #define PHY_ANALOG_TOP3_XTAL_SELVREG_SET(x) (((x) << 6) & 0x00000040)
2496 #define PHY_ANALOG_TOP3_XTAL_PWDREG_MSB 7
2497 #define PHY_ANALOG_TOP3_XTAL_PWDREG_LSB 7
2498 #define PHY_ANALOG_TOP3_XTAL_PWDREG_MASK 0x00000080
2499 #define PHY_ANALOG_TOP3_XTAL_PWDREG_GET(x) (((x) & 0x00000080) >> 7)
2500 #define PHY_ANALOG_TOP3_XTAL_PWDREG_SET(x) (((x) << 7) & 0x00000080)
2501 #define PHY_ANALOG_TOP3_XTAL_PWDCLKIN_MSB 8
2502 #define PHY_ANALOG_TOP3_XTAL_PWDCLKIN_LSB 8
2503 #define PHY_ANALOG_TOP3_XTAL_PWDCLKIN_MASK 0x00000100
2504 #define PHY_ANALOG_TOP3_XTAL_PWDCLKIN_GET(x) (((x) & 0x00000100) >> 8)
2505 #define PHY_ANALOG_TOP3_XTAL_PWDCLKIN_SET(x) (((x) << 8) & 0x00000100)
2506 #define PHY_ANALOG_TOP3_XTAL_PWDCLKD_MSB 9
2507 #define PHY_ANALOG_TOP3_XTAL_PWDCLKD_LSB 9
2508 #define PHY_ANALOG_TOP3_XTAL_PWDCLKD_MASK 0x00000200
2509 #define PHY_ANALOG_TOP3_XTAL_PWDCLKD_GET(x) (((x) & 0x00000200) >> 9)
2510 #define PHY_ANALOG_TOP3_XTAL_PWDCLKD_SET(x) (((x) << 9) & 0x00000200)
2511 #define PHY_ANALOG_TOP3_XTAL_OSCON_MSB 10
2512 #define PHY_ANALOG_TOP3_XTAL_OSCON_LSB 10
2513 #define PHY_ANALOG_TOP3_XTAL_OSCON_MASK 0x00000400
2514 #define PHY_ANALOG_TOP3_XTAL_OSCON_GET(x) (((x) & 0x00000400) >> 10)
2515 #define PHY_ANALOG_TOP3_XTAL_OSCON_SET(x) (((x) << 10) & 0x00000400)
2516 #define PHY_ANALOG_TOP3_XTAL_NOTCXODET_MSB 11
2517 #define PHY_ANALOG_TOP3_XTAL_NOTCXODET_LSB 11
2518 #define PHY_ANALOG_TOP3_XTAL_NOTCXODET_MASK 0x00000800
2519 #define PHY_ANALOG_TOP3_XTAL_NOTCXODET_GET(x) (((x) & 0x00000800) >> 11)
2520 #define PHY_ANALOG_TOP3_XTAL_NOTCXODET_SET(x) (((x) << 11) & 0x00000800)
2521 #define PHY_ANALOG_TOP3_XTAL_LOCALBIAS_MSB 12
2522 #define PHY_ANALOG_TOP3_XTAL_LOCALBIAS_LSB 12
2523 #define PHY_ANALOG_TOP3_XTAL_LOCALBIAS_MASK 0x00001000
2524 #define PHY_ANALOG_TOP3_XTAL_LOCALBIAS_GET(x) (((x) & 0x00001000) >> 12)
2525 #define PHY_ANALOG_TOP3_XTAL_LOCALBIAS_SET(x) (((x) << 12) & 0x00001000)
2526 #define PHY_ANALOG_TOP3_XTAL_HIGHZ_MSB 13
2527 #define PHY_ANALOG_TOP3_XTAL_HIGHZ_LSB 13
2528 #define PHY_ANALOG_TOP3_XTAL_HIGHZ_MASK 0x00002000
2529 #define PHY_ANALOG_TOP3_XTAL_HIGHZ_GET(x) (((x) & 0x00002000) >> 13)
2530 #define PHY_ANALOG_TOP3_XTAL_HIGHZ_SET(x) (((x) << 13) & 0x00002000)
2531 #define PHY_ANALOG_TOP3_XTAL_DRVPNR_MSB 15
2532 #define PHY_ANALOG_TOP3_XTAL_DRVPNR_LSB 14
2533 #define PHY_ANALOG_TOP3_XTAL_DRVPNR_MASK 0x0000c000
2534 #define PHY_ANALOG_TOP3_XTAL_DRVPNR_GET(x) (((x) & 0x0000c000) >> 14)
2535 #define PHY_ANALOG_TOP3_XTAL_DRVPNR_SET(x) (((x) << 14) & 0x0000c000)
2536 #define PHY_ANALOG_TOP3_XTALCAPOUTDAC_MSB 22
2537 #define PHY_ANALOG_TOP3_XTALCAPOUTDAC_LSB 16
2538 #define PHY_ANALOG_TOP3_XTALCAPOUTDAC_MASK 0x007f0000
2539 #define PHY_ANALOG_TOP3_XTALCAPOUTDAC_GET(x) (((x) & 0x007f0000) >> 16)
2540 #define PHY_ANALOG_TOP3_XTALCAPOUTDAC_SET(x) (((x) << 16) & 0x007f0000)
2541 #define PHY_ANALOG_TOP3_XTAL_CAPINDAC_MSB 29
2542 #define PHY_ANALOG_TOP3_XTAL_CAPINDAC_LSB 23
2543 #define PHY_ANALOG_TOP3_XTAL_CAPINDAC_MASK 0x3f800000
2544 #define PHY_ANALOG_TOP3_XTAL_CAPINDAC_GET(x) (((x) & 0x3f800000) >> 23)
2545 #define PHY_ANALOG_TOP3_XTAL_CAPINDAC_SET(x) (((x) << 23) & 0x3f800000)
2546 #define PHY_ANALOG_TOP3_XTAL_BIAS2X_MSB 30
2547 #define PHY_ANALOG_TOP3_XTAL_BIAS2X_LSB 30
2548 #define PHY_ANALOG_TOP3_XTAL_BIAS2X_MASK 0x40000000
2549 #define PHY_ANALOG_TOP3_XTAL_BIAS2X_GET(x) (((x) & 0x40000000) >> 30)
2550 #define PHY_ANALOG_TOP3_XTAL_BIAS2X_SET(x) (((x) << 30) & 0x40000000)
2551 #define PHY_ANALOG_TOP3_TCXODET_MSB 31
2552 #define PHY_ANALOG_TOP3_TCXODET_LSB 31
2553 #define PHY_ANALOG_TOP3_TCXODET_MASK 0x80000000
2554 #define PHY_ANALOG_TOP3_TCXODET_GET(x) (((x) & 0x80000000) >> 31)
2555
2556 /* macros for TOP4 */
2557 #define PHY_ANALOG_TOP4_ADDRESS 0x0000028c
2558 #define PHY_ANALOG_TOP4_OFFSET 0x0000028c
2559 #define PHY_ANALOG_TOP4_SPARE4_MSB 19
2560 #define PHY_ANALOG_TOP4_SPARE4_LSB 0
2561 #define PHY_ANALOG_TOP4_SPARE4_MASK 0x000fffff
2562 #define PHY_ANALOG_TOP4_SPARE4_GET(x) (((x) & 0x000fffff) >> 0)
2563 #define PHY_ANALOG_TOP4_SPARE4_SET(x) (((x) << 0) & 0x000fffff)
2564 #define PHY_ANALOG_TOP4_SEL_TEMPSENSOR_MSB 20
2565 #define PHY_ANALOG_TOP4_SEL_TEMPSENSOR_LSB 20
2566 #define PHY_ANALOG_TOP4_SEL_TEMPSENSOR_MASK 0x00100000
2567 #define PHY_ANALOG_TOP4_SEL_TEMPSENSOR_GET(x) (((x) & 0x00100000) >> 20)
2568 #define PHY_ANALOG_TOP4_SEL_TEMPSENSOR_SET(x) (((x) << 20) & 0x00100000)
2569 #define PHY_ANALOG_TOP4_ADCPWD_OVR_MSB 21
2570 #define PHY_ANALOG_TOP4_ADCPWD_OVR_LSB 21
2571 #define PHY_ANALOG_TOP4_ADCPWD_OVR_MASK 0x00200000
2572 #define PHY_ANALOG_TOP4_ADCPWD_OVR_GET(x) (((x) & 0x00200000) >> 21)
2573 #define PHY_ANALOG_TOP4_ADCPWD_OVR_SET(x) (((x) << 21) & 0x00200000)
2574 #define PHY_ANALOG_TOP4_ADCPWD_INT_MSB 22
2575 #define PHY_ANALOG_TOP4_ADCPWD_INT_LSB 22
2576 #define PHY_ANALOG_TOP4_ADCPWD_INT_MASK 0x00400000
2577 #define PHY_ANALOG_TOP4_ADCPWD_INT_GET(x) (((x) & 0x00400000) >> 22)
2578 #define PHY_ANALOG_TOP4_ADCPWD_INT_SET(x) (((x) << 22) & 0x00400000)
2579 #define PHY_ANALOG_TOP4_TESTIQ_OFF_MSB 23
2580 #define PHY_ANALOG_TOP4_TESTIQ_OFF_LSB 23
2581 #define PHY_ANALOG_TOP4_TESTIQ_OFF_MASK 0x00800000
2582 #define PHY_ANALOG_TOP4_TESTIQ_OFF_GET(x) (((x) & 0x00800000) >> 23)
2583 #define PHY_ANALOG_TOP4_TESTIQ_OFF_SET(x) (((x) << 23) & 0x00800000)
2584 #define PHY_ANALOG_TOP4_TESTIQ_BUFEN_MSB 24
2585 #define PHY_ANALOG_TOP4_TESTIQ_BUFEN_LSB 24
2586 #define PHY_ANALOG_TOP4_TESTIQ_BUFEN_MASK 0x01000000
2587 #define PHY_ANALOG_TOP4_TESTIQ_BUFEN_GET(x) (((x) & 0x01000000) >> 24)
2588 #define PHY_ANALOG_TOP4_TESTIQ_BUFEN_SET(x) (((x) << 24) & 0x01000000)
2589 #define PHY_ANALOG_TOP4_PAL_LOCKEDEN_MSB 25
2590 #define PHY_ANALOG_TOP4_PAL_LOCKEDEN_LSB 25
2591 #define PHY_ANALOG_TOP4_PAL_LOCKEDEN_MASK 0x02000000
2592 #define PHY_ANALOG_TOP4_PAL_LOCKEDEN_GET(x) (((x) & 0x02000000) >> 25)
2593 #define PHY_ANALOG_TOP4_PAL_LOCKEDEN_SET(x) (((x) << 25) & 0x02000000)
2594 #define PHY_ANALOG_TOP4_SYNTHDIGOUTEN_MSB 26
2595 #define PHY_ANALOG_TOP4_SYNTHDIGOUTEN_LSB 26
2596 #define PHY_ANALOG_TOP4_SYNTHDIGOUTEN_MASK 0x04000000
2597 #define PHY_ANALOG_TOP4_SYNTHDIGOUTEN_GET(x) (((x) & 0x04000000) >> 26)
2598 #define PHY_ANALOG_TOP4_SYNTHDIGOUTEN_SET(x) (((x) << 26) & 0x04000000)
2599 #define PHY_ANALOG_TOP4_ENBTCLK_MSB 27
2600 #define PHY_ANALOG_TOP4_ENBTCLK_LSB 27
2601 #define PHY_ANALOG_TOP4_ENBTCLK_MASK 0x08000000
2602 #define PHY_ANALOG_TOP4_ENBTCLK_GET(x) (((x) & 0x08000000) >> 27)
2603 #define PHY_ANALOG_TOP4_ENBTCLK_SET(x) (((x) << 27) & 0x08000000)
2604 #define PHY_ANALOG_TOP4_PAD2GND_MSB 28
2605 #define PHY_ANALOG_TOP4_PAD2GND_LSB 28
2606 #define PHY_ANALOG_TOP4_PAD2GND_MASK 0x10000000
2607 #define PHY_ANALOG_TOP4_PAD2GND_GET(x) (((x) & 0x10000000) >> 28)
2608 #define PHY_ANALOG_TOP4_PAD2GND_SET(x) (((x) << 28) & 0x10000000)
2609 #define PHY_ANALOG_TOP4_INTH2PAD_MSB 29
2610 #define PHY_ANALOG_TOP4_INTH2PAD_LSB 29
2611 #define PHY_ANALOG_TOP4_INTH2PAD_MASK 0x20000000
2612 #define PHY_ANALOG_TOP4_INTH2PAD_GET(x) (((x) & 0x20000000) >> 29)
2613 #define PHY_ANALOG_TOP4_INTH2PAD_SET(x) (((x) << 29) & 0x20000000)
2614 #define PHY_ANALOG_TOP4_INTH2GND_MSB 30
2615 #define PHY_ANALOG_TOP4_INTH2GND_LSB 30
2616 #define PHY_ANALOG_TOP4_INTH2GND_MASK 0x40000000
2617 #define PHY_ANALOG_TOP4_INTH2GND_GET(x) (((x) & 0x40000000) >> 30)
2618 #define PHY_ANALOG_TOP4_INTH2GND_SET(x) (((x) << 30) & 0x40000000)
2619 #define PHY_ANALOG_TOP4_INT2PAD_MSB 31
2620 #define PHY_ANALOG_TOP4_INT2PAD_LSB 31
2621 #define PHY_ANALOG_TOP4_INT2PAD_MASK 0x80000000
2622 #define PHY_ANALOG_TOP4_INT2PAD_GET(x) (((x) & 0x80000000) >> 31)
2623 #define PHY_ANALOG_TOP4_INT2PAD_SET(x) (((x) << 31) & 0x80000000)
2624
2625 /* macros for rbist_cntrl */
2626 #define PHY_ANALOG_RBIST_CNTRL_ADDRESS 0x00000380
2627 #define PHY_ANALOG_RBIST_CNTRL_OFFSET 0x00000380
2628 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_DC_ENABLE_MSB 0
2629 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_DC_ENABLE_LSB 0
2630 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_DC_ENABLE_MASK 0x00000001
2631 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_DC_ENABLE_GET(x) (((x) & 0x00000001) >> 0)
2632 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_DC_ENABLE_SET(x) (((x) << 0) & 0x00000001)
2633 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_TONE0_ENABLE_MSB 1
2634 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_TONE0_ENABLE_LSB 1
2635 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_TONE0_ENABLE_MASK 0x00000002
2636 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_TONE0_ENABLE_GET(x) (((x) & 0x00000002) >> 1)
2637 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_TONE0_ENABLE_SET(x) (((x) << 1) & 0x00000002)
2638 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_TONE1_ENABLE_MSB 2
2639 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_TONE1_ENABLE_LSB 2
2640 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_TONE1_ENABLE_MASK 0x00000004
2641 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_TONE1_ENABLE_GET(x) (((x) & 0x00000004) >> 2)
2642 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_TONE1_ENABLE_SET(x) (((x) << 2) & 0x00000004)
2643 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_LFTONE0_ENABLE_MSB 3
2644 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_LFTONE0_ENABLE_LSB 3
2645 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_LFTONE0_ENABLE_MASK 0x00000008
2646 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_LFTONE0_ENABLE_GET(x) (((x) & 0x00000008) >> 3)
2647 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_LFTONE0_ENABLE_SET(x) (((x) << 3) & 0x00000008)
2648 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_LINRAMP_ENABLE_I_MSB 4
2649 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_LINRAMP_ENABLE_I_LSB 4
2650 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_LINRAMP_ENABLE_I_MASK 0x00000010
2651 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_LINRAMP_ENABLE_I_GET(x) (((x) & 0x00000010) >> 4)
2652 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_LINRAMP_ENABLE_I_SET(x) (((x) << 4) & 0x00000010)
2653 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_LINRAMP_ENABLE_Q_MSB 5
2654 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_LINRAMP_ENABLE_Q_LSB 5
2655 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_LINRAMP_ENABLE_Q_MASK 0x00000020
2656 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_LINRAMP_ENABLE_Q_GET(x) (((x) & 0x00000020) >> 5)
2657 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_LINRAMP_ENABLE_Q_SET(x) (((x) << 5) & 0x00000020)
2658 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_PRBS_ENABLE_I_MSB 6
2659 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_PRBS_ENABLE_I_LSB 6
2660 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_PRBS_ENABLE_I_MASK 0x00000040
2661 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_PRBS_ENABLE_I_GET(x) (((x) & 0x00000040) >> 6)
2662 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_PRBS_ENABLE_I_SET(x) (((x) << 6) & 0x00000040)
2663 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_PRBS_ENABLE_Q_MSB 7
2664 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_PRBS_ENABLE_Q_LSB 7
2665 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_PRBS_ENABLE_Q_MASK 0x00000080
2666 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_PRBS_ENABLE_Q_GET(x) (((x) & 0x00000080) >> 7)
2667 #define PHY_ANALOG_RBIST_CNTRL_ATE_TONEGEN_PRBS_ENABLE_Q_SET(x) (((x) << 7) & 0x00000080)
2668 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_DC_WRITE_TO_CANCEL_MSB 8
2669 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_DC_WRITE_TO_CANCEL_LSB 8
2670 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_DC_WRITE_TO_CANCEL_MASK 0x00000100
2671 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_DC_WRITE_TO_CANCEL_GET(x) (((x) & 0x00000100) >> 8)
2672 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_DC_WRITE_TO_CANCEL_SET(x) (((x) << 8) & 0x00000100)
2673 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_DC_ENABLE_MSB 9
2674 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_DC_ENABLE_LSB 9
2675 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_DC_ENABLE_MASK 0x00000200
2676 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_DC_ENABLE_GET(x) (((x) & 0x00000200) >> 9)
2677 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_DC_ENABLE_SET(x) (((x) << 9) & 0x00000200)
2678 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_CORR_ENABLE_MSB 10
2679 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_CORR_ENABLE_LSB 10
2680 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_CORR_ENABLE_MASK 0x00000400
2681 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_CORR_ENABLE_GET(x) (((x) & 0x00000400) >> 10)
2682 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_CORR_ENABLE_SET(x) (((x) << 10) & 0x00000400)
2683 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_POWER_ENABLE_MSB 11
2684 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_POWER_ENABLE_LSB 11
2685 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_POWER_ENABLE_MASK 0x00000800
2686 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_POWER_ENABLE_GET(x) (((x) & 0x00000800) >> 11)
2687 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_POWER_ENABLE_SET(x) (((x) << 11) & 0x00000800)
2688 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_IQ_ENABLE_MSB 12
2689 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_IQ_ENABLE_LSB 12
2690 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_IQ_ENABLE_MASK 0x00001000
2691 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_IQ_ENABLE_GET(x) (((x) & 0x00001000) >> 12)
2692 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_IQ_ENABLE_SET(x) (((x) << 12) & 0x00001000)
2693 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_I2Q2_ENABLE_MSB 13
2694 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_I2Q2_ENABLE_LSB 13
2695 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_I2Q2_ENABLE_MASK 0x00002000
2696 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_I2Q2_ENABLE_GET(x) (((x) & 0x00002000) >> 13)
2697 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_I2Q2_ENABLE_SET(x) (((x) << 13) & 0x00002000)
2698 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_POWER_HPF_ENABLE_MSB 14
2699 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_POWER_HPF_ENABLE_LSB 14
2700 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_POWER_HPF_ENABLE_MASK 0x00004000
2701 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_POWER_HPF_ENABLE_GET(x) (((x) & 0x00004000) >> 14)
2702 #define PHY_ANALOG_RBIST_CNTRL_ATE_CMAC_POWER_HPF_ENABLE_SET(x) (((x) << 14) & 0x00004000)
2703 #define PHY_ANALOG_RBIST_CNTRL_ATE_RXDAC_CALIBRATE_MSB 15
2704 #define PHY_ANALOG_RBIST_CNTRL_ATE_RXDAC_CALIBRATE_LSB 15
2705 #define PHY_ANALOG_RBIST_CNTRL_ATE_RXDAC_CALIBRATE_MASK 0x00008000
2706 #define PHY_ANALOG_RBIST_CNTRL_ATE_RXDAC_CALIBRATE_GET(x) (((x) & 0x00008000) >> 15)
2707 #define PHY_ANALOG_RBIST_CNTRL_ATE_RXDAC_CALIBRATE_SET(x) (((x) << 15) & 0x00008000)
2708 #define PHY_ANALOG_RBIST_CNTRL_ATE_RBIST_ENABLE_MSB 16
2709 #define PHY_ANALOG_RBIST_CNTRL_ATE_RBIST_ENABLE_LSB 16
2710 #define PHY_ANALOG_RBIST_CNTRL_ATE_RBIST_ENABLE_MASK 0x00010000
2711 #define PHY_ANALOG_RBIST_CNTRL_ATE_RBIST_ENABLE_GET(x) (((x) & 0x00010000) >> 16)
2712 #define PHY_ANALOG_RBIST_CNTRL_ATE_RBIST_ENABLE_SET(x) (((x) << 16) & 0x00010000)
2713 #define PHY_ANALOG_RBIST_CNTRL_ATE_ADC_CLK_INVERT_MSB 17
2714 #define PHY_ANALOG_RBIST_CNTRL_ATE_ADC_CLK_INVERT_LSB 17
2715 #define PHY_ANALOG_RBIST_CNTRL_ATE_ADC_CLK_INVERT_MASK 0x00020000
2716 #define PHY_ANALOG_RBIST_CNTRL_ATE_ADC_CLK_INVERT_GET(x) (((x) & 0x00020000) >> 17)
2717 #define PHY_ANALOG_RBIST_CNTRL_ATE_ADC_CLK_INVERT_SET(x) (((x) << 17) & 0x00020000)
2718
2719 /* macros for tx_dc_offset */
2720 #define PHY_ANALOG_TX_DC_OFFSET_ADDRESS 0x00000384
2721 #define PHY_ANALOG_TX_DC_OFFSET_OFFSET 0x00000384
2722 #define PHY_ANALOG_TX_DC_OFFSET_ATE_TONEGEN_DC_I_MSB 10
2723 #define PHY_ANALOG_TX_DC_OFFSET_ATE_TONEGEN_DC_I_LSB 0
2724 #define PHY_ANALOG_TX_DC_OFFSET_ATE_TONEGEN_DC_I_MASK 0x000007ff
2725 #define PHY_ANALOG_TX_DC_OFFSET_ATE_TONEGEN_DC_I_GET(x) (((x) & 0x000007ff) >> 0)
2726 #define PHY_ANALOG_TX_DC_OFFSET_ATE_TONEGEN_DC_I_SET(x) (((x) << 0) & 0x000007ff)
2727 #define PHY_ANALOG_TX_DC_OFFSET_ATE_TONEGEN_DC_Q_MSB 26
2728 #define PHY_ANALOG_TX_DC_OFFSET_ATE_TONEGEN_DC_Q_LSB 16
2729 #define PHY_ANALOG_TX_DC_OFFSET_ATE_TONEGEN_DC_Q_MASK 0x07ff0000
2730 #define PHY_ANALOG_TX_DC_OFFSET_ATE_TONEGEN_DC_Q_GET(x) (((x) & 0x07ff0000) >> 16)
2731 #define PHY_ANALOG_TX_DC_OFFSET_ATE_TONEGEN_DC_Q_SET(x) (((x) << 16) & 0x07ff0000)
2732
2733 /* macros for tx_tonegen0 */
2734 #define PHY_ANALOG_TX_TONEGEN0_ADDRESS 0x00000388
2735 #define PHY_ANALOG_TX_TONEGEN0_OFFSET 0x00000388
2736 #define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_FREQ_MSB 6
2737 #define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_FREQ_LSB 0
2738 #define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_FREQ_MASK 0x0000007f
2739 #define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_FREQ_GET(x) (((x) & 0x0000007f) >> 0)
2740 #define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_FREQ_SET(x) (((x) << 0) & 0x0000007f)
2741 #define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_A_EXP_MSB 11
2742 #define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_A_EXP_LSB 8
2743 #define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_A_EXP_MASK 0x00000f00
2744 #define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_A_EXP_GET(x) (((x) & 0x00000f00) >> 8)
2745 #define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_A_EXP_SET(x) (((x) << 8) & 0x00000f00)
2746 #define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_A_MAN_MSB 23
2747 #define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_A_MAN_LSB 16
2748 #define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_A_MAN_MASK 0x00ff0000
2749 #define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_A_MAN_GET(x) (((x) & 0x00ff0000) >> 16)
2750 #define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_A_MAN_SET(x) (((x) << 16) & 0x00ff0000)
2751 #define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_TAU_K_MSB 30
2752 #define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_TAU_K_LSB 24
2753 #define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_TAU_K_MASK 0x7f000000
2754 #define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_TAU_K_GET(x) (((x) & 0x7f000000) >> 24)
2755 #define PHY_ANALOG_TX_TONEGEN0_ATE_TONEGEN_TONE_TAU_K_SET(x) (((x) << 24) & 0x7f000000)
2756
2757 /* macros for tx_tonegen1 */
2758 #define PHY_ANALOG_TX_TONEGEN1_ADDRESS 0x0000038c
2759 #define PHY_ANALOG_TX_TONEGEN1_OFFSET 0x0000038c
2760 #define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_FREQ_MSB 6
2761 #define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_FREQ_LSB 0
2762 #define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_FREQ_MASK 0x0000007f
2763 #define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_FREQ_GET(x) (((x) & 0x0000007f) >> 0)
2764 #define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_FREQ_SET(x) (((x) << 0) & 0x0000007f)
2765 #define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_A_EXP_MSB 11
2766 #define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_A_EXP_LSB 8
2767 #define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_A_EXP_MASK 0x00000f00
2768 #define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_A_EXP_GET(x) (((x) & 0x00000f00) >> 8)
2769 #define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_A_EXP_SET(x) (((x) << 8) & 0x00000f00)
2770 #define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_A_MAN_MSB 23
2771 #define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_A_MAN_LSB 16
2772 #define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_A_MAN_MASK 0x00ff0000
2773 #define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_A_MAN_GET(x) (((x) & 0x00ff0000) >> 16)
2774 #define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_A_MAN_SET(x) (((x) << 16) & 0x00ff0000)
2775 #define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_TAU_K_MSB 30
2776 #define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_TAU_K_LSB 24
2777 #define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_TAU_K_MASK 0x7f000000
2778 #define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_TAU_K_GET(x) (((x) & 0x7f000000) >> 24)
2779 #define PHY_ANALOG_TX_TONEGEN1_ATE_TONEGEN_TONE_TAU_K_SET(x) (((x) << 24) & 0x7f000000)
2780
2781 /* macros for tx_lftonegen0 */
2782 #define PHY_ANALOG_TX_LFTONEGEN0_ADDRESS 0x00000390
2783 #define PHY_ANALOG_TX_LFTONEGEN0_OFFSET 0x00000390
2784 #define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_FREQ_MSB 6
2785 #define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_FREQ_LSB 0
2786 #define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_FREQ_MASK 0x0000007f
2787 #define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_FREQ_GET(x) (((x) & 0x0000007f) >> 0)
2788 #define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_FREQ_SET(x) (((x) << 0) & 0x0000007f)
2789 #define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_A_EXP_MSB 11
2790 #define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_A_EXP_LSB 8
2791 #define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_A_EXP_MASK 0x00000f00
2792 #define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_A_EXP_GET(x) (((x) & 0x00000f00) >> 8)
2793 #define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_A_EXP_SET(x) (((x) << 8) & 0x00000f00)
2794 #define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_A_MAN_MSB 23
2795 #define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_A_MAN_LSB 16
2796 #define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_A_MAN_MASK 0x00ff0000
2797 #define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_A_MAN_GET(x) (((x) & 0x00ff0000) >> 16)
2798 #define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_A_MAN_SET(x) (((x) << 16) & 0x00ff0000)
2799 #define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_TAU_K_MSB 30
2800 #define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_TAU_K_LSB 24
2801 #define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_TAU_K_MASK 0x7f000000
2802 #define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_TAU_K_GET(x) (((x) & 0x7f000000) >> 24)
2803 #define PHY_ANALOG_TX_LFTONEGEN0_ATE_TONEGEN_TONE_TAU_K_SET(x) (((x) << 24) & 0x7f000000)
2804
2805 /* macros for tx_linear_ramp_i */
2806 #define PHY_ANALOG_TX_LINEAR_RAMP_I_ADDRESS 0x00000394
2807 #define PHY_ANALOG_TX_LINEAR_RAMP_I_OFFSET 0x00000394
2808 #define PHY_ANALOG_TX_LINEAR_RAMP_I_ATE_TONEGEN_LINRAMP_INIT_MSB 10
2809 #define PHY_ANALOG_TX_LINEAR_RAMP_I_ATE_TONEGEN_LINRAMP_INIT_LSB 0
2810 #define PHY_ANALOG_TX_LINEAR_RAMP_I_ATE_TONEGEN_LINRAMP_INIT_MASK 0x000007ff
2811 #define PHY_ANALOG_TX_LINEAR_RAMP_I_ATE_TONEGEN_LINRAMP_INIT_GET(x) (((x) & 0x000007ff) >> 0)
2812 #define PHY_ANALOG_TX_LINEAR_RAMP_I_ATE_TONEGEN_LINRAMP_INIT_SET(x) (((x) << 0) & 0x000007ff)
2813 #define PHY_ANALOG_TX_LINEAR_RAMP_I_ATE_TONEGEN_LINRAMP_DWELL_MSB 21
2814 #define PHY_ANALOG_TX_LINEAR_RAMP_I_ATE_TONEGEN_LINRAMP_DWELL_LSB 12
2815 #define PHY_ANALOG_TX_LINEAR_RAMP_I_ATE_TONEGEN_LINRAMP_DWELL_MASK 0x003ff000
2816 #define PHY_ANALOG_TX_LINEAR_RAMP_I_ATE_TONEGEN_LINRAMP_DWELL_GET(x) (((x) & 0x003ff000) >> 12)
2817 #define PHY_ANALOG_TX_LINEAR_RAMP_I_ATE_TONEGEN_LINRAMP_DWELL_SET(x) (((x) << 12) & 0x003ff000)
2818 #define PHY_ANALOG_TX_LINEAR_RAMP_I_ATE_TONEGEN_LINRAMP_STEP_MSB 29
2819 #define PHY_ANALOG_TX_LINEAR_RAMP_I_ATE_TONEGEN_LINRAMP_STEP_LSB 24
2820 #define PHY_ANALOG_TX_LINEAR_RAMP_I_ATE_TONEGEN_LINRAMP_STEP_MASK 0x3f000000
2821 #define PHY_ANALOG_TX_LINEAR_RAMP_I_ATE_TONEGEN_LINRAMP_STEP_GET(x) (((x) & 0x3f000000) >> 24)
2822 #define PHY_ANALOG_TX_LINEAR_RAMP_I_ATE_TONEGEN_LINRAMP_STEP_SET(x) (((x) << 24) & 0x3f000000)
2823
2824 /* macros for tx_linear_ramp_q */
2825 #define PHY_ANALOG_TX_LINEAR_RAMP_Q_ADDRESS 0x00000398
2826 #define PHY_ANALOG_TX_LINEAR_RAMP_Q_OFFSET 0x00000398
2827 #define PHY_ANALOG_TX_LINEAR_RAMP_Q_ATE_TONEGEN_LINRAMP_INIT_MSB 10
2828 #define PHY_ANALOG_TX_LINEAR_RAMP_Q_ATE_TONEGEN_LINRAMP_INIT_LSB 0
2829 #define PHY_ANALOG_TX_LINEAR_RAMP_Q_ATE_TONEGEN_LINRAMP_INIT_MASK 0x000007ff
2830 #define PHY_ANALOG_TX_LINEAR_RAMP_Q_ATE_TONEGEN_LINRAMP_INIT_GET(x) (((x) & 0x000007ff) >> 0)
2831 #define PHY_ANALOG_TX_LINEAR_RAMP_Q_ATE_TONEGEN_LINRAMP_INIT_SET(x) (((x) << 0) & 0x000007ff)
2832 #define PHY_ANALOG_TX_LINEAR_RAMP_Q_ATE_TONEGEN_LINRAMP_DWELL_MSB 21
2833 #define PHY_ANALOG_TX_LINEAR_RAMP_Q_ATE_TONEGEN_LINRAMP_DWELL_LSB 12
2834 #define PHY_ANALOG_TX_LINEAR_RAMP_Q_ATE_TONEGEN_LINRAMP_DWELL_MASK 0x003ff000
2835 #define PHY_ANALOG_TX_LINEAR_RAMP_Q_ATE_TONEGEN_LINRAMP_DWELL_GET(x) (((x) & 0x003ff000) >> 12)
2836 #define PHY_ANALOG_TX_LINEAR_RAMP_Q_ATE_TONEGEN_LINRAMP_DWELL_SET(x) (((x) << 12) & 0x003ff000)
2837 #define PHY_ANALOG_TX_LINEAR_RAMP_Q_ATE_TONEGEN_LINRAMP_STEP_MSB 29
2838 #define PHY_ANALOG_TX_LINEAR_RAMP_Q_ATE_TONEGEN_LINRAMP_STEP_LSB 24
2839 #define PHY_ANALOG_TX_LINEAR_RAMP_Q_ATE_TONEGEN_LINRAMP_STEP_MASK 0x3f000000
2840 #define PHY_ANALOG_TX_LINEAR_RAMP_Q_ATE_TONEGEN_LINRAMP_STEP_GET(x) (((x) & 0x3f000000) >> 24)
2841 #define PHY_ANALOG_TX_LINEAR_RAMP_Q_ATE_TONEGEN_LINRAMP_STEP_SET(x) (((x) << 24) & 0x3f000000)
2842
2843 /* macros for tx_prbs_mag */
2844 #define PHY_ANALOG_TX_PRBS_MAG_ADDRESS 0x0000039c
2845 #define PHY_ANALOG_TX_PRBS_MAG_OFFSET 0x0000039c
2846 #define PHY_ANALOG_TX_PRBS_MAG_ATE_TONEGEN_PRBS_MAGNITUDE_I_MSB 9
2847 #define PHY_ANALOG_TX_PRBS_MAG_ATE_TONEGEN_PRBS_MAGNITUDE_I_LSB 0
2848 #define PHY_ANALOG_TX_PRBS_MAG_ATE_TONEGEN_PRBS_MAGNITUDE_I_MASK 0x000003ff
2849 #define PHY_ANALOG_TX_PRBS_MAG_ATE_TONEGEN_PRBS_MAGNITUDE_I_GET(x) (((x) & 0x000003ff) >> 0)
2850 #define PHY_ANALOG_TX_PRBS_MAG_ATE_TONEGEN_PRBS_MAGNITUDE_I_SET(x) (((x) << 0) & 0x000003ff)
2851 #define PHY_ANALOG_TX_PRBS_MAG_ATE_TONEGEN_PRBS_MAGNITUDE_Q_MSB 25
2852 #define PHY_ANALOG_TX_PRBS_MAG_ATE_TONEGEN_PRBS_MAGNITUDE_Q_LSB 16
2853 #define PHY_ANALOG_TX_PRBS_MAG_ATE_TONEGEN_PRBS_MAGNITUDE_Q_MASK 0x03ff0000
2854 #define PHY_ANALOG_TX_PRBS_MAG_ATE_TONEGEN_PRBS_MAGNITUDE_Q_GET(x) (((x) & 0x03ff0000) >> 16)
2855 #define PHY_ANALOG_TX_PRBS_MAG_ATE_TONEGEN_PRBS_MAGNITUDE_Q_SET(x) (((x) << 16) & 0x03ff0000)
2856
2857 /* macros for tx_prbs_seed_i */
2858 #define PHY_ANALOG_TX_PRBS_SEED_I_ADDRESS 0x000003a0
2859 #define PHY_ANALOG_TX_PRBS_SEED_I_OFFSET 0x000003a0
2860 #define PHY_ANALOG_TX_PRBS_SEED_I_ATE_TONEGEN_PRBS_SEED_MSB 30
2861 #define PHY_ANALOG_TX_PRBS_SEED_I_ATE_TONEGEN_PRBS_SEED_LSB 0
2862 #define PHY_ANALOG_TX_PRBS_SEED_I_ATE_TONEGEN_PRBS_SEED_MASK 0x7fffffff
2863 #define PHY_ANALOG_TX_PRBS_SEED_I_ATE_TONEGEN_PRBS_SEED_GET(x) (((x) & 0x7fffffff) >> 0)
2864 #define PHY_ANALOG_TX_PRBS_SEED_I_ATE_TONEGEN_PRBS_SEED_SET(x) (((x) << 0) & 0x7fffffff)
2865
2866 /* macros for tx_prbs_seed_q */
2867 #define PHY_ANALOG_TX_PRBS_SEED_Q_ADDRESS 0x000003a4
2868 #define PHY_ANALOG_TX_PRBS_SEED_Q_OFFSET 0x000003a4
2869 #define PHY_ANALOG_TX_PRBS_SEED_Q_ATE_TONEGEN_PRBS_SEED_MSB 30
2870 #define PHY_ANALOG_TX_PRBS_SEED_Q_ATE_TONEGEN_PRBS_SEED_LSB 0
2871 #define PHY_ANALOG_TX_PRBS_SEED_Q_ATE_TONEGEN_PRBS_SEED_MASK 0x7fffffff
2872 #define PHY_ANALOG_TX_PRBS_SEED_Q_ATE_TONEGEN_PRBS_SEED_GET(x) (((x) & 0x7fffffff) >> 0)
2873 #define PHY_ANALOG_TX_PRBS_SEED_Q_ATE_TONEGEN_PRBS_SEED_SET(x) (((x) << 0) & 0x7fffffff)
2874
2875 /* macros for cmac_dc_cancel */
2876 #define PHY_ANALOG_CMAC_DC_CANCEL_ADDRESS 0x000003a8
2877 #define PHY_ANALOG_CMAC_DC_CANCEL_OFFSET 0x000003a8
2878 #define PHY_ANALOG_CMAC_DC_CANCEL_ATE_CMAC_DC_CANCEL_I_MSB 9
2879 #define PHY_ANALOG_CMAC_DC_CANCEL_ATE_CMAC_DC_CANCEL_I_LSB 0
2880 #define PHY_ANALOG_CMAC_DC_CANCEL_ATE_CMAC_DC_CANCEL_I_MASK 0x000003ff
2881 #define PHY_ANALOG_CMAC_DC_CANCEL_ATE_CMAC_DC_CANCEL_I_GET(x) (((x) & 0x000003ff) >> 0)
2882 #define PHY_ANALOG_CMAC_DC_CANCEL_ATE_CMAC_DC_CANCEL_I_SET(x) (((x) << 0) & 0x000003ff)
2883 #define PHY_ANALOG_CMAC_DC_CANCEL_ATE_CMAC_DC_CANCEL_Q_MSB 25
2884 #define PHY_ANALOG_CMAC_DC_CANCEL_ATE_CMAC_DC_CANCEL_Q_LSB 16
2885 #define PHY_ANALOG_CMAC_DC_CANCEL_ATE_CMAC_DC_CANCEL_Q_MASK 0x03ff0000
2886 #define PHY_ANALOG_CMAC_DC_CANCEL_ATE_CMAC_DC_CANCEL_Q_GET(x) (((x) & 0x03ff0000) >> 16)
2887 #define PHY_ANALOG_CMAC_DC_CANCEL_ATE_CMAC_DC_CANCEL_Q_SET(x) (((x) << 16) & 0x03ff0000)
2888
2889 /* macros for cmac_dc_offset */
2890 #define PHY_ANALOG_CMAC_DC_OFFSET_ADDRESS 0x000003ac
2891 #define PHY_ANALOG_CMAC_DC_OFFSET_OFFSET 0x000003ac
2892 #define PHY_ANALOG_CMAC_DC_OFFSET_ATE_CMAC_DC_CYCLES_MSB 3
2893 #define PHY_ANALOG_CMAC_DC_OFFSET_ATE_CMAC_DC_CYCLES_LSB 0
2894 #define PHY_ANALOG_CMAC_DC_OFFSET_ATE_CMAC_DC_CYCLES_MASK 0x0000000f
2895 #define PHY_ANALOG_CMAC_DC_OFFSET_ATE_CMAC_DC_CYCLES_GET(x) (((x) & 0x0000000f) >> 0)
2896 #define PHY_ANALOG_CMAC_DC_OFFSET_ATE_CMAC_DC_CYCLES_SET(x) (((x) << 0) & 0x0000000f)
2897
2898 /* macros for cmac_corr */
2899 #define PHY_ANALOG_CMAC_CORR_ADDRESS 0x000003b0
2900 #define PHY_ANALOG_CMAC_CORR_OFFSET 0x000003b0
2901 #define PHY_ANALOG_CMAC_CORR_ATE_CMAC_CORR_CYCLES_MSB 4
2902 #define PHY_ANALOG_CMAC_CORR_ATE_CMAC_CORR_CYCLES_LSB 0
2903 #define PHY_ANALOG_CMAC_CORR_ATE_CMAC_CORR_CYCLES_MASK 0x0000001f
2904 #define PHY_ANALOG_CMAC_CORR_ATE_CMAC_CORR_CYCLES_GET(x) (((x) & 0x0000001f) >> 0)
2905 #define PHY_ANALOG_CMAC_CORR_ATE_CMAC_CORR_CYCLES_SET(x) (((x) << 0) & 0x0000001f)
2906 #define PHY_ANALOG_CMAC_CORR_ATE_CMAC_CORR_FREQ_MSB 13
2907 #define PHY_ANALOG_CMAC_CORR_ATE_CMAC_CORR_FREQ_LSB 8
2908 #define PHY_ANALOG_CMAC_CORR_ATE_CMAC_CORR_FREQ_MASK 0x00003f00
2909 #define PHY_ANALOG_CMAC_CORR_ATE_CMAC_CORR_FREQ_GET(x) (((x) & 0x00003f00) >> 8)
2910 #define PHY_ANALOG_CMAC_CORR_ATE_CMAC_CORR_FREQ_SET(x) (((x) << 8) & 0x00003f00)
2911
2912 /* macros for cmac_power */
2913 #define PHY_ANALOG_CMAC_POWER_ADDRESS 0x000003b4
2914 #define PHY_ANALOG_CMAC_POWER_OFFSET 0x000003b4
2915 #define PHY_ANALOG_CMAC_POWER_ATE_CMAC_POWER_CYCLES_MSB 3
2916 #define PHY_ANALOG_CMAC_POWER_ATE_CMAC_POWER_CYCLES_LSB 0
2917 #define PHY_ANALOG_CMAC_POWER_ATE_CMAC_POWER_CYCLES_MASK 0x0000000f
2918 #define PHY_ANALOG_CMAC_POWER_ATE_CMAC_POWER_CYCLES_GET(x) (((x) & 0x0000000f) >> 0)
2919 #define PHY_ANALOG_CMAC_POWER_ATE_CMAC_POWER_CYCLES_SET(x) (((x) << 0) & 0x0000000f)
2920
2921 /* macros for cmac_cross_corr */
2922 #define PHY_ANALOG_CMAC_CROSS_CORR_ADDRESS 0x000003b8
2923 #define PHY_ANALOG_CMAC_CROSS_CORR_OFFSET 0x000003b8
2924 #define PHY_ANALOG_CMAC_CROSS_CORR_ATE_CMAC_IQ_CYCLES_MSB 3
2925 #define PHY_ANALOG_CMAC_CROSS_CORR_ATE_CMAC_IQ_CYCLES_LSB 0
2926 #define PHY_ANALOG_CMAC_CROSS_CORR_ATE_CMAC_IQ_CYCLES_MASK 0x0000000f
2927 #define PHY_ANALOG_CMAC_CROSS_CORR_ATE_CMAC_IQ_CYCLES_GET(x) (((x) & 0x0000000f) >> 0)
2928 #define PHY_ANALOG_CMAC_CROSS_CORR_ATE_CMAC_IQ_CYCLES_SET(x) (((x) << 0) & 0x0000000f)
2929
2930 /* macros for cmac_i2q2 */
2931 #define PHY_ANALOG_CMAC_I2Q2_ADDRESS 0x000003bc
2932 #define PHY_ANALOG_CMAC_I2Q2_OFFSET 0x000003bc
2933 #define PHY_ANALOG_CMAC_I2Q2_ATE_CMAC_I2Q2_CYCLES_MSB 3
2934 #define PHY_ANALOG_CMAC_I2Q2_ATE_CMAC_I2Q2_CYCLES_LSB 0
2935 #define PHY_ANALOG_CMAC_I2Q2_ATE_CMAC_I2Q2_CYCLES_MASK 0x0000000f
2936 #define PHY_ANALOG_CMAC_I2Q2_ATE_CMAC_I2Q2_CYCLES_GET(x) (((x) & 0x0000000f) >> 0)
2937 #define PHY_ANALOG_CMAC_I2Q2_ATE_CMAC_I2Q2_CYCLES_SET(x) (((x) << 0) & 0x0000000f)
2938
2939 /* macros for cmac_power_hpf */
2940 #define PHY_ANALOG_CMAC_POWER_HPF_ADDRESS 0x000003c0
2941 #define PHY_ANALOG_CMAC_POWER_HPF_OFFSET 0x000003c0
2942 #define PHY_ANALOG_CMAC_POWER_HPF_ATE_CMAC_POWER_HPF_CYCLES_MSB 3
2943 #define PHY_ANALOG_CMAC_POWER_HPF_ATE_CMAC_POWER_HPF_CYCLES_LSB 0
2944 #define PHY_ANALOG_CMAC_POWER_HPF_ATE_CMAC_POWER_HPF_CYCLES_MASK 0x0000000f
2945 #define PHY_ANALOG_CMAC_POWER_HPF_ATE_CMAC_POWER_HPF_CYCLES_GET(x) (((x) & 0x0000000f) >> 0)
2946 #define PHY_ANALOG_CMAC_POWER_HPF_ATE_CMAC_POWER_HPF_CYCLES_SET(x) (((x) << 0) & 0x0000000f)
2947 #define PHY_ANALOG_CMAC_POWER_HPF_ATE_CMAC_POWER_HPF_WAIT_MSB 7
2948 #define PHY_ANALOG_CMAC_POWER_HPF_ATE_CMAC_POWER_HPF_WAIT_LSB 4
2949 #define PHY_ANALOG_CMAC_POWER_HPF_ATE_CMAC_POWER_HPF_WAIT_MASK 0x000000f0
2950 #define PHY_ANALOG_CMAC_POWER_HPF_ATE_CMAC_POWER_HPF_WAIT_GET(x) (((x) & 0x000000f0) >> 4)
2951 #define PHY_ANALOG_CMAC_POWER_HPF_ATE_CMAC_POWER_HPF_WAIT_SET(x) (((x) << 4) & 0x000000f0)
2952
2953 /* macros for rxdac_set1 */
2954 #define PHY_ANALOG_RXDAC_SET1_ADDRESS 0x000003c4
2955 #define PHY_ANALOG_RXDAC_SET1_OFFSET 0x000003c4
2956 #define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_MUX_MSB 1
2957 #define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_MUX_LSB 0
2958 #define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_MUX_MASK 0x00000003
2959 #define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_MUX_GET(x) (((x) & 0x00000003) >> 0)
2960 #define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_MUX_SET(x) (((x) << 0) & 0x00000003)
2961 #define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_HI_GAIN_MSB 4
2962 #define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_HI_GAIN_LSB 4
2963 #define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_HI_GAIN_MASK 0x00000010
2964 #define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_HI_GAIN_GET(x) (((x) & 0x00000010) >> 4)
2965 #define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_HI_GAIN_SET(x) (((x) << 4) & 0x00000010)
2966 #define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_CAL_WAIT_MSB 13
2967 #define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_CAL_WAIT_LSB 8
2968 #define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_CAL_WAIT_MASK 0x00003f00
2969 #define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_CAL_WAIT_GET(x) (((x) & 0x00003f00) >> 8)
2970 #define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_CAL_WAIT_SET(x) (((x) << 8) & 0x00003f00)
2971 #define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_CAL_MEASURE_TIME_MSB 19
2972 #define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_CAL_MEASURE_TIME_LSB 16
2973 #define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_CAL_MEASURE_TIME_MASK 0x000f0000
2974 #define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_CAL_MEASURE_TIME_GET(x) (((x) & 0x000f0000) >> 16)
2975 #define PHY_ANALOG_RXDAC_SET1_ATE_RXDAC_CAL_MEASURE_TIME_SET(x) (((x) << 16) & 0x000f0000)
2976
2977 /* macros for rxdac_set2 */
2978 #define PHY_ANALOG_RXDAC_SET2_ADDRESS 0x000003c8
2979 #define PHY_ANALOG_RXDAC_SET2_OFFSET 0x000003c8
2980 #define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_I_HI_MSB 4
2981 #define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_I_HI_LSB 0
2982 #define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_I_HI_MASK 0x0000001f
2983 #define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_I_HI_GET(x) (((x) & 0x0000001f) >> 0)
2984 #define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_I_HI_SET(x) (((x) << 0) & 0x0000001f)
2985 #define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_Q_HI_MSB 12
2986 #define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_Q_HI_LSB 8
2987 #define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_Q_HI_MASK 0x00001f00
2988 #define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_Q_HI_GET(x) (((x) & 0x00001f00) >> 8)
2989 #define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_Q_HI_SET(x) (((x) << 8) & 0x00001f00)
2990 #define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_I_LOW_MSB 20
2991 #define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_I_LOW_LSB 16
2992 #define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_I_LOW_MASK 0x001f0000
2993 #define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_I_LOW_GET(x) (((x) & 0x001f0000) >> 16)
2994 #define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_I_LOW_SET(x) (((x) << 16) & 0x001f0000)
2995 #define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_Q_LOW_MSB 28
2996 #define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_Q_LOW_LSB 24
2997 #define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_Q_LOW_MASK 0x1f000000
2998 #define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_Q_LOW_GET(x) (((x) & 0x1f000000) >> 24)
2999 #define PHY_ANALOG_RXDAC_SET2_ATE_RXDAC_Q_LOW_SET(x) (((x) << 24) & 0x1f000000)
3000
3001 /* macros for rxdac_long_shift */
3002 #define PHY_ANALOG_RXDAC_LONG_SHIFT_ADDRESS 0x000003cc
3003 #define PHY_ANALOG_RXDAC_LONG_SHIFT_OFFSET 0x000003cc
3004 #define PHY_ANALOG_RXDAC_LONG_SHIFT_ATE_RXDAC_I_STATIC_MSB 4
3005 #define PHY_ANALOG_RXDAC_LONG_SHIFT_ATE_RXDAC_I_STATIC_LSB 0
3006 #define PHY_ANALOG_RXDAC_LONG_SHIFT_ATE_RXDAC_I_STATIC_MASK 0x0000001f
3007 #define PHY_ANALOG_RXDAC_LONG_SHIFT_ATE_RXDAC_I_STATIC_GET(x) (((x) & 0x0000001f) >> 0)
3008 #define PHY_ANALOG_RXDAC_LONG_SHIFT_ATE_RXDAC_I_STATIC_SET(x) (((x) << 0) & 0x0000001f)
3009 #define PHY_ANALOG_RXDAC_LONG_SHIFT_ATE_RXDAC_Q_STATIC_MSB 12
3010 #define PHY_ANALOG_RXDAC_LONG_SHIFT_ATE_RXDAC_Q_STATIC_LSB 8
3011 #define PHY_ANALOG_RXDAC_LONG_SHIFT_ATE_RXDAC_Q_STATIC_MASK 0x00001f00
3012 #define PHY_ANALOG_RXDAC_LONG_SHIFT_ATE_RXDAC_Q_STATIC_GET(x) (((x) & 0x00001f00) >> 8)
3013 #define PHY_ANALOG_RXDAC_LONG_SHIFT_ATE_RXDAC_Q_STATIC_SET(x) (((x) << 8) & 0x00001f00)
3014
3015 /* macros for cmac_results_i */
3016 #define PHY_ANALOG_CMAC_RESULTS_I_ADDRESS 0x000003d0
3017 #define PHY_ANALOG_CMAC_RESULTS_I_OFFSET 0x000003d0
3018 #define PHY_ANALOG_CMAC_RESULTS_I_ATE_CMAC_RESULTS_MSB 31
3019 #define PHY_ANALOG_CMAC_RESULTS_I_ATE_CMAC_RESULTS_LSB 0
3020 #define PHY_ANALOG_CMAC_RESULTS_I_ATE_CMAC_RESULTS_MASK 0xffffffff
3021 #define PHY_ANALOG_CMAC_RESULTS_I_ATE_CMAC_RESULTS_GET(x) (((x) & 0xffffffff) >> 0)
3022 #define PHY_ANALOG_CMAC_RESULTS_I_ATE_CMAC_RESULTS_SET(x) (((x) << 0) & 0xffffffff)
3023
3024 /* macros for cmac_results_q */
3025 #define PHY_ANALOG_CMAC_RESULTS_Q_ADDRESS 0x000003d4
3026 #define PHY_ANALOG_CMAC_RESULTS_Q_OFFSET 0x000003d4
3027 #define PHY_ANALOG_CMAC_RESULTS_Q_ATE_CMAC_RESULTS_MSB 31
3028 #define PHY_ANALOG_CMAC_RESULTS_Q_ATE_CMAC_RESULTS_LSB 0
3029 #define PHY_ANALOG_CMAC_RESULTS_Q_ATE_CMAC_RESULTS_MASK 0xffffffff
3030 #define PHY_ANALOG_CMAC_RESULTS_Q_ATE_CMAC_RESULTS_GET(x) (((x) & 0xffffffff) >> 0)
3031 #define PHY_ANALOG_CMAC_RESULTS_Q_ATE_CMAC_RESULTS_SET(x) (((x) << 0) & 0xffffffff)
3032
3033 /* macros for PMU1 */
3034 #define PHY_ANALOG_PMU1_ADDRESS 0x00000740
3035 #define PHY_ANALOG_PMU1_OFFSET 0x00000740
3036 #define PHY_ANALOG_PMU1_SPARE_MSB 10
3037 #define PHY_ANALOG_PMU1_SPARE_LSB 0
3038 #define PHY_ANALOG_PMU1_SPARE_MASK 0x000007ff
3039 #define PHY_ANALOG_PMU1_SPARE_GET(x) (((x) & 0x000007ff) >> 0)
3040 #define PHY_ANALOG_PMU1_SPARE_SET(x) (((x) << 0) & 0x000007ff)
3041 #define PHY_ANALOG_PMU1_OTP_V25_PWD_MSB 11
3042 #define PHY_ANALOG_PMU1_OTP_V25_PWD_LSB 11
3043 #define PHY_ANALOG_PMU1_OTP_V25_PWD_MASK 0x00000800
3044 #define PHY_ANALOG_PMU1_OTP_V25_PWD_GET(x) (((x) & 0x00000800) >> 11)
3045 #define PHY_ANALOG_PMU1_OTP_V25_PWD_SET(x) (((x) << 11) & 0x00000800)
3046 #define PHY_ANALOG_PMU1_PAREGON_MAN_MSB 12
3047 #define PHY_ANALOG_PMU1_PAREGON_MAN_LSB 12
3048 #define PHY_ANALOG_PMU1_PAREGON_MAN_MASK 0x00001000
3049 #define PHY_ANALOG_PMU1_PAREGON_MAN_GET(x) (((x) & 0x00001000) >> 12)
3050 #define PHY_ANALOG_PMU1_PAREGON_MAN_SET(x) (((x) << 12) & 0x00001000)
3051 #define PHY_ANALOG_PMU1_OTPREGON_MAN_MSB 13
3052 #define PHY_ANALOG_PMU1_OTPREGON_MAN_LSB 13
3053 #define PHY_ANALOG_PMU1_OTPREGON_MAN_MASK 0x00002000
3054 #define PHY_ANALOG_PMU1_OTPREGON_MAN_GET(x) (((x) & 0x00002000) >> 13)
3055 #define PHY_ANALOG_PMU1_OTPREGON_MAN_SET(x) (((x) << 13) & 0x00002000)
3056 #define PHY_ANALOG_PMU1_DREGON_MAN_MSB 14
3057 #define PHY_ANALOG_PMU1_DREGON_MAN_LSB 14
3058 #define PHY_ANALOG_PMU1_DREGON_MAN_MASK 0x00004000
3059 #define PHY_ANALOG_PMU1_DREGON_MAN_GET(x) (((x) & 0x00004000) >> 14)
3060 #define PHY_ANALOG_PMU1_DREGON_MAN_SET(x) (((x) << 14) & 0x00004000)
3061 #define PHY_ANALOG_PMU1_DISCONTMODEEN_MSB 15
3062 #define PHY_ANALOG_PMU1_DISCONTMODEEN_LSB 15
3063 #define PHY_ANALOG_PMU1_DISCONTMODEEN_MASK 0x00008000
3064 #define PHY_ANALOG_PMU1_DISCONTMODEEN_GET(x) (((x) & 0x00008000) >> 15)
3065 #define PHY_ANALOG_PMU1_DISCONTMODEEN_SET(x) (((x) << 15) & 0x00008000)
3066 #define PHY_ANALOG_PMU1_SWREGON_MAN_MSB 16
3067 #define PHY_ANALOG_PMU1_SWREGON_MAN_LSB 16
3068 #define PHY_ANALOG_PMU1_SWREGON_MAN_MASK 0x00010000
3069 #define PHY_ANALOG_PMU1_SWREGON_MAN_GET(x) (((x) & 0x00010000) >> 16)
3070 #define PHY_ANALOG_PMU1_SWREGON_MAN_SET(x) (((x) << 16) & 0x00010000)
3071 #define PHY_ANALOG_PMU1_SWREG_FREQCUR_MSB 18
3072 #define PHY_ANALOG_PMU1_SWREG_FREQCUR_LSB 17
3073 #define PHY_ANALOG_PMU1_SWREG_FREQCUR_MASK 0x00060000
3074 #define PHY_ANALOG_PMU1_SWREG_FREQCUR_GET(x) (((x) & 0x00060000) >> 17)
3075 #define PHY_ANALOG_PMU1_SWREG_FREQCUR_SET(x) (((x) << 17) & 0x00060000)
3076 #define PHY_ANALOG_PMU1_SWREG_FREQCAP_MSB 21
3077 #define PHY_ANALOG_PMU1_SWREG_FREQCAP_LSB 19
3078 #define PHY_ANALOG_PMU1_SWREG_FREQCAP_MASK 0x00380000
3079 #define PHY_ANALOG_PMU1_SWREG_FREQCAP_GET(x) (((x) & 0x00380000) >> 19)
3080 #define PHY_ANALOG_PMU1_SWREG_FREQCAP_SET(x) (((x) << 19) & 0x00380000)
3081 #define PHY_ANALOG_PMU1_SWREG_LVLCTR_MSB 23
3082 #define PHY_ANALOG_PMU1_SWREG_LVLCTR_LSB 22
3083 #define PHY_ANALOG_PMU1_SWREG_LVLCTR_MASK 0x00c00000
3084 #define PHY_ANALOG_PMU1_SWREG_LVLCTR_GET(x) (((x) & 0x00c00000) >> 22)
3085 #define PHY_ANALOG_PMU1_SWREG_LVLCTR_SET(x) (((x) << 22) & 0x00c00000)
3086 #define PHY_ANALOG_PMU1_SREG_LVLCTR_MSB 25
3087 #define PHY_ANALOG_PMU1_SREG_LVLCTR_LSB 24
3088 #define PHY_ANALOG_PMU1_SREG_LVLCTR_MASK 0x03000000
3089 #define PHY_ANALOG_PMU1_SREG_LVLCTR_GET(x) (((x) & 0x03000000) >> 24)
3090 #define PHY_ANALOG_PMU1_SREG_LVLCTR_SET(x) (((x) << 24) & 0x03000000)
3091 #define PHY_ANALOG_PMU1_DREG_LVLCTR_MSB 27
3092 #define PHY_ANALOG_PMU1_DREG_LVLCTR_LSB 26
3093 #define PHY_ANALOG_PMU1_DREG_LVLCTR_MASK 0x0c000000
3094 #define PHY_ANALOG_PMU1_DREG_LVLCTR_GET(x) (((x) & 0x0c000000) >> 26)
3095 #define PHY_ANALOG_PMU1_DREG_LVLCTR_SET(x) (((x) << 26) & 0x0c000000)
3096 #define PHY_ANALOG_PMU1_PAREG_XPNP_MSB 28
3097 #define PHY_ANALOG_PMU1_PAREG_XPNP_LSB 28
3098 #define PHY_ANALOG_PMU1_PAREG_XPNP_MASK 0x10000000
3099 #define PHY_ANALOG_PMU1_PAREG_XPNP_GET(x) (((x) & 0x10000000) >> 28)
3100 #define PHY_ANALOG_PMU1_PAREG_XPNP_SET(x) (((x) << 28) & 0x10000000)
3101 #define PHY_ANALOG_PMU1_PAREG_LVLCTR_MSB 31
3102 #define PHY_ANALOG_PMU1_PAREG_LVLCTR_LSB 29
3103 #define PHY_ANALOG_PMU1_PAREG_LVLCTR_MASK 0xe0000000
3104 #define PHY_ANALOG_PMU1_PAREG_LVLCTR_GET(x) (((x) & 0xe0000000) >> 29)
3105 #define PHY_ANALOG_PMU1_PAREG_LVLCTR_SET(x) (((x) << 29) & 0xe0000000)
3106
3107 /* macros for PMU2 */
3108 #define PHY_ANALOG_PMU2_ADDRESS 0x00000744
3109 #define PHY_ANALOG_PMU2_OFFSET 0x00000744
3110 #define PHY_ANALOG_PMU2_SPARE_MSB 7
3111 #define PHY_ANALOG_PMU2_SPARE_LSB 0
3112 #define PHY_ANALOG_PMU2_SPARE_MASK 0x000000ff
3113 #define PHY_ANALOG_PMU2_SPARE_GET(x) (((x) & 0x000000ff) >> 0)
3114 #define PHY_ANALOG_PMU2_SPARE_SET(x) (((x) << 0) & 0x000000ff)
3115 #define PHY_ANALOG_PMU2_VBATT_1_3TOATB_MSB 8
3116 #define PHY_ANALOG_PMU2_VBATT_1_3TOATB_LSB 8
3117 #define PHY_ANALOG_PMU2_VBATT_1_3TOATB_MASK 0x00000100
3118 #define PHY_ANALOG_PMU2_VBATT_1_3TOATB_GET(x) (((x) & 0x00000100) >> 8)
3119 #define PHY_ANALOG_PMU2_VBATT_1_3TOATB_SET(x) (((x) << 8) & 0x00000100)
3120 #define PHY_ANALOG_PMU2_VBATT_1_2TOATB_MSB 9
3121 #define PHY_ANALOG_PMU2_VBATT_1_2TOATB_LSB 9
3122 #define PHY_ANALOG_PMU2_VBATT_1_2TOATB_MASK 0x00000200
3123 #define PHY_ANALOG_PMU2_VBATT_1_2TOATB_GET(x) (((x) & 0x00000200) >> 9)
3124 #define PHY_ANALOG_PMU2_VBATT_1_2TOATB_SET(x) (((x) << 9) & 0x00000200)
3125 #define PHY_ANALOG_PMU2_VBATT_2_3TOATB_MSB 10
3126 #define PHY_ANALOG_PMU2_VBATT_2_3TOATB_LSB 10
3127 #define PHY_ANALOG_PMU2_VBATT_2_3TOATB_MASK 0x00000400
3128 #define PHY_ANALOG_PMU2_VBATT_2_3TOATB_GET(x) (((x) & 0x00000400) >> 10)
3129 #define PHY_ANALOG_PMU2_VBATT_2_3TOATB_SET(x) (((x) << 10) & 0x00000400)
3130 #define PHY_ANALOG_PMU2_PWD_BANDGAP_MAN_MSB 11
3131 #define PHY_ANALOG_PMU2_PWD_BANDGAP_MAN_LSB 11
3132 #define PHY_ANALOG_PMU2_PWD_BANDGAP_MAN_MASK 0x00000800
3133 #define PHY_ANALOG_PMU2_PWD_BANDGAP_MAN_GET(x) (((x) & 0x00000800) >> 11)
3134 #define PHY_ANALOG_PMU2_PWD_BANDGAP_MAN_SET(x) (((x) << 11) & 0x00000800)
3135 #define PHY_ANALOG_PMU2_PWD_LFO_MAN_MSB 12
3136 #define PHY_ANALOG_PMU2_PWD_LFO_MAN_LSB 12
3137 #define PHY_ANALOG_PMU2_PWD_LFO_MAN_MASK 0x00001000
3138 #define PHY_ANALOG_PMU2_PWD_LFO_MAN_GET(x) (((x) & 0x00001000) >> 12)
3139 #define PHY_ANALOG_PMU2_PWD_LFO_MAN_SET(x) (((x) << 12) & 0x00001000)
3140 #define PHY_ANALOG_PMU2_VBATT_LT_3P2_MSB 13
3141 #define PHY_ANALOG_PMU2_VBATT_LT_3P2_LSB 13
3142 #define PHY_ANALOG_PMU2_VBATT_LT_3P2_MASK 0x00002000
3143 #define PHY_ANALOG_PMU2_VBATT_LT_3P2_GET(x) (((x) & 0x00002000) >> 13)
3144 #define PHY_ANALOG_PMU2_VBATT_LT_3P2_SET(x) (((x) << 13) & 0x00002000)
3145 #define PHY_ANALOG_PMU2_VBATT_LT_2P8_MSB 14
3146 #define PHY_ANALOG_PMU2_VBATT_LT_2P8_LSB 14
3147 #define PHY_ANALOG_PMU2_VBATT_LT_2P8_MASK 0x00004000
3148 #define PHY_ANALOG_PMU2_VBATT_LT_2P8_GET(x) (((x) & 0x00004000) >> 14)
3149 #define PHY_ANALOG_PMU2_VBATT_LT_2P8_SET(x) (((x) << 14) & 0x00004000)
3150 #define PHY_ANALOG_PMU2_VBATT_GT_4P2_MSB 15
3151 #define PHY_ANALOG_PMU2_VBATT_GT_4P2_LSB 15
3152 #define PHY_ANALOG_PMU2_VBATT_GT_4P2_MASK 0x00008000
3153 #define PHY_ANALOG_PMU2_VBATT_GT_4P2_GET(x) (((x) & 0x00008000) >> 15)
3154 #define PHY_ANALOG_PMU2_VBATT_GT_4P2_SET(x) (((x) << 15) & 0x00008000)
3155 #define PHY_ANALOG_PMU2_PMU_MAN_OVERRIDE_EN_MSB 16
3156 #define PHY_ANALOG_PMU2_PMU_MAN_OVERRIDE_EN_LSB 16
3157 #define PHY_ANALOG_PMU2_PMU_MAN_OVERRIDE_EN_MASK 0x00010000
3158 #define PHY_ANALOG_PMU2_PMU_MAN_OVERRIDE_EN_GET(x) (((x) & 0x00010000) >> 16)
3159 #define PHY_ANALOG_PMU2_PMU_MAN_OVERRIDE_EN_SET(x) (((x) << 16) & 0x00010000)
3160 #define PHY_ANALOG_PMU2_VBATT_GT_LVLCTR_MSB 18
3161 #define PHY_ANALOG_PMU2_VBATT_GT_LVLCTR_LSB 17
3162 #define PHY_ANALOG_PMU2_VBATT_GT_LVLCTR_MASK 0x00060000
3163 #define PHY_ANALOG_PMU2_VBATT_GT_LVLCTR_GET(x) (((x) & 0x00060000) >> 17)
3164 #define PHY_ANALOG_PMU2_VBATT_GT_LVLCTR_SET(x) (((x) << 17) & 0x00060000)
3165 #define PHY_ANALOG_PMU2_SWREGVSSL2ATB_MSB 19
3166 #define PHY_ANALOG_PMU2_SWREGVSSL2ATB_LSB 19
3167 #define PHY_ANALOG_PMU2_SWREGVSSL2ATB_MASK 0x00080000
3168 #define PHY_ANALOG_PMU2_SWREGVSSL2ATB_GET(x) (((x) & 0x00080000) >> 19)
3169 #define PHY_ANALOG_PMU2_SWREGVSSL2ATB_SET(x) (((x) << 19) & 0x00080000)
3170 #define PHY_ANALOG_PMU2_SWREGVSSL_LVLCTR_MSB 21
3171 #define PHY_ANALOG_PMU2_SWREGVSSL_LVLCTR_LSB 20
3172 #define PHY_ANALOG_PMU2_SWREGVSSL_LVLCTR_MASK 0x00300000
3173 #define PHY_ANALOG_PMU2_SWREGVSSL_LVLCTR_GET(x) (((x) & 0x00300000) >> 20)
3174 #define PHY_ANALOG_PMU2_SWREGVSSL_LVLCTR_SET(x) (((x) << 20) & 0x00300000)
3175 #define PHY_ANALOG_PMU2_SWREGVDDH2ATB_MSB 22
3176 #define PHY_ANALOG_PMU2_SWREGVDDH2ATB_LSB 22
3177 #define PHY_ANALOG_PMU2_SWREGVDDH2ATB_MASK 0x00400000
3178 #define PHY_ANALOG_PMU2_SWREGVDDH2ATB_GET(x) (((x) & 0x00400000) >> 22)
3179 #define PHY_ANALOG_PMU2_SWREGVDDH2ATB_SET(x) (((x) << 22) & 0x00400000)
3180 #define PHY_ANALOG_PMU2_SWREGVDDH_LVLCTR_MSB 24
3181 #define PHY_ANALOG_PMU2_SWREGVDDH_LVLCTR_LSB 23
3182 #define PHY_ANALOG_PMU2_SWREGVDDH_LVLCTR_MASK 0x01800000
3183 #define PHY_ANALOG_PMU2_SWREGVDDH_LVLCTR_GET(x) (((x) & 0x01800000) >> 23)
3184 #define PHY_ANALOG_PMU2_SWREGVDDH_LVLCTR_SET(x) (((x) << 23) & 0x01800000)
3185 #define PHY_ANALOG_PMU2_SWREG2ATB_MSB 27
3186 #define PHY_ANALOG_PMU2_SWREG2ATB_LSB 25
3187 #define PHY_ANALOG_PMU2_SWREG2ATB_MASK 0x0e000000
3188 #define PHY_ANALOG_PMU2_SWREG2ATB_GET(x) (((x) & 0x0e000000) >> 25)
3189 #define PHY_ANALOG_PMU2_SWREG2ATB_SET(x) (((x) << 25) & 0x0e000000)
3190 #define PHY_ANALOG_PMU2_OTPREG2ATB_MSB 28
3191 #define PHY_ANALOG_PMU2_OTPREG2ATB_LSB 28
3192 #define PHY_ANALOG_PMU2_OTPREG2ATB_MASK 0x10000000
3193 #define PHY_ANALOG_PMU2_OTPREG2ATB_GET(x) (((x) & 0x10000000) >> 28)
3194 #define PHY_ANALOG_PMU2_OTPREG2ATB_SET(x) (((x) << 28) & 0x10000000)
3195 #define PHY_ANALOG_PMU2_OTPREG_LVLCTR_MSB 30
3196 #define PHY_ANALOG_PMU2_OTPREG_LVLCTR_LSB 29
3197 #define PHY_ANALOG_PMU2_OTPREG_LVLCTR_MASK 0x60000000
3198 #define PHY_ANALOG_PMU2_OTPREG_LVLCTR_GET(x) (((x) & 0x60000000) >> 29)
3199 #define PHY_ANALOG_PMU2_OTPREG_LVLCTR_SET(x) (((x) << 29) & 0x60000000)
3200 #define PHY_ANALOG_PMU2_DREG_LVLCTR_MANOVR_EN_MSB 31
3201 #define PHY_ANALOG_PMU2_DREG_LVLCTR_MANOVR_EN_LSB 31
3202 #define PHY_ANALOG_PMU2_DREG_LVLCTR_MANOVR_EN_MASK 0x80000000
3203 #define PHY_ANALOG_PMU2_DREG_LVLCTR_MANOVR_EN_GET(x) (((x) & 0x80000000) >> 31)
3204 #define PHY_ANALOG_PMU2_DREG_LVLCTR_MANOVR_EN_SET(x) (((x) << 31) & 0x80000000)
3205
3206
3207 #ifndef __ASSEMBLER__
3208
3209 typedef struct analog_intf_ares_reg_reg_s {
3210 volatile unsigned int RXRF_BIAS1; /* 0x0 - 0x4 */
3211 volatile unsigned int RXRF_BIAS2; /* 0x4 - 0x8 */
3212 volatile unsigned int RXRF_GAINSTAGES; /* 0x8 - 0xc */
3213 volatile unsigned int RXRF_AGC; /* 0xc - 0x10 */
3214 volatile char pad__0[0x30]; /* 0x10 - 0x40 */
3215 volatile unsigned int TXRF1; /* 0x40 - 0x44 */
3216 volatile unsigned int TXRF2; /* 0x44 - 0x48 */
3217 volatile unsigned int TXRF3; /* 0x48 - 0x4c */
3218 volatile unsigned int TXRF4; /* 0x4c - 0x50 */
3219 volatile unsigned int TXRF5; /* 0x50 - 0x54 */
3220 volatile unsigned int TXRF6; /* 0x54 - 0x58 */
3221 volatile unsigned int TXRF7; /* 0x58 - 0x5c */
3222 volatile unsigned int TXRF8; /* 0x5c - 0x60 */
3223 volatile unsigned int TXRF9; /* 0x60 - 0x64 */
3224 volatile unsigned int TXRF10; /* 0x64 - 0x68 */
3225 volatile unsigned int TXRF11; /* 0x68 - 0x6c */
3226 volatile unsigned int TXRF12; /* 0x6c - 0x70 */
3227 volatile char pad__1[0x10]; /* 0x70 - 0x80 */
3228 volatile unsigned int SYNTH1; /* 0x80 - 0x84 */
3229 volatile unsigned int SYNTH2; /* 0x84 - 0x88 */
3230 volatile unsigned int SYNTH3; /* 0x88 - 0x8c */
3231 volatile unsigned int SYNTH4; /* 0x8c - 0x90 */
3232 volatile unsigned int SYNTH5; /* 0x90 - 0x94 */
3233 volatile unsigned int SYNTH6; /* 0x94 - 0x98 */
3234 volatile unsigned int SYNTH7; /* 0x98 - 0x9c */
3235 volatile unsigned int SYNTH8; /* 0x9c - 0xa0 */
3236 volatile unsigned int SYNTH9; /* 0xa0 - 0xa4 */
3237 volatile unsigned int SYNTH10; /* 0xa4 - 0xa8 */
3238 volatile unsigned int SYNTH11; /* 0xa8 - 0xac */
3239 volatile unsigned int SYNTH12; /* 0xac - 0xb0 */
3240 volatile char pad__2[0x10]; /* 0xb0 - 0xc0 */
3241 volatile unsigned int BIAS1; /* 0xc0 - 0xc4 */
3242 volatile unsigned int BIAS2; /* 0xc4 - 0xc8 */
3243 volatile unsigned int BIAS3; /* 0xc8 - 0xcc */
3244 volatile unsigned int BIAS4; /* 0xcc - 0xd0 */
3245 volatile char pad__3[0x30]; /* 0xd0 - 0x100 */
3246 volatile unsigned int RXTX1; /* 0 x100 - 0x104 */
3247 volatile unsigned int RXTX2; /* 0 x104 - 0x108 */
3248 volatile unsigned int RXTX3; /* 0 x108 - 0x10c */
3249 volatile char pad__4[0x34]; /* 0 x10c - 0x140 */
3250 volatile unsigned int BB1; /* 0 x140 - 0x144 */
3251 volatile unsigned int BB2; /* 0 x144 - 0x148 */
3252 volatile char pad__5[0x138]; /* 0 x148 - 0x280 */
3253 volatile unsigned int TOP1; /* 0 x280 - 0x284 */
3254 volatile unsigned int TOP2; /* 0 x284 - 0x288 */
3255 volatile unsigned int TOP3; /* 0 x288 - 0x28c */
3256 volatile unsigned int TOP4; /* 0 x28c - 0x290 */
3257 volatile char pad__6[0xf0]; /* 0 x290 - 0x380 */
3258 volatile unsigned int rbist_cntrl; /* 0 x380 - 0x384 */
3259 volatile unsigned int tx_dc_offset; /* 0 x384 - 0x388 */
3260 volatile unsigned int tx_tonegen0; /* 0 x388 - 0x38c */
3261 volatile unsigned int tx_tonegen1; /* 0 x38c - 0x390 */
3262 volatile unsigned int tx_lftonegen0; /* 0 x390 - 0x394 */
3263 volatile unsigned int tx_linear_ramp_i; /* 0 x394 - 0x398 */
3264 volatile unsigned int tx_linear_ramp_q; /* 0 x398 - 0x39c */
3265 volatile unsigned int tx_prbs_mag; /* 0 x39c - 0x3a0 */
3266 volatile unsigned int tx_prbs_seed_i; /* 0 x3a0 - 0x3a4 */
3267 volatile unsigned int tx_prbs_seed_q; /* 0 x3a4 - 0x3a8 */
3268 volatile unsigned int cmac_dc_cancel; /* 0 x3a8 - 0x3ac */
3269 volatile unsigned int cmac_dc_offset; /* 0 x3ac - 0x3b0 */
3270 volatile unsigned int cmac_corr; /* 0 x3b0 - 0x3b4 */
3271 volatile unsigned int cmac_power; /* 0 x3b4 - 0x3b8 */
3272 volatile unsigned int cmac_cross_corr; /* 0 x3b8 - 0x3bc */
3273 volatile unsigned int cmac_i2q2; /* 0 x3bc - 0x3c0 */
3274 volatile unsigned int cmac_power_hpf; /* 0 x3c0 - 0x3c4 */
3275 volatile unsigned int rxdac_set1; /* 0 x3c4 - 0x3c8 */
3276 volatile unsigned int rxdac_set2; /* 0 x3c8 - 0x3cc */
3277 volatile unsigned int rxdac_long_shift; /* 0 x3cc - 0x3d0 */
3278 volatile unsigned int cmac_results_i; /* 0 x3d0 - 0x3d4 */
3279 volatile unsigned int cmac_results_q; /* 0 x3d4 - 0x3d8 */
3280 volatile char pad__7[0x368]; /* 0 x3d8 - 0x740 */
3281 volatile unsigned int PMU1; /* 0 x740 - 0x744 */
3282 volatile unsigned int PMU2; /* 0 x744 - 0x748 */
3283 } analog_intf_ares_reg_reg_t;
3284
3285 #endif /* __ASSEMBLER__ */
3286
3287 #endif /* _ANALOG_INTF_ARES_REG_REG_H_ */
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