| Index: src/trusted/validator_x86/testdata/64/ncdis_examples.vinternal
|
| diff --git a/src/trusted/validator_x86/testdata/64/ncdis_examples.vinternal b/src/trusted/validator_x86/testdata/64/ncdis_examples.vinternal
|
| deleted file mode 100644
|
| index 545cbfdd88ee16ee18849af2062228edc9a06566..0000000000000000000000000000000000000000
|
| --- a/src/trusted/validator_x86/testdata/64/ncdis_examples.vinternal
|
| +++ /dev/null
|
| @@ -1,3211 +0,0 @@
|
| -0000000000000000: 00 c0 add %al, %al
|
| - 00 386 OpcodeUsesModRm OpcodeLockable OperandSize_b
|
| - Add $Eb, $Gb
|
| - E_Operand OpUse OpSet
|
| - G_Operand OpUse
|
| -NaClExpVector[4] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %al, ExprSet | ExprUsed | ExprSize8 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %al, ExprUsed | ExprSize8 },
|
| -};
|
| -0000000000000000: 01 c0 add %eax, %eax
|
| - 01 386 OpcodeUsesModRm OpcodeLockable OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o
|
| - Add $Ev, $Gv
|
| - E_Operand OpUse OpSet OperandZeroExtends_v
|
| - G_Operand OpUse
|
| -NaClExpVector[4] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %eax, ExprSet | ExprUsed | ExprSize32 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %eax, ExprUsed | ExprSize32 },
|
| -};
|
| -0000000000000000: 41 01 c3 add %r11d, %eax
|
| - 01 386 OpcodeUsesModRm OpcodeLockable OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o
|
| - Add $Ev, $Gv
|
| - E_Operand OpUse OpSet OperandZeroExtends_v
|
| - G_Operand OpUse
|
| -NaClExpVector[4] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %r11d, ExprSet | ExprUsed | ExprSize32 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %eax, ExprUsed | ExprSize32 },
|
| -};
|
| -0000000000000000: 44 01 d8 add %eax, %r11d
|
| - 01 386 OpcodeUsesModRm OpcodeLockable OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o
|
| - Add $Ev, $Gv
|
| - E_Operand OpUse OpSet OperandZeroExtends_v
|
| - G_Operand OpUse
|
| -NaClExpVector[4] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %eax, ExprSet | ExprUsed | ExprSize32 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %r11d, ExprUsed | ExprSize32 },
|
| -};
|
| -0000000000000000: 48 01 c3 add %rbx, %rax
|
| - 01 386 OpcodeUsesModRm OpcodeLockable OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o
|
| - Add $Ev, $Gv
|
| - E_Operand OpUse OpSet OperandZeroExtends_v
|
| - G_Operand OpUse
|
| -NaClExpVector[4] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %rbx, ExprSet | ExprUsed | ExprSize64 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %rax, ExprUsed | ExprSize64 },
|
| -};
|
| -0000000000000000: 67 03 18 add %ebx, [%eax]
|
| - 03 386 OpcodeUsesModRm OpcodeLockable OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o
|
| - Add $Gv, $Ev
|
| - G_Operand OpUse OpSet OperandZeroExtends_v
|
| - E_Operand OpUse
|
| -NaClExpVector[8] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %ebx, ExprSet | ExprUsed | ExprSize32 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprUsed | ExprSize32 },
|
| - { ExprRegister[0] , %eax, ExprUsed | ExprSize32 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0, ExprSize8 },
|
| -};
|
| -0000000000000000: 02 04 00 add %al, [%rax+%rax*1]
|
| - 02 386 OpcodeUsesModRm OpcodeLockable OperandSize_b
|
| - Add $Gb, $Eb
|
| - G_Operand OpUse OpSet
|
| - E_Operand OpUse
|
| -NaClExpVector[8] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %al, ExprSet | ExprUsed | ExprSize8 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %rax, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %rax, ExprUsed | ExprSize64 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0, ExprSize8 },
|
| -};
|
| -0000000000000000: 67 02 04 00 add %al, [%eax+%eax*1]
|
| - 02 386 OpcodeUsesModRm OpcodeLockable OperandSize_b
|
| - Add $Gb, $Eb
|
| - G_Operand OpUse OpSet
|
| - E_Operand OpUse
|
| -NaClExpVector[8] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %al, ExprSet | ExprUsed | ExprSize8 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprUsed | ExprSize32 },
|
| - { ExprRegister[0] , %eax, ExprUsed | ExprSize32 },
|
| - { ExprRegister[0] , %eax, ExprUsed | ExprSize32 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0, ExprSize8 },
|
| -};
|
| -0000000000000000: 48 83 ec 08 sub %rsp, 0x8
|
| - 83 / 5 386 OpcodeInModRm OpcodeUsesModRm OpcodeHasImmed_b OpcodeLockable OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o
|
| - Sub $Ev, $Ib
|
| - E_Operand OpUse OpSet OperandZeroExtends_v
|
| - I_Operand OpUse
|
| -NaClExpVector[4] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %rsp, ExprSet | ExprUsed | ExprSize64 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprConstant[0] , 0x8, ExprUsed | ExprSize8 | ExprUnsignedHex },
|
| -};
|
| -00000000004003d4: e8 83 00 00 00 call 0x40045c
|
| - e8 386 OpcodeHasImmed_v OperandSize_v OperandSize_o OperandSizeDefaultIs64 JumpInstruction
|
| - Call {%rip}, {%rsp}, $Jzd
|
| - RegRIP OpUse OpSet OpImplicit
|
| - RegRSP OpUse OpSet OpImplicit
|
| - J_Operand OpUse OperandNear OperandRelative
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt | ExprImplicit },
|
| - { ExprRegister[0] , %rip, ExprSet | ExprUsed | ExprSize64 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt | ExprImplicit },
|
| - { ExprRegister[0] , %rsp, ExprSet | ExprUsed | ExprSize64 },
|
| - { OperandReference[1] , 2, ExprSize8 | ExprUnsignedInt },
|
| - { ExprConstant[0] , 0x40045c, ExprUsed | ExprSize32 | ExprSignedHex | ExprJumpTarget },
|
| -};
|
| -00000000004003de: e8 7d 05 00 00 call 0x400960
|
| - e8 386 OpcodeHasImmed_v OperandSize_v OperandSize_o OperandSizeDefaultIs64 JumpInstruction
|
| - Call {%rip}, {%rsp}, $Jzd
|
| - RegRIP OpUse OpSet OpImplicit
|
| - RegRSP OpUse OpSet OpImplicit
|
| - J_Operand OpUse OperandNear OperandRelative
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt | ExprImplicit },
|
| - { ExprRegister[0] , %rip, ExprSet | ExprUsed | ExprSize64 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt | ExprImplicit },
|
| - { ExprRegister[0] , %rsp, ExprSet | ExprUsed | ExprSize64 },
|
| - { OperandReference[1] , 2, ExprSize8 | ExprUnsignedInt },
|
| - { ExprConstant[0] , 0x400960, ExprUsed | ExprSize32 | ExprSignedHex | ExprJumpTarget },
|
| -};
|
| -0000000000000000: c3 [P] dontcare(illegal)
|
| - c3 386 NaClIllegal OperandSizeDefaultIs64 PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: ff 35 ea 0d 20 00 push [%rip+0x200dea]
|
| - ff / 6 386 OpcodeInModRm OpcodeUsesModRm OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o OperandSizeDefaultIs64
|
| - Push {%rsp}, $Ev
|
| - RegRSP OpUse OpSet OpImplicit
|
| - E_Operand OpUse
|
| -NaClExpVector[8] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt | ExprImplicit },
|
| - { ExprRegister[0] , %rsp, ExprSet | ExprUsed | ExprSize64 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %rip, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0x200dea, ExprSize32 | ExprSignedHex },
|
| -};
|
| -0000000000000000: ff 25 ec 0d 20 00 [P] dontcarejump %rip (s), [%rip+0x200dec] (u)
|
| - ff / 4 386 OpcodeInModRm OpcodeUsesModRm OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o OperandSizeDefaultIs64 JumpInstruction PartialInstruction
|
| - DontCareJump %rip, $Ev
|
| - RegRIP OpSet
|
| - E_Operand OpUse OperandNear
|
| -NaClExpVector[8] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %rip, ExprSet | ExprSize64 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprUsed | ExprSize64 | ExprJumpTarget },
|
| - { ExprRegister[0] , %rip, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0x200dec, ExprSize32 | ExprSignedHex },
|
| -};
|
| -0000000000000000: 0f 1f 40 00 [P] dontcare
|
| - [hard coded] 386 PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: 68 00 00 00 00 push 0x0
|
| - 68 386 OpcodeHasImmed_z OpcodeAllowsData16 OperandSizeDefaultIs64
|
| - Push {%rsp}, $Iz
|
| - RegRSP OpUse OpSet OpImplicit
|
| - I_Operand OpUse
|
| -NaClExpVector[4] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt | ExprImplicit },
|
| - { ExprRegister[0] , %rsp, ExprSet | ExprUsed | ExprSize64 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprConstant[0] , 0x0, ExprUsed | ExprSize32 | ExprUnsignedHex },
|
| -};
|
| -0000000000400403: e9 e0 ff ff ff [P] dontcarejump %rip (s), 0x4003e8 (u)
|
| - e9 386 OpcodeHasImmed_v OperandSize_v OperandSize_o OperandSizeDefaultIs64 JumpInstruction PartialInstruction
|
| - DontCareJump %rip, $Jzd
|
| - RegRIP OpSet
|
| - J_Operand OpUse OperandNear OperandRelative
|
| -NaClExpVector[4] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %rip, ExprSet | ExprSize64 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprConstant[0] , 0x4003e8, ExprUsed | ExprSize32 | ExprSignedHex | ExprJumpTarget },
|
| -};
|
| -0000000000000000: 49 89 d1 mov %r9, %rdx
|
| - 89 386 OpcodeUsesModRm OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o
|
| - Mov $Ev, $Gv
|
| - E_Operand OpSet OperandZeroExtends_v
|
| - G_Operand OpUse
|
| -NaClExpVector[4] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %r9, ExprSet | ExprSize64 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %rdx, ExprUsed | ExprSize64 },
|
| -};
|
| -0000000000000000: 5e pop %rsi
|
| - 5e - r6 386 OpcodePlusR OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o OperandSizeDefaultIs64
|
| - Pop {%rsp}, $r8v
|
| - RegRSP OpUse OpSet OpImplicit
|
| - G_OpcodeBase OpSet
|
| -NaClExpVector[4] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt | ExprImplicit },
|
| - { ExprRegister[0] , %rsp, ExprSet | ExprUsed | ExprSize64 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %rsi, ExprSet | ExprSize64 },
|
| -};
|
| -0000000000000000: 49 c7 c0 c0 08 40 00 mov %r8, 0x4008c0
|
| - c7 / 0 386 OpcodeInModRm OpcodeUsesModRm OpcodeHasImmed_z OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o
|
| - Mov $Ev, $Iz
|
| - E_Operand OpSet OperandZeroExtends_v
|
| - I_Operand OpUse
|
| -NaClExpVector[4] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %r8, ExprSet | ExprSize64 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprConstant[0] , 0x4008c0, ExprUsed | ExprSize32 | ExprUnsignedHex },
|
| -};
|
| -0000000000000000: f4 [P] dontcare
|
| - f4 386 PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: 48 8b 05 61 0d 20 00 mov %rax, [%rip+0x200d61]
|
| - 8b 386 OpcodeUsesModRm OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o
|
| - Mov $Gv, $Ev
|
| - G_Operand OpSet OperandZeroExtends_v
|
| - E_Operand OpUse
|
| -NaClExpVector[8] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %rax, ExprSet | ExprSize64 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %rip, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0x200d61, ExprSize32 | ExprSignedHex },
|
| -};
|
| -0000000000000000: 48 85 c0 [P] dontcare %rax (u), %rax (u)
|
| - 85 386 OpcodeUsesModRm OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o PartialInstruction
|
| - DontCare $Ev, $Gv
|
| - E_Operand OpUse
|
| - G_Operand OpUse
|
| -NaClExpVector[4] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %rax, ExprUsed | ExprSize64 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %rax, ExprUsed | ExprSize64 },
|
| -};
|
| -000000000040046a: 74 02 [P] dontcarecondjump %rip (s), 0x40046e (u)
|
| - 74 386 OpcodeHasImmed OperandSize_b ConditionalJump BranchHints PartialInstruction
|
| - DontCareCondJump %rip, $Jb
|
| - RegRIP OpSet
|
| - J_Operand OpUse OperandNear OperandRelative
|
| -NaClExpVector[4] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %rip, ExprSet | ExprSize64 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprConstant[0] , 0x40046e, ExprUsed | ExprSize8 | ExprSignedHex | ExprJumpTarget },
|
| -};
|
| -0000000000000000: ff d0 call %rax
|
| - ff / 2 386 OpcodeInModRm OpcodeUsesModRm OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o OperandSizeDefaultIs64 JumpInstruction
|
| - Call {%rip}, {%rsp}, $Ev
|
| - RegRIP OpUse OpSet OpImplicit
|
| - RegRSP OpUse OpSet OpImplicit
|
| - E_Operand OpUse OperandNear
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt | ExprImplicit },
|
| - { ExprRegister[0] , %rip, ExprSet | ExprUsed | ExprSize64 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt | ExprImplicit },
|
| - { ExprRegister[0] , %rsp, ExprSet | ExprUsed | ExprSize64 },
|
| - { OperandReference[1] , 2, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %rax, ExprUsed | ExprSize64 | ExprJumpTarget },
|
| -};
|
| -000000000040048d: eb 24 [P] dontcarejump %rip (s), 0x4004b3 (u)
|
| - eb 386 OpcodeHasImmed OperandSize_b JumpInstruction PartialInstruction
|
| - DontCareJump %rip, $Jb
|
| - RegRIP OpSet
|
| - J_Operand OpUse OperandNear OperandRelative
|
| -NaClExpVector[4] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %rip, ExprSet | ExprSize64 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprConstant[0] , 0x4004b3, ExprUsed | ExprSize8 | ExprSignedHex | ExprJumpTarget },
|
| -};
|
| -0000000000000000: c9 [P] dontcare(illegal)
|
| - c9 386 NaClIllegal OperandSizeDefaultIs64 PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: 66 66 2e 0f 1f 84 00 00 00 00 00 [P] dontcare
|
| - [hard coded] 386 PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: b8 00 00 00 00 mov %eax, 0x0
|
| - b8 - r0 386 OpcodeHasImmed OpcodePlusR OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o
|
| - Mov $r8v, $Iv
|
| - G_OpcodeBase OpSet OperandZeroExtends_v
|
| - I_Operand OpUse
|
| -NaClExpVector[4] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %eax, ExprSet | ExprSize32 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprConstant[0] , 0x0, ExprUsed | ExprSize32 | ExprUnsignedHex },
|
| -};
|
| -0000000000000000: bf 20 10 60 00 mov %edi, 0x601020
|
| - bf - r7 386 OpcodeHasImmed OpcodePlusR OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o
|
| - Mov $r8v, $Iv
|
| - G_OpcodeBase OpSet OperandZeroExtends_v
|
| - I_Operand OpUse
|
| -NaClExpVector[4] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %edi, ExprSet | ExprSize32 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprConstant[0] , 0x601020, ExprUsed | ExprSize32 | ExprUnsignedHex },
|
| -};
|
| -0000000000000000: 48 8b 04 c5 a0 13 60 00 mov %rax, [%rax*8+0x6013a0]
|
| - 8b 386 OpcodeUsesModRm OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o
|
| - Mov $Gv, $Ev
|
| - G_Operand OpSet OperandZeroExtends_v
|
| - E_Operand OpUse
|
| -NaClExpVector[8] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %rax, ExprSet | ExprSize64 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprRegister[0] , %rax, ExprUsed | ExprSize64 },
|
| - { ExprConstant[0] , 8, ExprSize8 },
|
| - { ExprConstant[0] , 0x6013a0, ExprSize32 | ExprSignedHex },
|
| -};
|
| -0000000000000000: 89 7d fc mov [%rbp-0x4], %edi
|
| - 89 386 OpcodeUsesModRm OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o
|
| - Mov $Ev, $Gv
|
| - E_Operand OpSet OperandZeroExtends_v
|
| - G_Operand OpUse
|
| -NaClExpVector[8] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprSet | ExprSize64 },
|
| - { ExprRegister[0] , %rbp, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , -0x4, ExprSize8 | ExprSignedHex },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %edi, ExprUsed | ExprSize32 },
|
| -};
|
| -0000000000000000: 3b 45 fc [P] dontcare %eax (u), [%rbp-0x4] (u)
|
| - 3b 386 OpcodeUsesModRm OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o PartialInstruction
|
| - DontCare $Gv, $Ev
|
| - G_Operand OpUse
|
| - E_Operand OpUse
|
| -NaClExpVector[8] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %eax, ExprUsed | ExprSize32 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %rbp, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , -0x4, ExprSize8 | ExprSignedHex },
|
| -};
|
| -0000000000000000: 83 7d f8 08 [P] dontcare [%rbp-0x8] (u), 0x8 (u)
|
| - 83 / 7 386 OpcodeInModRm OpcodeUsesModRm OpcodeHasImmed_b OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o PartialInstruction
|
| - DontCare $Ev, $Ib
|
| - E_Operand OpUse
|
| - I_Operand OpUse
|
| -NaClExpVector[8] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %rbp, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , -0x8, ExprSize8 | ExprSignedHex },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprConstant[0] , 0x8, ExprUsed | ExprSize8 | ExprUnsignedHex },
|
| -};
|
| -0000000000000000: 8b 45 fc mov %eax, [%rbp-0x4]
|
| - 8b 386 OpcodeUsesModRm OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o
|
| - Mov $Gv, $Ev
|
| - G_Operand OpSet OperandZeroExtends_v
|
| - E_Operand OpUse
|
| -NaClExpVector[8] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %eax, ExprSet | ExprSize32 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %rbp, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , -0x4, ExprSize8 | ExprSignedHex },
|
| -};
|
| -0000000000000000: 41 d3 e4 [P] dontcare %r12d (su), %cl (u)
|
| - d3 / 4 386 OpcodeInModRm OpcodeUsesModRm OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o PartialInstruction
|
| - DontCare $Ev, %cl
|
| - E_Operand OpUse OpSet
|
| - RegCL OpUse
|
| -NaClExpVector[4] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %r12d, ExprSet | ExprUsed | ExprSize32 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %cl, ExprUsed | ExprSize8 },
|
| -};
|
| -0000000000000000: 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 [P] dontcare
|
| - [hard coded] 386 PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: 48 c1 fd 03 [P] dontcare %rbp (su), 0x3 (u)
|
| - c1 / 7 386 OpcodeInModRm OpcodeUsesModRm OpcodeHasImmed_b OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o PartialInstruction
|
| - DontCare $Ev, $Ib
|
| - E_Operand OpUse OpSet
|
| - I_Operand OpUse
|
| -NaClExpVector[4] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %rbp, ExprSet | ExprUsed | ExprSize64 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprConstant[0] , 0x3, ExprUsed | ExprSize8 | ExprUnsignedHex },
|
| -};
|
| -0000000000000000: 48 8d 2d 0f 07 20 00 lea %rbp, [%rip+0x20070f]
|
| - 8d 386 ModRmModIsnt0x3 OpcodeUsesModRm OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o
|
| - Lea $Gv, $M
|
| - G_Operand OpSet OperandZeroExtends_v
|
| - M_Operand OpAddress
|
| -NaClExpVector[8] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %rbp, ExprSet | ExprSize64 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprAddress | ExprSize64 },
|
| - { ExprRegister[0] , %rip, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0x20070f, ExprSize32 | ExprSignedHex },
|
| -};
|
| -0000000000000000: a0 88 77 66 55 44 33 22 11 mov %al, [0x1122334455667788]
|
| - a0 386 OpcodeHasImmed_Addr OperandSize_b
|
| - Mov %al, $Ob
|
| - RegAL OpSet
|
| - O_Operand OpUse
|
| -NaClExpVector[8] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %al, ExprSet | ExprSize8 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0x1122334455667788, ExprSize64 | ExprUnsignedHex },
|
| -};
|
| -0000000000000000: 66 a1 88 77 66 55 44 33 22 11 mov %ax, [0x1122334455667788]
|
| - a1 386 OpcodeHasImmed_Addr OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o
|
| - Mov $rAXv, $Ov
|
| - RegREAX OpSet OperandZeroExtends_v
|
| - O_Operand OpUse
|
| -NaClExpVector[8] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %ax, ExprSet | ExprSize16 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0x1122334455667788, ExprSize64 | ExprUnsignedHex },
|
| -};
|
| -0000000000000000: a2 88 77 66 55 44 33 22 11 mov [0x1122334455667788], %al
|
| - a2 386 OpcodeHasImmed_Addr OperandSize_b
|
| - Mov $Ob, %al
|
| - O_Operand OpSet
|
| - RegAL OpUse
|
| -NaClExpVector[8] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprSet | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0x1122334455667788, ExprSize64 | ExprUnsignedHex },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %al, ExprUsed | ExprSize8 },
|
| -};
|
| -0000000000000000: 66 a3 88 77 66 55 44 33 22 11 mov [0x1122334455667788], %ax
|
| - a3 386 OpcodeHasImmed_Addr OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o
|
| - Mov $Ov, $rAXv
|
| - O_Operand OpSet OperandZeroExtends_v
|
| - RegREAX OpUse
|
| -NaClExpVector[8] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprSet | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0x1122334455667788, ExprSize64 | ExprUnsignedHex },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %ax, ExprUsed | ExprSize16 },
|
| -};
|
| -0000000000000000: 48 b8 88 77 66 55 44 33 22 11 mov %rax, 0x1122334455667788
|
| - b8 - r0 386 OpcodeHasImmed OpcodePlusR OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o
|
| - Mov $r8v, $Iv
|
| - G_OpcodeBase OpSet OperandZeroExtends_v
|
| - I_Operand OpUse
|
| -NaClExpVector[4] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %rax, ExprSet | ExprSize64 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprConstant[0] , 0x1122334455667788, ExprUsed | ExprSize64 | ExprUnsignedHex },
|
| -};
|
| -0000000000000000: 44 8a 04 00 mov %r8b, [%rax+%rax*1]
|
| - 8a 386 OpcodeUsesModRm OperandSize_b
|
| - Mov $Gb, $Eb
|
| - G_Operand OpSet
|
| - E_Operand OpUse
|
| -NaClExpVector[8] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %r8b, ExprSet | ExprSize8 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %rax, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %rax, ExprUsed | ExprSize64 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0, ExprSize8 },
|
| -};
|
| -0000000000000000: 8a 44 05 00 mov %al, [%rbp+%rax*1]
|
| - 8a 386 OpcodeUsesModRm OperandSize_b
|
| - Mov $Gb, $Eb
|
| - G_Operand OpSet
|
| - E_Operand OpUse
|
| -NaClExpVector[8] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %al, ExprSet | ExprSize8 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %rbp, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %rax, ExprUsed | ExprSize64 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0x0, ExprSize8 | ExprSignedHex },
|
| -};
|
| -0000000000000000: 42 8a 04 20 mov %al, [%rax+%r12*1]
|
| - 8a 386 OpcodeUsesModRm OperandSize_b
|
| - Mov $Gb, $Eb
|
| - G_Operand OpSet
|
| - E_Operand OpUse
|
| -NaClExpVector[8] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %al, ExprSet | ExprSize8 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %rax, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %r12, ExprUsed | ExprSize64 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0, ExprSize8 },
|
| -};
|
| -0000000000000000: 41 8a 44 05 00 mov %al, [%r13+%rax*1]
|
| - 8a 386 OpcodeUsesModRm OperandSize_b
|
| - Mov $Gb, $Eb
|
| - G_Operand OpSet
|
| - E_Operand OpUse
|
| -NaClExpVector[8] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %al, ExprSet | ExprSize8 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %r13, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %rax, ExprUsed | ExprSize64 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0x0, ExprSize8 | ExprSignedHex },
|
| -};
|
| -0000000000000000: 0f 38 08 2c 25 00 00 00 00 [P] dontcare [0x0] (u)
|
| - 0f 38 08 SSSE3 OpcodeUsesModRm PartialInstruction
|
| - DontCare $Qq
|
| - Mmx_E_Operand OpUse
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0x0, ExprSize32 | ExprSignedHex },
|
| -};
|
| -0000000000000000: 66 0f 38 08 2c 25 00 00 00 00 [P] dontcare [0x0] (u)
|
| - 66 0f 38 08 SSSE3 OpcodeUsesModRm OpcodeAllowsData16 SizeIgnoresData16 PartialInstruction
|
| - DontCare $Wdq
|
| - Xmm_E_Operand OpUse
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0x0, ExprSize32 | ExprSignedHex },
|
| -};
|
| -0000000000000000: 66 44 0f 38 08 2c 00 [P] dontcare [%rax+%rax*1] (u)
|
| - 66 0f 38 08 SSSE3 OpcodeUsesModRm OpcodeAllowsData16 SizeIgnoresData16 PartialInstruction
|
| - DontCare $Wdq
|
| - Xmm_E_Operand OpUse
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %rax, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %rax, ExprUsed | ExprSize64 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0, ExprSize8 },
|
| -};
|
| -0000000000000000: dd 24 00 [P] dontcare [%rax+%rax*1] (u)
|
| - dd / 4 X87 OpcodeInModRm ModRmModIsnt0x3 OpcodeUsesModRm PartialInstruction
|
| - DontCare $Mf
|
| - M_Operand OpUse
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %rax, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %rax, ExprUsed | ExprSize64 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0, ExprSize8 },
|
| -};
|
| -0000000000000000: 67 dd 24 00 [P] dontcare [%eax+%eax*1] (u)
|
| - dd / 4 X87 OpcodeInModRm ModRmModIsnt0x3 OpcodeUsesModRm PartialInstruction
|
| - DontCare $Mf
|
| - M_Operand OpUse
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprUsed | ExprSize32 },
|
| - { ExprRegister[0] , %eax, ExprUsed | ExprSize32 },
|
| - { ExprRegister[0] , %eax, ExprUsed | ExprSize32 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0, ExprSize8 },
|
| -};
|
| -0000000000000000: dc c1 [P] dontcare
|
| - dc c1 X87 PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: d8 74 24 10 [P] dontcare [%rsp+0x10] (u)
|
| - d8 / 6 X87 OpcodeInModRm ModRmModIsnt0x3 OpcodeUsesModRm PartialInstruction
|
| - DontCare $Md
|
| - Mv_Operand OpUse
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %rsp, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0x10, ExprSize8 | ExprSignedHex },
|
| -};
|
| -0000000000000000: 67 d8 74 24 10 [P] dontcare [%esp+0x10] (u)
|
| - d8 / 6 X87 OpcodeInModRm ModRmModIsnt0x3 OpcodeUsesModRm PartialInstruction
|
| - DontCare $Md
|
| - Mv_Operand OpUse
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprUsed | ExprSize32 },
|
| - { ExprRegister[0] , %esp, ExprUsed | ExprSize32 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0x10, ExprSize8 | ExprSignedHex },
|
| -};
|
| -0000000000000000: dc 44 00 04 [P] dontcare [%rax+%rax*1+0x4] (u)
|
| - dc / 0 X87 OpcodeInModRm ModRmModIsnt0x3 OpcodeUsesModRm PartialInstruction
|
| - DontCare $Mq
|
| - Mo_Operand OpUse
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %rax, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %rax, ExprUsed | ExprSize64 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0x4, ExprSize8 | ExprSignedHex },
|
| -};
|
| -0000000000000000: da 04 25 04 00 00 00 [P] dontcare [0x4] (u)
|
| - da / 0 X87 OpcodeInModRm ModRmModIsnt0x3 OpcodeUsesModRm PartialInstruction
|
| - DontCare $Md
|
| - Mv_Operand OpUse
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0x4, ExprSize32 | ExprSignedHex },
|
| -};
|
| -0000000000000000: da 70 04 [P] dontcare [%rax+0x4] (u)
|
| - da / 6 X87 OpcodeInModRm ModRmModIsnt0x3 OpcodeUsesModRm PartialInstruction
|
| - DontCare $Md
|
| - Mv_Operand OpUse
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %rax, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0x4, ExprSize8 | ExprSignedHex },
|
| -};
|
| -0000000000000000: de 50 04 [P] dontcare [%rax+0x4] (u)
|
| - de / 2 X87 OpcodeInModRm ModRmModIsnt0x3 OpcodeUsesModRm PartialInstruction
|
| - DontCare $Mw
|
| - Mw_Operand OpUse
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %rax, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0x4, ExprSize8 | ExprSignedHex },
|
| -};
|
| -0000000000000000: dc e5 [P] dontcare
|
| - dc e5 X87 PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: dc f3 [P] dontcare
|
| - dc f3 X87 PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: dc ea [P] dontcare
|
| - dc ea X87 PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: dc ce [P] dontcare
|
| - dc ce X87 PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: 48 63 c6 [P] dontcare %rax (sz), %esi (u)
|
| - 63 386 OpcodeUsesModRm OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o LongMode PartialInstruction
|
| - DontCare $Gv, $Ed
|
| - G_Operand OpSet OperandZeroExtends_v
|
| - Ev_Operand OpUse
|
| -NaClExpVector[4] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %rax, ExprSet | ExprSize64 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %esi, ExprUsed | ExprSize32 },
|
| -};
|
| -0000000000000000: 63 c6 [P] dontcare %eax (sz), %esi (u)
|
| - 63 386 OpcodeUsesModRm OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o LongMode PartialInstruction
|
| - DontCare $Gv, $Ed
|
| - G_Operand OpSet OperandZeroExtends_v
|
| - Ev_Operand OpUse
|
| -NaClExpVector[4] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %eax, ExprSet | ExprSize32 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %esi, ExprUsed | ExprSize32 },
|
| -};
|
| -0000000000000000: 6c [P] dontcare(illegal)
|
| - 6c 386 OpcodeAllowsRep OperandSize_b NaClIllegal PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: 6d [P] dontcare(illegal)
|
| - 6d 386 OpcodeAllowsRep OperandSize_v OperandSize_o NaClIllegal PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: 66 6d [P] dontcare(illegal)
|
| - 6d 386 OpcodeAllowsRep OpcodeAllowsData16 OperandSize_w NaClIllegal PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: 6e [P] dontcare(illegal)
|
| - 6e 386 OpcodeAllowsRep OperandSize_b NaClIllegal PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: 6f [P] dontcare(illegal)
|
| - 6f 386 OpcodeAllowsRep OperandSize_v OperandSize_o NaClIllegal PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: 66 6f [P] dontcare(illegal)
|
| - 6f 386 OpcodeAllowsRep OpcodeAllowsData16 OperandSize_w NaClIllegal PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: 66 98 [P] dontcare %ax (s), %al (u)
|
| - 98 386 OpcodeAllowsData16 OperandSize_w PartialInstruction
|
| - DontCare %ax, %al
|
| - RegAX OpSet
|
| - RegAL OpUse
|
| -NaClExpVector[4] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %ax, ExprSet | ExprSize16 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %al, ExprUsed | ExprSize8 },
|
| -};
|
| -0000000000000000: 98 [P] dontcare %eax (s), %ax (u)
|
| - 98 386 OperandSize_v PartialInstruction
|
| - DontCare %eax, %ax
|
| - RegEAX OpSet OperandSignExtends_v
|
| - RegAX OpUse
|
| -NaClExpVector[4] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %eax, ExprSet | ExprSize32 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %ax, ExprUsed | ExprSize16 },
|
| -};
|
| -0000000000000000: 48 98 [P] dontcare %rax (s), %eax (u)
|
| - 98 386 OperandSize_o LongMode PartialInstruction
|
| - DontCare %rax, %eax
|
| - RegRAX OpSet
|
| - RegEAX OpUse
|
| -NaClExpVector[4] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %rax, ExprSet | ExprSize64 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %eax, ExprUsed | ExprSize32 },
|
| -};
|
| -0000000000000000: 66 99 [P] dontcare %dx (s), %ax (u)
|
| - 99 386 OpcodeAllowsData16 OperandSize_w PartialInstruction
|
| - DontCare %dx, %ax
|
| - RegDX OpSet
|
| - RegAX OpUse
|
| -NaClExpVector[4] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %dx, ExprSet | ExprSize16 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %ax, ExprUsed | ExprSize16 },
|
| -};
|
| -0000000000000000: 99 [P] dontcare %edx (s), %eax (u)
|
| - 99 386 OperandSize_v PartialInstruction
|
| - DontCare %edx, %eax
|
| - RegEDX OpSet
|
| - RegEAX OpUse
|
| -NaClExpVector[4] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %edx, ExprSet | ExprSize32 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %eax, ExprUsed | ExprSize32 },
|
| -};
|
| -0000000000000000: 48 99 [P] dontcare %rdx (s), %rax (u)
|
| - 99 386 OperandSize_o LongMode PartialInstruction
|
| - DontCare %rdx, %rax
|
| - RegRDX OpSet
|
| - RegRAX OpUse
|
| -NaClExpVector[4] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %rdx, ExprSet | ExprSize64 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %rax, ExprUsed | ExprSize64 },
|
| -};
|
| -0000000000000000: 86 c2 [P] dontcare %dl (su), %al (su)
|
| - 86 386 OpcodeUsesModRm OpcodeLockable OperandSize_b PartialInstruction
|
| - DontCare $Eb, $Gb
|
| - E_Operand OpUse OpSet
|
| - G_Operand OpUse OpSet
|
| -NaClExpVector[4] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %dl, ExprSet | ExprUsed | ExprSize8 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %al, ExprSet | ExprUsed | ExprSize8 },
|
| -};
|
| -0000000000000000: 86 40 20 [P] dontcare [%rax+0x20] (su), %al (su)
|
| - 86 386 OpcodeUsesModRm OpcodeLockable OperandSize_b PartialInstruction
|
| - DontCare $Eb, $Gb
|
| - E_Operand OpUse OpSet
|
| - G_Operand OpUse OpSet
|
| -NaClExpVector[8] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprSet | ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %rax, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0x20, ExprSize8 | ExprSignedHex },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %al, ExprSet | ExprUsed | ExprSize8 },
|
| -};
|
| -0000000000000000: 87 40 20 [P] dontcare [%rax+0x20] (suz), %eax (suz)
|
| - 87 386 OpcodeUsesModRm OpcodeLockable OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o PartialInstruction
|
| - DontCare $Ev, $Gv
|
| - E_Operand OpUse OpSet OperandZeroExtends_v
|
| - G_Operand OpUse OpSet OperandZeroExtends_v
|
| -NaClExpVector[8] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprSet | ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %rax, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0x20, ExprSize8 | ExprSignedHex },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %eax, ExprSet | ExprUsed | ExprSize32 },
|
| -};
|
| -0000000000000000: a6 [P] dontcare [%rdi] (u), [%rsi] (u)
|
| - a6 386 OpcodeAllowsRep OpcodeAllowsRepne OperandSize_b PartialInstruction
|
| - DontCare $Yb, $Xb
|
| - RegES_EDI OpUse
|
| - RegDS_ESI OpUse
|
| -NaClExpVector[8] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprSegmentAddress[2] , 0, ExprUsed | ExprSize64 | ExprESrCase },
|
| - { ExprRegister[0] , %es, ExprSize16 },
|
| - { ExprRegister[0] , %rdi, ExprSize64 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprSegmentAddress[2] , 0, ExprUsed | ExprSize64 | ExprDSrCase },
|
| - { ExprRegister[0] , %ds, ExprSize16 },
|
| - { ExprRegister[0] , %rsi, ExprSize64 },
|
| -};
|
| -0000000000000000: 66 a7 [P] dontcare [%rdi] (u), [%rsi] (u)
|
| - a7 386 OpcodeAllowsRep OpcodeAllowsRepne OpcodeAllowsData16 OperandSize_w PartialInstruction
|
| - DontCare $Yvw, $Xvw
|
| - RegES_EDI OpUse
|
| - RegDS_ESI OpUse
|
| -NaClExpVector[8] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprSegmentAddress[2] , 0, ExprUsed | ExprSize64 | ExprESrCase },
|
| - { ExprRegister[0] , %es, ExprSize16 },
|
| - { ExprRegister[0] , %rdi, ExprSize64 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprSegmentAddress[2] , 0, ExprUsed | ExprSize64 | ExprDSrCase },
|
| - { ExprRegister[0] , %ds, ExprSize16 },
|
| - { ExprRegister[0] , %rsi, ExprSize64 },
|
| -};
|
| -0000000000000000: a7 [P] dontcare [%rdi] (u), [%rsi] (u)
|
| - a7 386 OpcodeAllowsRep OpcodeAllowsRepne OperandSize_v PartialInstruction
|
| - DontCare $Yvd, $Xvd
|
| - RegES_EDI OpUse
|
| - RegDS_ESI OpUse
|
| -NaClExpVector[8] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprSegmentAddress[2] , 0, ExprUsed | ExprSize64 | ExprESrCase },
|
| - { ExprRegister[0] , %es, ExprSize16 },
|
| - { ExprRegister[0] , %rdi, ExprSize64 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprSegmentAddress[2] , 0, ExprUsed | ExprSize64 | ExprDSrCase },
|
| - { ExprRegister[0] , %ds, ExprSize16 },
|
| - { ExprRegister[0] , %rsi, ExprSize64 },
|
| -};
|
| -0000000000000000: 48 a7 [P] dontcare [%rdi] (u), [%rsi] (u)
|
| - a7 386 OpcodeAllowsRep OpcodeAllowsRepne OperandSize_o LongMode PartialInstruction
|
| - DontCare $Yvq, $Xvq
|
| - RegES_EDI OpUse
|
| - RegDS_ESI OpUse
|
| -NaClExpVector[8] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprSegmentAddress[2] , 0, ExprUsed | ExprSize64 | ExprESrCase },
|
| - { ExprRegister[0] , %es, ExprSize16 },
|
| - { ExprRegister[0] , %rdi, ExprSize64 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprSegmentAddress[2] , 0, ExprUsed | ExprSize64 | ExprDSrCase },
|
| - { ExprRegister[0] , %ds, ExprSize16 },
|
| - { ExprRegister[0] , %rsi, ExprSize64 },
|
| -};
|
| -0000000000000000: aa [P] dontcare [%rdi] (s), %al (u)
|
| - aa 386 OpcodeAllowsRep OperandSize_b PartialInstruction
|
| - DontCare $Yb, %al
|
| - RegES_EDI OpSet
|
| - RegAL OpUse
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprSegmentAddress[2] , 0, ExprSet | ExprSize64 | ExprESrCase },
|
| - { ExprRegister[0] , %es, ExprSize16 },
|
| - { ExprRegister[0] , %rdi, ExprSize64 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %al, ExprUsed | ExprSize8 },
|
| -};
|
| -0000000000000000: ab [P] dontcare [%rdi] (s), %eax (u)
|
| - ab 386 OpcodeAllowsRep OperandSize_v PartialInstruction
|
| - DontCare $Yvd, $rAXvd
|
| - RegES_EDI OpSet
|
| - RegEAX OpUse
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprSegmentAddress[2] , 0, ExprSet | ExprSize64 | ExprESrCase },
|
| - { ExprRegister[0] , %es, ExprSize16 },
|
| - { ExprRegister[0] , %rdi, ExprSize64 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %eax, ExprUsed | ExprSize32 },
|
| -};
|
| -0000000000000000: 66 ab [P] dontcare [%rdi] (s), %ax (u)
|
| - ab 386 OpcodeAllowsRep OpcodeAllowsData16 OperandSize_w PartialInstruction
|
| - DontCare $Yvw, $rAXvw
|
| - RegES_EDI OpSet
|
| - RegAX OpUse
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprSegmentAddress[2] , 0, ExprSet | ExprSize64 | ExprESrCase },
|
| - { ExprRegister[0] , %es, ExprSize16 },
|
| - { ExprRegister[0] , %rdi, ExprSize64 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %ax, ExprUsed | ExprSize16 },
|
| -};
|
| -0000000000000000: 48 ab [P] dontcare [%rdi] (s), %rax (u)
|
| - ab 386 OpcodeAllowsRep OperandSize_o LongMode PartialInstruction
|
| - DontCare $Yvq, $rAXvq
|
| - RegES_EDI OpSet
|
| - RegRAX OpUse
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprSegmentAddress[2] , 0, ExprSet | ExprSize64 | ExprESrCase },
|
| - { ExprRegister[0] , %es, ExprSize16 },
|
| - { ExprRegister[0] , %rdi, ExprSize64 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %rax, ExprUsed | ExprSize64 },
|
| -};
|
| -0000000000000000: a4 [P] dontcare [%rdi] (s), [%rsi] (u)
|
| - a4 386 OpcodeAllowsRep OperandSize_b PartialInstruction
|
| - DontCare $Yb, $Xb
|
| - RegES_EDI OpSet
|
| - RegDS_ESI OpUse
|
| -NaClExpVector[8] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprSegmentAddress[2] , 0, ExprSet | ExprSize64 | ExprESrCase },
|
| - { ExprRegister[0] , %es, ExprSize16 },
|
| - { ExprRegister[0] , %rdi, ExprSize64 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprSegmentAddress[2] , 0, ExprUsed | ExprSize64 | ExprDSrCase },
|
| - { ExprRegister[0] , %ds, ExprSize16 },
|
| - { ExprRegister[0] , %rsi, ExprSize64 },
|
| -};
|
| -0000000000000000: 66 a5 [P] dontcare [%rdi] (s), [%rsi] (u)
|
| - a5 386 OpcodeAllowsRep OpcodeAllowsData16 OperandSize_w PartialInstruction
|
| - DontCare $Yvw, $Xvw
|
| - RegES_EDI OpSet
|
| - RegDS_ESI OpUse
|
| -NaClExpVector[8] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprSegmentAddress[2] , 0, ExprSet | ExprSize64 | ExprESrCase },
|
| - { ExprRegister[0] , %es, ExprSize16 },
|
| - { ExprRegister[0] , %rdi, ExprSize64 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprSegmentAddress[2] , 0, ExprUsed | ExprSize64 | ExprDSrCase },
|
| - { ExprRegister[0] , %ds, ExprSize16 },
|
| - { ExprRegister[0] , %rsi, ExprSize64 },
|
| -};
|
| -0000000000000000: a5 [P] dontcare [%rdi] (s), [%rsi] (u)
|
| - a5 386 OpcodeAllowsRep OperandSize_v PartialInstruction
|
| - DontCare $Yvd, $Xvd
|
| - RegES_EDI OpSet
|
| - RegDS_ESI OpUse
|
| -NaClExpVector[8] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprSegmentAddress[2] , 0, ExprSet | ExprSize64 | ExprESrCase },
|
| - { ExprRegister[0] , %es, ExprSize16 },
|
| - { ExprRegister[0] , %rdi, ExprSize64 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprSegmentAddress[2] , 0, ExprUsed | ExprSize64 | ExprDSrCase },
|
| - { ExprRegister[0] , %ds, ExprSize16 },
|
| - { ExprRegister[0] , %rsi, ExprSize64 },
|
| -};
|
| -0000000000000000: 48 a5 [P] dontcare [%rdi] (s), [%rsi] (u)
|
| - a5 386 OpcodeAllowsRep OperandSize_o LongMode PartialInstruction
|
| - DontCare $Yvq, $Xvq
|
| - RegES_EDI OpSet
|
| - RegDS_ESI OpUse
|
| -NaClExpVector[8] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprSegmentAddress[2] , 0, ExprSet | ExprSize64 | ExprESrCase },
|
| - { ExprRegister[0] , %es, ExprSize16 },
|
| - { ExprRegister[0] , %rdi, ExprSize64 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprSegmentAddress[2] , 0, ExprUsed | ExprSize64 | ExprDSrCase },
|
| - { ExprRegister[0] , %ds, ExprSize16 },
|
| - { ExprRegister[0] , %rsi, ExprSize64 },
|
| -};
|
| -0000000000000000: 9c [P] dontcare(illegal)
|
| - 9c 386 OperandSize_o NaClIllegal OperandSizeDefaultIs64 LongMode PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: 9d [P] dontcare(illegal)
|
| - 9d 386 OperandSize_o NaClIllegal OperandSizeDefaultIs64 LongMode PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: ac [P] dontcare %al (s), [%rsi] (u)
|
| - ac 386 OpcodeAllowsRep OperandSize_b PartialInstruction
|
| - DontCare %al, $Xb
|
| - RegAL OpSet
|
| - RegDS_ESI OpUse
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %al, ExprSet | ExprSize8 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprSegmentAddress[2] , 0, ExprUsed | ExprSize64 | ExprDSrCase },
|
| - { ExprRegister[0] , %ds, ExprSize16 },
|
| - { ExprRegister[0] , %rsi, ExprSize64 },
|
| -};
|
| -0000000000000000: ad [P] dontcare %eax (s), [%rsi] (u)
|
| - ad 386 OpcodeAllowsRep OperandSize_v PartialInstruction
|
| - DontCare $rAXvd, $Xvd
|
| - RegEAX OpSet
|
| - RegDS_ESI OpUse
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %eax, ExprSet | ExprSize32 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprSegmentAddress[2] , 0, ExprUsed | ExprSize64 | ExprDSrCase },
|
| - { ExprRegister[0] , %ds, ExprSize16 },
|
| - { ExprRegister[0] , %rsi, ExprSize64 },
|
| -};
|
| -0000000000000000: 66 ad [P] dontcare %ax (s), [%rsi] (u)
|
| - ad 386 OpcodeAllowsRep OpcodeAllowsData16 OperandSize_w PartialInstruction
|
| - DontCare $rAXvw, $Xvw
|
| - RegAX OpSet
|
| - RegDS_ESI OpUse
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %ax, ExprSet | ExprSize16 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprSegmentAddress[2] , 0, ExprUsed | ExprSize64 | ExprDSrCase },
|
| - { ExprRegister[0] , %ds, ExprSize16 },
|
| - { ExprRegister[0] , %rsi, ExprSize64 },
|
| -};
|
| -0000000000000000: 48 ad [P] dontcare %rax (s), [%rsi] (u)
|
| - ad 386 OpcodeAllowsRep OperandSize_o LongMode PartialInstruction
|
| - DontCare $rAXvq, $Xvq
|
| - RegRAX OpSet
|
| - RegDS_ESI OpUse
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %rax, ExprSet | ExprSize64 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprSegmentAddress[2] , 0, ExprUsed | ExprSize64 | ExprDSrCase },
|
| - { ExprRegister[0] , %ds, ExprSize16 },
|
| - { ExprRegister[0] , %rsi, ExprSize64 },
|
| -};
|
| -0000000000000000: ae [P] dontcare %al (u), [%rdi] (u)
|
| - ae 386 OpcodeAllowsRep OpcodeAllowsRepne OperandSize_b PartialInstruction
|
| - DontCare %al, $Yb
|
| - RegAL OpUse
|
| - RegES_EDI OpUse
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %al, ExprUsed | ExprSize8 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprSegmentAddress[2] , 0, ExprUsed | ExprSize64 | ExprESrCase },
|
| - { ExprRegister[0] , %es, ExprSize16 },
|
| - { ExprRegister[0] , %rdi, ExprSize64 },
|
| -};
|
| -0000000000000000: af [P] dontcare %eax (u), [%rdi] (u)
|
| - af 386 OpcodeAllowsRep OpcodeAllowsRepne OperandSize_v PartialInstruction
|
| - DontCare $rAXvd, $Yvd
|
| - RegEAX OpUse
|
| - RegES_EDI OpUse
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %eax, ExprUsed | ExprSize32 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprSegmentAddress[2] , 0, ExprUsed | ExprSize64 | ExprESrCase },
|
| - { ExprRegister[0] , %es, ExprSize16 },
|
| - { ExprRegister[0] , %rdi, ExprSize64 },
|
| -};
|
| -0000000000000000: 66 af [P] dontcare %ax (u), [%rdi] (u)
|
| - af 386 OpcodeAllowsRep OpcodeAllowsRepne OpcodeAllowsData16 OperandSize_w PartialInstruction
|
| - DontCare $rAXvw, $Yvw
|
| - RegAX OpUse
|
| - RegES_EDI OpUse
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %ax, ExprUsed | ExprSize16 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprSegmentAddress[2] , 0, ExprUsed | ExprSize64 | ExprESrCase },
|
| - { ExprRegister[0] , %es, ExprSize16 },
|
| - { ExprRegister[0] , %rdi, ExprSize64 },
|
| -};
|
| -0000000000000000: 48 af [P] dontcare %rax (u), [%rdi] (u)
|
| - af 386 OpcodeAllowsRep OpcodeAllowsRepne OperandSize_o LongMode PartialInstruction
|
| - DontCare $rAXvq, $Yvq
|
| - RegRAX OpUse
|
| - RegES_EDI OpUse
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %rax, ExprUsed | ExprSize64 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprSegmentAddress[2] , 0, ExprUsed | ExprSize64 | ExprESrCase },
|
| - { ExprRegister[0] , %es, ExprSize16 },
|
| - { ExprRegister[0] , %rdi, ExprSize64 },
|
| -};
|
| -0000000000000000: c8 2c 01 00 [P] dontcare(illegal)
|
| - c8 386 OpcodeHasImmed_w OpcodeHasImmed2_b NaClIllegal OperandSizeDefaultIs64 PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: 80 e4 df and %ah, 0xdf
|
| - 80 / 4 386 OpcodeInModRm OpcodeUsesModRm OpcodeHasImmed OpcodeLockable OperandSize_b
|
| - And $Eb, $Ib
|
| - E_Operand OpUse OpSet
|
| - I_Operand OpUse
|
| -NaClExpVector[4] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %ah, ExprSet | ExprUsed | ExprSize8 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprConstant[0] , 0xdf, ExprUsed | ExprSize8 | ExprUnsignedHex },
|
| -};
|
| -0000000000000000: 22 24 25 df 00 00 00 and %ah, [0xdf]
|
| - 22 386 OpcodeUsesModRm OpcodeLockable OperandSize_b
|
| - And $Gb, $Eb
|
| - G_Operand OpUse OpSet
|
| - E_Operand OpUse
|
| -NaClExpVector[8] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %ah, ExprSet | ExprUsed | ExprSize8 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0xdf, ExprSize32 | ExprSignedHex },
|
| -};
|
| -0000000000000000: 40 22 24 25 df 00 00 00 and %spl, [0xdf]
|
| - 22 386 OpcodeUsesModRm OpcodeLockable OperandSize_b
|
| - And $Gb, $Eb
|
| - G_Operand OpUse OpSet
|
| - E_Operand OpUse
|
| -NaClExpVector[8] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %spl, ExprSet | ExprUsed | ExprSize8 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0xdf, ExprSize32 | ExprSignedHex },
|
| -};
|
| -0000000000000000: 8d 04 85 ff ff ff ff lea %eax, [%rax*4-0x1]
|
| - 8d 386 ModRmModIsnt0x3 OpcodeUsesModRm OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o
|
| - Lea $Gv, $M
|
| - G_Operand OpSet OperandZeroExtends_v
|
| - M_Operand OpAddress
|
| -NaClExpVector[8] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %eax, ExprSet | ExprSize32 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprAddress | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprRegister[0] , %rax, ExprUsed | ExprSize64 },
|
| - { ExprConstant[0] , 4, ExprSize8 },
|
| - { ExprConstant[0] , -0x1, ExprSize32 | ExprSignedHex },
|
| -};
|
| -0000000000000000: 64 48 33 14 25 28 00 00 00 [P] dontcare %rdx (suz), %fs:[0x28] (u)
|
| - 33 386 OpcodeUsesModRm OpcodeLockable OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o PartialInstruction
|
| - DontCare $Gv, $Ev
|
| - G_Operand OpUse OpSet OperandZeroExtends_v
|
| - E_Operand OpUse
|
| -NaClExpVector[10] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %rdx, ExprSet | ExprUsed | ExprSize64 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprSegmentAddress[2] , 0, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %fs, ExprUsed | ExprSize16 },
|
| - { ExprMemOffset[4] , 0, ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0x28, ExprSize32 | ExprSignedHex },
|
| -};
|
| -0000000000000000: 48 b8 cd cc cc cc cc cc cc cc mov %rax, 0xcccccccccccccccd
|
| - b8 - r0 386 OpcodeHasImmed OpcodePlusR OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o
|
| - Mov $r8v, $Iv
|
| - G_OpcodeBase OpSet OperandZeroExtends_v
|
| - I_Operand OpUse
|
| -NaClExpVector[4] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %rax, ExprSet | ExprSize64 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprConstant[0] , 0xcccccccccccccccd, ExprUsed | ExprSize64 | ExprUnsignedHex },
|
| -};
|
| -0000000000000000: 66 6b c0 16 [P] dontcare %ax (sz), %ax (u), 0x16 (u)
|
| - 6b 386 OpcodeUsesModRm OpcodeHasImmed_b OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o PartialInstruction
|
| - DontCare $Gv, $Ev, $Ib
|
| - G_Operand OpSet OperandZeroExtends_v
|
| - E_Operand OpUse
|
| - I_Operand OpUse
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %ax, ExprSet | ExprSize16 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %ax, ExprUsed | ExprSize16 },
|
| - { OperandReference[1] , 2, ExprSize8 | ExprUnsignedInt },
|
| - { ExprConstant[0] , 0x16, ExprUsed | ExprSize8 | ExprUnsignedHex },
|
| -};
|
| -0000000000000000: 66 6b d8 16 [P] dontcare %bx (sz), %ax (u), 0x16 (u)
|
| - 6b 386 OpcodeUsesModRm OpcodeHasImmed_b OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o PartialInstruction
|
| - DontCare $Gv, $Ev, $Ib
|
| - G_Operand OpSet OperandZeroExtends_v
|
| - E_Operand OpUse
|
| - I_Operand OpUse
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %bx, ExprSet | ExprSize16 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %ax, ExprUsed | ExprSize16 },
|
| - { OperandReference[1] , 2, ExprSize8 | ExprUnsignedInt },
|
| - { ExprConstant[0] , 0x16, ExprUsed | ExprSize8 | ExprUnsignedHex },
|
| -};
|
| -0000000000000000: 66 f7 e8 [P] dontcare %dx (s), %ax (su), %ax (u)
|
| - f7 / 5 386 OpcodeInModRm OpcodeUsesModRm OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o PartialInstruction
|
| - DontCare %redx, %reax, $Ev
|
| - RegREDX OpSet
|
| - RegREAX OpUse OpSet
|
| - E_Operand OpUse
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %dx, ExprSet | ExprSize16 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %ax, ExprSet | ExprUsed | ExprSize16 },
|
| - { OperandReference[1] , 2, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %ax, ExprUsed | ExprSize16 },
|
| -};
|
| -0000000000000000: f6 ec [P] dontcare %ax (s), %al (u), %ah (u)
|
| - f6 / 5 386 OpcodeInModRm OpcodeUsesModRm OperandSize_b PartialInstruction
|
| - DontCare %ax, %al, $Eb
|
| - RegAX OpSet
|
| - RegAL OpUse
|
| - E_Operand OpUse
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %ax, ExprSet | ExprSize16 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %al, ExprUsed | ExprSize8 },
|
| - { OperandReference[1] , 2, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %ah, ExprUsed | ExprSize8 },
|
| -};
|
| -0000000000000000: 0f af 91 70 01 00 00 [P] dontcare %edx (suz), [%rcx+0x170] (u)
|
| - 0f af 386 OpcodeUsesModRm OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o PartialInstruction
|
| - DontCare $Gv, $Ev
|
| - G_Operand OpUse OpSet OperandZeroExtends_v
|
| - E_Operand OpUse
|
| -NaClExpVector[8] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %edx, ExprSet | ExprUsed | ExprSize32 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %rcx, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0x170, ExprSize32 | ExprSignedHex },
|
| -};
|
| -0000000000000000: 0f af c1 [P] dontcare %eax (suz), %ecx (u)
|
| - 0f af 386 OpcodeUsesModRm OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o PartialInstruction
|
| - DontCare $Gv, $Ev
|
| - G_Operand OpUse OpSet OperandZeroExtends_v
|
| - E_Operand OpUse
|
| -NaClExpVector[4] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %eax, ExprSet | ExprUsed | ExprSize32 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %ecx, ExprUsed | ExprSize32 },
|
| -};
|
| -0000000000000000: f6 fc [P] dontcare %ax (s), %al (u), %ah (u)
|
| - f6 / 7 386 OpcodeInModRm OpcodeUsesModRm OperandSize_b PartialInstruction
|
| - DontCare %ax, %al, $Eb
|
| - RegAX OpSet
|
| - RegAL OpUse
|
| - E_Operand OpUse
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %ax, ExprSet | ExprSize16 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %al, ExprUsed | ExprSize8 },
|
| - { OperandReference[1] , 2, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %ah, ExprUsed | ExprSize8 },
|
| -};
|
| -0000000000000000: f7 f9 [P] dontcare %edx (s), %eax (su), %ecx (u)
|
| - f7 / 7 386 OpcodeInModRm OpcodeUsesModRm OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o PartialInstruction
|
| - DontCare %redx, %reax, $Ev
|
| - RegREDX OpSet
|
| - RegREAX OpUse OpSet
|
| - E_Operand OpUse
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %edx, ExprSet | ExprSize32 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %eax, ExprSet | ExprUsed | ExprSize32 },
|
| - { OperandReference[1] , 2, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %ecx, ExprUsed | ExprSize32 },
|
| -};
|
| -0000000000000000: f7 be 70 01 00 00 [P] dontcare %edx (s), %eax (su), [%rsi+0x170] (u)
|
| - f7 / 7 386 OpcodeInModRm OpcodeUsesModRm OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o PartialInstruction
|
| - DontCare %redx, %reax, $Ev
|
| - RegREDX OpSet
|
| - RegREAX OpUse OpSet
|
| - E_Operand OpUse
|
| -NaClExpVector[10] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %edx, ExprSet | ExprSize32 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %eax, ExprSet | ExprUsed | ExprSize32 },
|
| - { OperandReference[1] , 2, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %rsi, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0x170, ExprSize32 | ExprSignedHex },
|
| -};
|
| -0000000000000000: 48 f7 f9 [P] dontcare %rdx (s), %rax (su), %rcx (u)
|
| - f7 / 7 386 OpcodeInModRm OpcodeUsesModRm OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o PartialInstruction
|
| - DontCare %redx, %reax, $Ev
|
| - RegREDX OpSet
|
| - RegREAX OpUse OpSet
|
| - E_Operand OpUse
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %rdx, ExprSet | ExprSize64 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %rax, ExprSet | ExprUsed | ExprSize64 },
|
| - { OperandReference[1] , 2, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %rcx, ExprUsed | ExprSize64 },
|
| -};
|
| -0000000000000000: fc [P] dontcare
|
| - fc 386 PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: f6 d8 [P] dontcare %al (su)
|
| - f6 / 3 386 OpcodeInModRm OpcodeUsesModRm OpcodeLockable OperandSize_b PartialInstruction
|
| - DontCare $Eb
|
| - E_Operand OpUse OpSet
|
| -NaClExpVector[2] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %al, ExprSet | ExprUsed | ExprSize8 },
|
| -};
|
| -0000000000000000: f7 d9 [P] dontcare %ecx (suz)
|
| - f7 / 3 386 OpcodeInModRm OpcodeUsesModRm OpcodeLockable OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o PartialInstruction
|
| - DontCare $Ev
|
| - E_Operand OpUse OpSet OperandZeroExtends_v
|
| -NaClExpVector[2] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %ecx, ExprSet | ExprUsed | ExprSize32 },
|
| -};
|
| -0000000000000000: 49 f7 de [P] dontcare %r14 (suz)
|
| - f7 / 3 386 OpcodeInModRm OpcodeUsesModRm OpcodeLockable OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o PartialInstruction
|
| - DontCare $Ev
|
| - E_Operand OpUse OpSet OperandZeroExtends_v
|
| -NaClExpVector[2] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %r14, ExprSet | ExprUsed | ExprSize64 },
|
| -};
|
| -0000000000000000: 48 f7 da [P] dontcare %rdx (suz)
|
| - f7 / 3 386 OpcodeInModRm OpcodeUsesModRm OpcodeLockable OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o PartialInstruction
|
| - DontCare $Ev
|
| - E_Operand OpUse OpSet OperandZeroExtends_v
|
| -NaClExpVector[2] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %rdx, ExprSet | ExprUsed | ExprSize64 },
|
| -};
|
| -0000000000000000: f6 d1 [P] dontcare %cl (su)
|
| - f6 / 2 386 OpcodeInModRm OpcodeUsesModRm OpcodeLockable OperandSize_b PartialInstruction
|
| - DontCare $Eb
|
| - E_Operand OpUse OpSet
|
| -NaClExpVector[2] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %cl, ExprSet | ExprUsed | ExprSize8 },
|
| -};
|
| -0000000000000000: f7 d1 [P] dontcare %ecx (suz)
|
| - f7 / 2 386 OpcodeInModRm OpcodeUsesModRm OpcodeLockable OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o PartialInstruction
|
| - DontCare $Ev
|
| - E_Operand OpUse OpSet OperandZeroExtends_v
|
| -NaClExpVector[2] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %ecx, ExprSet | ExprUsed | ExprSize32 },
|
| -};
|
| -0000000000000000: 48 f7 d2 [P] dontcare %rdx (suz)
|
| - f7 / 2 386 OpcodeInModRm OpcodeUsesModRm OpcodeLockable OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o PartialInstruction
|
| - DontCare $Ev
|
| - E_Operand OpUse OpSet OperandZeroExtends_v
|
| -NaClExpVector[2] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %rdx, ExprSet | ExprUsed | ExprSize64 },
|
| -};
|
| -0000000000000000: f6 e2 [P] dontcare %ax (s), %al (u), %dl (u)
|
| - f6 / 4 386 OpcodeInModRm OpcodeUsesModRm OperandSize_b PartialInstruction
|
| - DontCare %ax, %al, $Eb
|
| - RegAX OpSet
|
| - RegAL OpUse
|
| - E_Operand OpUse
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %ax, ExprSet | ExprSize16 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %al, ExprUsed | ExprSize8 },
|
| - { OperandReference[1] , 2, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %dl, ExprUsed | ExprSize8 },
|
| -};
|
| -0000000000000000: f7 e2 [P] dontcare %edx (s), %eax (su), %edx (u)
|
| - f7 / 4 386 OpcodeInModRm OpcodeUsesModRm OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o PartialInstruction
|
| - DontCare %redx, %reax, $Ev
|
| - RegREDX OpSet
|
| - RegREAX OpUse OpSet
|
| - E_Operand OpUse
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %edx, ExprSet | ExprSize32 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %eax, ExprSet | ExprUsed | ExprSize32 },
|
| - { OperandReference[1] , 2, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %edx, ExprUsed | ExprSize32 },
|
| -};
|
| -0000000000000000: 48 f7 e7 [P] dontcare %rdx (s), %rax (su), %rdi (u)
|
| - f7 / 4 386 OpcodeInModRm OpcodeUsesModRm OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o PartialInstruction
|
| - DontCare %redx, %reax, $Ev
|
| - RegREDX OpSet
|
| - RegREAX OpUse OpSet
|
| - E_Operand OpUse
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %rdx, ExprSet | ExprSize64 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %rax, ExprSet | ExprUsed | ExprSize64 },
|
| - { OperandReference[1] , 2, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %rdi, ExprUsed | ExprSize64 },
|
| -};
|
| -0000000000000000: 41 f7 e6 [P] dontcare %edx (s), %eax (su), %r14d (u)
|
| - f7 / 4 386 OpcodeInModRm OpcodeUsesModRm OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o PartialInstruction
|
| - DontCare %redx, %reax, $Ev
|
| - RegREDX OpSet
|
| - RegREAX OpUse OpSet
|
| - E_Operand OpUse
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %edx, ExprSet | ExprSize32 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %eax, ExprSet | ExprUsed | ExprSize32 },
|
| - { OperandReference[1] , 2, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %r14d, ExprUsed | ExprSize32 },
|
| -};
|
| -0000000000000000: 48 f7 f1 [P] dontcare %rdx (s), %rax (su), %rcx (u)
|
| - f7 / 6 386 OpcodeInModRm OpcodeUsesModRm OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o PartialInstruction
|
| - DontCare %redx, %reax, $Ev
|
| - RegREDX OpSet
|
| - RegREAX OpUse OpSet
|
| - E_Operand OpUse
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %rdx, ExprSet | ExprSize64 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %rax, ExprSet | ExprUsed | ExprSize64 },
|
| - { OperandReference[1] , 2, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %rcx, ExprUsed | ExprSize64 },
|
| -};
|
| -0000000000000000: 48 f7 71 38 [P] dontcare %rdx (s), %rax (su), [%rcx+0x38] (u)
|
| - f7 / 6 386 OpcodeInModRm OpcodeUsesModRm OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o PartialInstruction
|
| - DontCare %redx, %reax, $Ev
|
| - RegREDX OpSet
|
| - RegREAX OpUse OpSet
|
| - E_Operand OpUse
|
| -NaClExpVector[10] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %rdx, ExprSet | ExprSize64 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %rax, ExprSet | ExprUsed | ExprSize64 },
|
| - { OperandReference[1] , 2, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %rcx, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0x38, ExprSize8 | ExprSignedHex },
|
| -};
|
| -0000000000000000: f7 35 37 af 57 00 [P] dontcare %edx (s), %eax (su), [%rip+0x57af37] (u)
|
| - f7 / 6 386 OpcodeInModRm OpcodeUsesModRm OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o PartialInstruction
|
| - DontCare %redx, %reax, $Ev
|
| - RegREDX OpSet
|
| - RegREAX OpUse OpSet
|
| - E_Operand OpUse
|
| -NaClExpVector[10] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %edx, ExprSet | ExprSize32 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %eax, ExprSet | ExprUsed | ExprSize32 },
|
| - { OperandReference[1] , 2, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %rip, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0x57af37, ExprSize32 | ExprSignedHex },
|
| -};
|
| -0000000000000000: f2 0f 10 05 b5 dc 15 00 [P] dontcare [%rip+0x15dcb5] (u)
|
| - f2 0f 10 SSE2 OpcodeUsesModRm OpcodeAllowsRepne PartialInstruction
|
| - DontCare $Wsd
|
| - Xmm_E_Operand OpUse
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %rip, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0x15dcb5, ExprSize32 | ExprSignedHex },
|
| -};
|
| -0000000000000000: f2 0f 11 54 24 10 [P] dontcare [%rsp+0x10] (s)
|
| - f2 0f 11 SSE2 OpcodeUsesModRm OpcodeAllowsRepne PartialInstruction
|
| - DontCare $Wsd
|
| - Xmm_E_Operand OpSet
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprSet | ExprSize64 },
|
| - { ExprRegister[0] , %rsp, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0x10, ExprSize8 | ExprSignedHex },
|
| -};
|
| -0000000000000000: f3 0f 10 02 [P] dontcare [%rdx] (u)
|
| - f3 0f 10 SSE OpcodeUsesModRm OpcodeAllowsRep PartialInstruction
|
| - DontCare $Wss
|
| - Xmm_E_Operand OpUse
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %rdx, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0, ExprSize8 },
|
| -};
|
| -0000000000000000: f3 0f 11 44 24 0c [P] dontcare [%rsp+0xc] (s)
|
| - f3 0f 11 SSE OpcodeUsesModRm OpcodeAllowsRep PartialInstruction
|
| - DontCare $Wss
|
| - Xmm_E_Operand OpSet
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprSet | ExprSize64 },
|
| - { ExprRegister[0] , %rsp, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0xc, ExprSize8 | ExprSignedHex },
|
| -};
|
| -0000000000000000: f3 0f 10 4c 24 1c [P] dontcare [%rsp+0x1c] (u)
|
| - f3 0f 10 SSE OpcodeUsesModRm OpcodeAllowsRep PartialInstruction
|
| - DontCare $Wss
|
| - Xmm_E_Operand OpUse
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %rsp, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0x1c, ExprSize8 | ExprSignedHex },
|
| -};
|
| -0000000000000000: f3 0f 11 44 24 0c [P] dontcare [%rsp+0xc] (s)
|
| - f3 0f 11 SSE OpcodeUsesModRm OpcodeAllowsRep PartialInstruction
|
| - DontCare $Wss
|
| - Xmm_E_Operand OpSet
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprSet | ExprSize64 },
|
| - { ExprRegister[0] , %rsp, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0xc, ExprSize8 | ExprSignedHex },
|
| -};
|
| -0000000000000000: f2 0f 5f cf [P] dontcare %xmm7 (u)
|
| - f2 0f 5f SSE2 OpcodeUsesModRm OpcodeAllowsRepne PartialInstruction
|
| - DontCare $Wsd
|
| - Xmm_E_Operand OpUse
|
| -NaClExpVector[2] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %xmm7, ExprUsed },
|
| -};
|
| -0000000000000000: 0f c8 [P] dontcare %eax (su)
|
| - 0f c8 - r0 386 OpcodePlusR OperandSize_v PartialInstruction
|
| - DontCare $r8vd
|
| - G_OpcodeBase OpUse OpSet
|
| -NaClExpVector[2] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %eax, ExprSet | ExprUsed | ExprSize32 },
|
| -};
|
| -0000000000000000: 48 0f c8 [P] dontcare %rax (su)
|
| - 0f c8 - r0 386 OpcodePlusR OperandSize_o PartialInstruction
|
| - DontCare $r8vq
|
| - G_OpcodeBase OpUse OpSet
|
| -NaClExpVector[2] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %rax, ExprSet | ExprUsed | ExprSize64 },
|
| -};
|
| -0000000000000000: 49 0f cd [P] dontcare %r13 (su)
|
| - 0f cd - r5 386 OpcodePlusR OperandSize_o PartialInstruction
|
| - DontCare $r8vq
|
| - G_OpcodeBase OpUse OpSet
|
| -NaClExpVector[2] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %r13, ExprSet | ExprUsed | ExprSize64 },
|
| -};
|
| -0000000000000000: 0f 6e 11 [P] dontcare [%rcx] (u)
|
| - 0f 6e MMX OpcodeUsesModRm SizeIgnoresData16 OperandSize_v PartialInstruction
|
| - DontCare $Ed/q/d
|
| - E_Operand OpUse
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %rcx, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0, ExprSize8 },
|
| -};
|
| -0000000000000000: 49 0f 6e 11 [P] dontcare [%r9] (u)
|
| - 0f 6e MMX OpcodeUsesModRm SizeIgnoresData16 OperandSize_o PartialInstruction
|
| - DontCare $Ed/q/q
|
| - E_Operand OpUse
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %r9, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0, ExprSize8 },
|
| -};
|
| -0000000000000000: 66 0f 6e 11 [P] dontcare [%rcx] (u)
|
| - 66 0f 6e SSE2 OpcodeUsesModRm OpcodeAllowsData16 SizeIgnoresData16 OperandSize_v PartialInstruction
|
| - DontCare $Ed/q/d
|
| - E_Operand OpUse
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %rcx, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0, ExprSize8 },
|
| -};
|
| -0000000000000000: 0f 7e 0e [P] dontcare [%rsi] (sz)
|
| - 0f 7e MMX OpcodeUsesModRm SizeIgnoresData16 OperandSize_v PartialInstruction
|
| - DontCare $Ed/q/d
|
| - E_Operand OpSet OperandZeroExtends_v
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprSet | ExprSize64 },
|
| - { ExprRegister[0] , %rsi, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0, ExprSize8 },
|
| -};
|
| -0000000000000000: 49 0f 7e 0e [P] dontcare [%r14] (s)
|
| - 0f 7e MMX OpcodeUsesModRm SizeIgnoresData16 OperandSize_o PartialInstruction
|
| - DontCare $Ed/q/q
|
| - E_Operand OpSet
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprSet | ExprSize64 },
|
| - { ExprRegister[0] , %r14, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0, ExprSize8 },
|
| -};
|
| -0000000000000000: 0f 77 [P] dontcare
|
| - 0f 77 MMX PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: f2 0f c2 c7 01 [P] dontcare %xmm7 (u), 0x1 (u)
|
| - f2 0f c2 SSE2 OpcodeUsesModRm OpcodeHasImmed_b OpcodeAllowsRepne PartialInstruction
|
| - DontCare $Wsd, $Ib
|
| - Xmm_E_Operand OpUse
|
| - I_Operand OpUse
|
| -NaClExpVector[4] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %xmm7, ExprUsed },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprConstant[0] , 0x1, ExprUsed | ExprSize8 | ExprUnsignedHex },
|
| -};
|
| -0000000000000000: f2 0f c2 0d 67 87 10 00 05 [P] dontcare [%rip+0x108767] (u), 0x5 (u)
|
| - f2 0f c2 SSE2 OpcodeUsesModRm OpcodeHasImmed_b OpcodeAllowsRepne PartialInstruction
|
| - DontCare $Wsd, $Ib
|
| - Xmm_E_Operand OpUse
|
| - I_Operand OpUse
|
| -NaClExpVector[8] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %rip, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0x108767, ExprSize32 | ExprSignedHex },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprConstant[0] , 0x5, ExprUsed | ExprSize8 | ExprUnsignedHex },
|
| -};
|
| -0000000000000000: f3 0f c2 c7 01 [P] dontcare %xmm7 (u), 0x1 (u)
|
| - f3 0f c2 SSE OpcodeUsesModRm OpcodeHasImmed_b OpcodeAllowsRep PartialInstruction
|
| - DontCare $Wss, $Ib
|
| - Xmm_E_Operand OpUse
|
| - I_Operand OpUse
|
| -NaClExpVector[4] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %xmm7, ExprUsed },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprConstant[0] , 0x1, ExprUsed | ExprSize8 | ExprUnsignedHex },
|
| -};
|
| -0000000000000000: f3 0f c2 0d 67 87 10 00 05 [P] dontcare [%rip+0x108767] (u), 0x5 (u)
|
| - f3 0f c2 SSE OpcodeUsesModRm OpcodeHasImmed_b OpcodeAllowsRep PartialInstruction
|
| - DontCare $Wss, $Ib
|
| - Xmm_E_Operand OpUse
|
| - I_Operand OpUse
|
| -NaClExpVector[8] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %rip, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0x108767, ExprSize32 | ExprSignedHex },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprConstant[0] , 0x5, ExprUsed | ExprSize8 | ExprUnsignedHex },
|
| -};
|
| -0000000000000000: 0f 6f 05 ba 87 0f 00 [P] dontcare [%rip+0xf87ba] (u)
|
| - 0f 6f MMX OpcodeUsesModRm PartialInstruction
|
| - DontCare $Qq
|
| - Mmx_E_Operand OpUse
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %rip, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0xf87ba, ExprSize32 | ExprSignedHex },
|
| -};
|
| -0000000000000000: 0f 6f c8 [P] dontcare %mmx0 (u)
|
| - 0f 6f MMX OpcodeUsesModRm PartialInstruction
|
| - DontCare $Qq
|
| - Mmx_E_Operand OpUse
|
| -NaClExpVector[2] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %mmx0, ExprUsed },
|
| -};
|
| -0000000000000000: 0f 7f 0e [P] dontcare [%rsi] (s)
|
| - 0f 7f MMX OpcodeUsesModRm PartialInstruction
|
| - DontCare $Qq
|
| - Mmx_E_Operand OpSet
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprSet | ExprSize64 },
|
| - { ExprRegister[0] , %rsi, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0, ExprSize8 },
|
| -};
|
| -0000000000000000: 0f d1 0c 25 08 00 00 00 [P] dontcare [0x8] (u)
|
| - 0f d1 MMX OpcodeUsesModRm PartialInstruction
|
| - DontCare $Qq
|
| - Mmx_E_Operand OpUse
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0x8, ExprSize32 | ExprSignedHex },
|
| -};
|
| -0000000000000000: 0f 71 d1 08 [P] dontcare %mmx1 (su), 0x8 (u)
|
| - 0f 71 / 2 MMX OpcodeInModRm ModRmModIs0x3 OpcodeUsesModRm OpcodeHasImmed_b PartialInstruction
|
| - DontCare $PRq, $Ib
|
| - Mmx_E_Operand OpUse OpSet
|
| - I_Operand OpUse
|
| -NaClExpVector[4] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %mmx1, ExprSet | ExprUsed },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprConstant[0] , 0x8, ExprUsed | ExprSize8 | ExprUnsignedHex },
|
| -};
|
| -0000000000000000: 0f 6e e8 [P] dontcare %eax (u)
|
| - 0f 6e MMX OpcodeUsesModRm SizeIgnoresData16 OperandSize_v PartialInstruction
|
| - DontCare $Ed/q/d
|
| - E_Operand OpUse
|
| -NaClExpVector[2] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %eax, ExprUsed | ExprSize32 },
|
| -};
|
| -0000000000000000: f3 0f 6f 05 f9 77 0f 00 [P] dontcare [%rip+0xf77f9] (u)
|
| - f3 0f 6f SSE2 OpcodeUsesModRm OpcodeAllowsRep PartialInstruction
|
| - DontCare $Wdq
|
| - Xmm_E_Operand OpUse
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %rip, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0xf77f9, ExprSize32 | ExprSignedHex },
|
| -};
|
| -0000000000000000: f3 0f 6f 11 [P] dontcare [%rcx] (u)
|
| - f3 0f 6f SSE2 OpcodeUsesModRm OpcodeAllowsRep PartialInstruction
|
| - DontCare $Wdq
|
| - Xmm_E_Operand OpUse
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %rcx, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0, ExprSize8 },
|
| -};
|
| -0000000000000000: f3 0f 7f 0e [P] dontcare [%rsi] (s)
|
| - f3 0f 7f SSE2 OpcodeUsesModRm OpcodeAllowsRep PartialInstruction
|
| - DontCare $Wdq
|
| - Xmm_E_Operand OpSet
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprSet | ExprSize64 },
|
| - { ExprRegister[0] , %rsi, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0, ExprSize8 },
|
| -};
|
| -0000000000000000: 0f e7 0e [P] dontcare [%rsi] (s)
|
| - 0f e7 MMX ModRmModIsnt0x3 OpcodeUsesModRm PartialInstruction
|
| - DontCare $Mq
|
| - Mo_Operand OpSet
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprSet | ExprSize64 },
|
| - { ExprRegister[0] , %rsi, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0, ExprSize8 },
|
| -};
|
| -0000000000000000: 66 0f 29 0c 24 [P] dontcare [%rsp] (s)
|
| - 66 0f 29 SSE2 OpcodeUsesModRm OpcodeAllowsData16 SizeIgnoresData16 PartialInstruction
|
| - DontCare $Wpd
|
| - Xmm_E_Operand OpSet
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprSet | ExprSize64 },
|
| - { ExprRegister[0] , %rsp, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0, ExprSize8 },
|
| -};
|
| -0000000000000000: f3 0f 51 d0 [P] dontcare %xmm0 (u)
|
| - f3 0f 51 SSE OpcodeUsesModRm OpcodeAllowsRep PartialInstruction
|
| - DontCare $Wps
|
| - Xmm_E_Operand OpUse
|
| -NaClExpVector[2] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %xmm0, ExprUsed },
|
| -};
|
| -0000000000000000: 48 ff c0 [P] dontcare %rax (suz)
|
| - ff / 0 386 OpcodeInModRm OpcodeUsesModRm OpcodeLockable OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o PartialInstruction
|
| - DontCare $Ev
|
| - E_Operand OpUse OpSet OperandZeroExtends_v
|
| -NaClExpVector[2] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %rax, ExprSet | ExprUsed | ExprSize64 },
|
| -};
|
| -0000000000000000: ff 05 a4 76 39 00 [P] dontcare [%rip+0x3976a4] (suz)
|
| - ff / 0 386 OpcodeInModRm OpcodeUsesModRm OpcodeLockable OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o PartialInstruction
|
| - DontCare $Ev
|
| - E_Operand OpUse OpSet OperandZeroExtends_v
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprSet | ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %rip, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0x3976a4, ExprSize32 | ExprSignedHex },
|
| -};
|
| -0000000000000000: ff c0 [P] dontcare %eax (suz)
|
| - ff / 0 386 OpcodeInModRm OpcodeUsesModRm OpcodeLockable OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o PartialInstruction
|
| - DontCare $Ev
|
| - E_Operand OpUse OpSet OperandZeroExtends_v
|
| -NaClExpVector[2] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %eax, ExprSet | ExprUsed | ExprSize32 },
|
| -};
|
| -0000000000000000: 41 ff c5 [P] dontcare %r13d (suz)
|
| - ff / 0 386 OpcodeInModRm OpcodeUsesModRm OpcodeLockable OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o PartialInstruction
|
| - DontCare $Ev
|
| - E_Operand OpUse OpSet OperandZeroExtends_v
|
| -NaClExpVector[2] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %r13d, ExprSet | ExprUsed | ExprSize32 },
|
| -};
|
| -0000000000000000: fe c0 [P] dontcare %al (su)
|
| - fe / 0 386 OpcodeInModRm OpcodeUsesModRm OpcodeLockable OperandSize_b PartialInstruction
|
| - DontCare $Eb
|
| - E_Operand OpUse OpSet
|
| -NaClExpVector[2] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %al, ExprSet | ExprUsed | ExprSize8 },
|
| -};
|
| -0000000000000000: fe c4 [P] dontcare %ah (su)
|
| - fe / 0 386 OpcodeInModRm OpcodeUsesModRm OpcodeLockable OperandSize_b PartialInstruction
|
| - DontCare $Eb
|
| - E_Operand OpUse OpSet
|
| -NaClExpVector[2] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %ah, ExprSet | ExprUsed | ExprSize8 },
|
| -};
|
| -0000000000000000: 41 fe c0 [P] dontcare %r8b (su)
|
| - fe / 0 386 OpcodeInModRm OpcodeUsesModRm OpcodeLockable OperandSize_b PartialInstruction
|
| - DontCare $Eb
|
| - E_Operand OpUse OpSet
|
| -NaClExpVector[2] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %r8b, ExprSet | ExprUsed | ExprSize8 },
|
| -};
|
| -0000000000000000: ff ca [P] dontcare %edx (suz)
|
| - ff / 1 386 OpcodeInModRm OpcodeUsesModRm OpcodeLockable OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o PartialInstruction
|
| - DontCare $Ev
|
| - E_Operand OpUse OpSet OperandZeroExtends_v
|
| -NaClExpVector[2] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %edx, ExprSet | ExprUsed | ExprSize32 },
|
| -};
|
| -0000000000000000: ff 0d 8f 76 39 00 [P] dontcare [%rip+0x39768f] (suz)
|
| - ff / 1 386 OpcodeInModRm OpcodeUsesModRm OpcodeLockable OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o PartialInstruction
|
| - DontCare $Ev
|
| - E_Operand OpUse OpSet OperandZeroExtends_v
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprSet | ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %rip, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0x39768f, ExprSize32 | ExprSignedHex },
|
| -};
|
| -0000000000000000: 48 ff c8 [P] dontcare %rax (suz)
|
| - ff / 1 386 OpcodeInModRm OpcodeUsesModRm OpcodeLockable OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o PartialInstruction
|
| - DontCare $Ev
|
| - E_Operand OpUse OpSet OperandZeroExtends_v
|
| -NaClExpVector[2] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %rax, ExprSet | ExprUsed | ExprSize64 },
|
| -};
|
| -0000000000000000: 49 ff cc [P] dontcare %r12 (suz)
|
| - ff / 1 386 OpcodeInModRm OpcodeUsesModRm OpcodeLockable OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o PartialInstruction
|
| - DontCare $Ev
|
| - E_Operand OpUse OpSet OperandZeroExtends_v
|
| -NaClExpVector[2] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %r12, ExprSet | ExprUsed | ExprSize64 },
|
| -};
|
| -0000000000000000: fe c8 [P] dontcare %al (su)
|
| - fe / 1 386 OpcodeInModRm OpcodeUsesModRm OpcodeLockable OperandSize_b PartialInstruction
|
| - DontCare $Eb
|
| - E_Operand OpUse OpSet
|
| -NaClExpVector[2] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %al, ExprSet | ExprUsed | ExprSize8 },
|
| -};
|
| -0000000000000000: fe cc [P] dontcare %ah (su)
|
| - fe / 1 386 OpcodeInModRm OpcodeUsesModRm OpcodeLockable OperandSize_b PartialInstruction
|
| - DontCare $Eb
|
| - E_Operand OpUse OpSet
|
| -NaClExpVector[2] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %ah, ExprSet | ExprUsed | ExprSize8 },
|
| -};
|
| -0000000000000000: 41 fe c8 [P] dontcare %r8b (su)
|
| - fe / 1 386 OpcodeInModRm OpcodeUsesModRm OpcodeLockable OperandSize_b PartialInstruction
|
| - DontCare $Eb
|
| - E_Operand OpUse OpSet
|
| -NaClExpVector[2] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %r8b, ExprSet | ExprUsed | ExprSize8 },
|
| -};
|
| -0000000000000000: f0 0f b1 35 21 c6 31 00 [P] dontcare %eax (su), [%rip+0x31c621] (su), %esi (su)
|
| - 0f b1 386 OpcodeUsesModRm OpcodeLockable OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o PartialInstruction
|
| - DontCare $rAXv, $Ev, $Gv
|
| - RegREAX OpUse OpSet
|
| - E_Operand OpUse OpSet
|
| - G_Operand OpUse OpSet
|
| -NaClExpVector[10] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %eax, ExprSet | ExprUsed | ExprSize32 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprSet | ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %rip, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0x31c621, ExprSize32 | ExprSignedHex },
|
| - { OperandReference[1] , 2, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %esi, ExprSet | ExprUsed | ExprSize32 },
|
| -};
|
| -0000000000000000: 0f b1 35 12 c6 31 00 [P] dontcare %eax (su), [%rip+0x31c612] (su), %esi (su)
|
| - 0f b1 386 OpcodeUsesModRm OpcodeLockable OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o PartialInstruction
|
| - DontCare $rAXv, $Ev, $Gv
|
| - RegREAX OpUse OpSet
|
| - E_Operand OpUse OpSet
|
| - G_Operand OpUse OpSet
|
| -NaClExpVector[10] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %eax, ExprSet | ExprUsed | ExprSize32 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprSet | ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %rip, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0x31c612, ExprSize32 | ExprSignedHex },
|
| - { OperandReference[1] , 2, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %esi, ExprSet | ExprUsed | ExprSize32 },
|
| -};
|
| -0000000000000000: f0 41 0f b1 30 [P] dontcare %eax (su), [%r8] (su), %esi (su)
|
| - 0f b1 386 OpcodeUsesModRm OpcodeLockable OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o PartialInstruction
|
| - DontCare $rAXv, $Ev, $Gv
|
| - RegREAX OpUse OpSet
|
| - E_Operand OpUse OpSet
|
| - G_Operand OpUse OpSet
|
| -NaClExpVector[10] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %eax, ExprSet | ExprUsed | ExprSize32 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprSet | ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %r8, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0, ExprSize8 },
|
| - { OperandReference[1] , 2, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %esi, ExprSet | ExprUsed | ExprSize32 },
|
| -};
|
| -0000000000000000: f0 0f c1 02 [P] dontcare [%rdx] (suz), %eax (suz)
|
| - 0f c1 386 OpcodeUsesModRm OpcodeLockable OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o PartialInstruction
|
| - DontCare $Ev, $Gv
|
| - E_Operand OpUse OpSet OperandZeroExtends_v
|
| - G_Operand OpUse OpSet OperandZeroExtends_v
|
| -NaClExpVector[8] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprSet | ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %rdx, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0, ExprSize8 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %eax, ExprSet | ExprUsed | ExprSize32 },
|
| -};
|
| -0000000000000000: f0 0f c1 43 18 [P] dontcare [%rbx+0x18] (suz), %eax (suz)
|
| - 0f c1 386 OpcodeUsesModRm OpcodeLockable OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o PartialInstruction
|
| - DontCare $Ev, $Gv
|
| - E_Operand OpUse OpSet OperandZeroExtends_v
|
| - G_Operand OpUse OpSet OperandZeroExtends_v
|
| -NaClExpVector[8] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprSet | ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %rbx, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0x18, ExprSize8 | ExprSignedHex },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %eax, ExprSet | ExprUsed | ExprSize32 },
|
| -};
|
| -0000000000000000: f0 41 0f c1 00 [P] dontcare [%r8] (suz), %eax (suz)
|
| - 0f c1 386 OpcodeUsesModRm OpcodeLockable OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o PartialInstruction
|
| - DontCare $Ev, $Gv
|
| - E_Operand OpUse OpSet OperandZeroExtends_v
|
| - G_Operand OpUse OpSet OperandZeroExtends_v
|
| -NaClExpVector[8] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprSet | ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %r8, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0, ExprSize8 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %eax, ExprSet | ExprUsed | ExprSize32 },
|
| -};
|
| -0000000000000000: 0f 05 [P] dontcare(illegal)
|
| - 0f 05 SYSCALL NaClIllegal PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: e4 08 [P] dontcare(illegal)
|
| - e4 386 OpcodeHasImmed_b NaClIllegal PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: 66 e5 08 [P] dontcare(illegal)
|
| - e5 386 OpcodeHasImmed_b OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o NaClIllegal PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: e5 08 [P] dontcare(illegal)
|
| - e5 386 OpcodeHasImmed_b OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o NaClIllegal PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: ec [P] dontcare(illegal)
|
| - ec 386 NaClIllegal PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: 66 ed [P] dontcare(illegal)
|
| - ed 386 OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o NaClIllegal PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: ed [P] dontcare(illegal)
|
| - ed 386 OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o NaClIllegal PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: 55 push %rbp
|
| - 55 - r5 386 OpcodePlusR OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o OperandSizeDefaultIs64
|
| - Push {%rsp}, $r8v
|
| - RegRSP OpUse OpSet OpImplicit
|
| - G_OpcodeBase OpUse
|
| -NaClExpVector[4] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt | ExprImplicit },
|
| - { ExprRegister[0] , %rsp, ExprSet | ExprUsed | ExprSize64 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %rbp, ExprUsed | ExprSize64 },
|
| -};
|
| -0000000000000000: 0f 18 86 00 03 00 00 [P] dontcare [%rsi+0x300]
|
| - 0f 18 / 0 MMX OpcodeInModRm ModRmModIsnt0x3 OpcodeUsesModRm PartialInstruction
|
| - DontCare $Mb
|
| - Mb_Operand
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprSize64 },
|
| - { ExprRegister[0] , %rsi, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0x300, ExprSize32 | ExprSignedHex },
|
| -};
|
| -0000000000000000: 48 0f c3 07 [P] dontcare [%rdi] (s), %rax (u)
|
| - 0f c3 SSE2 ModRmModIsnt0x3 OpcodeUsesModRm SizeIgnoresData16 OperandSize_v OperandSize_o PartialInstruction
|
| - DontCare $Md/q, $Gd/q
|
| - M_Operand OpSet
|
| - G_Operand OpUse
|
| -NaClExpVector[8] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprSet | ExprSize64 },
|
| - { ExprRegister[0] , %rdi, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0, ExprSize8 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %rax, ExprUsed | ExprSize64 },
|
| -};
|
| -0000000000000000: 0f ae f8 [P] dontcare
|
| - 0f ae / 7 / 0 SFENCE_CLFLUSH OpcodeInModRm OpcodeInModRmRm ModRmModIs0x3 OpcodeUsesModRm PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: 41 0f a3 c0 [P] dontcare(illegal)
|
| - 0f a3 386 OpcodeUsesModRm OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o NaClIllegal PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: 41 db 2c 07 [P] dontcare [%r15+%rax*1] (u)
|
| - db / 5 X87 OpcodeInModRm ModRmModIsnt0x3 OpcodeUsesModRm PartialInstruction
|
| - DontCare $Mf
|
| - M_Operand OpUse
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %r15, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %rax, ExprUsed | ExprSize64 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0, ExprSize8 },
|
| -};
|
| -0000000000000000: dd 04 24 [P] dontcare [%rsp] (u)
|
| - dd / 0 X87 OpcodeInModRm ModRmModIsnt0x3 OpcodeUsesModRm PartialInstruction
|
| - DontCare $Mq
|
| - Mo_Operand OpUse
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %rsp, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0, ExprSize8 },
|
| -};
|
| -0000000000000000: 0f b3 20 [P] dontcare(illegal)
|
| - 0f b3 386 OpcodeUsesModRm OpcodeLockable OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o NaClIllegal PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: 0f a3 20 [P] dontcare(illegal)
|
| - 0f a3 386 OpcodeUsesModRm OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o NaClIllegal PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: 0f bb 20 [P] dontcare(illegal)
|
| - 0f bb 386 OpcodeUsesModRm OpcodeLockable OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o NaClIllegal PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: 0f ab 20 [P] dontcare(illegal)
|
| - 0f ab 386 OpcodeUsesModRm OpcodeLockable OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o NaClIllegal PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: 66 0f 78 c1 02 04 [P] dontcare(illegal)
|
| - 66 0f 78 / 0 SSE4A OpcodeInModRm OpcodeUsesModRm OpcodeHasImmed_b OpcodeHasImmed2_b OpcodeAllowsData16 SizeIgnoresData16 NaClIllegal PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: f2 0f 78 ca 02 04 [P] dontcare %xmm2 (u), 0x2 (u), 0x4 (u)
|
| - f2 0f 78 SSE4A ModRmModIs0x3 OpcodeUsesModRm OpcodeHasImmed_b OpcodeHasImmed2_b OpcodeAllowsRepne PartialInstruction
|
| - DontCare $VRq, $Ib, $Ib
|
| - Xmm_E_Operand OpUse
|
| - I_Operand OpUse
|
| - I2_Operand OpUse
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %xmm2, ExprUsed },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprConstant[0] , 0x2, ExprUsed | ExprSize8 | ExprUnsignedHex },
|
| - { OperandReference[1] , 2, ExprSize8 | ExprUnsignedInt },
|
| - { ExprConstant[0] , 0x4, ExprUsed | ExprSize8 | ExprUnsignedHex },
|
| -};
|
| -0000000000000000: 66 0f 79 ca [P] dontcare %xmm2 (u)
|
| - 66 0f 79 SSE4A ModRmModIs0x3 OpcodeUsesModRm OpcodeAllowsData16 SizeIgnoresData16 PartialInstruction
|
| - DontCare $VRdq
|
| - Xmm_E_Operand OpUse
|
| -NaClExpVector[2] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %xmm2, ExprUsed },
|
| -};
|
| -0000000000000000: f2 0f 79 ca [P] dontcare %xmm2 (u)
|
| - f2 0f 79 SSE4A ModRmModIs0x3 OpcodeUsesModRm OpcodeAllowsRepne PartialInstruction
|
| - DontCare $VRdq
|
| - Xmm_E_Operand OpUse
|
| -NaClExpVector[2] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %xmm2, ExprUsed },
|
| -};
|
| -0000000000000000: e9 00 00 01 02 [P] dontcarejump %rip (s), 0x2010005 (u)
|
| - e9 386 OpcodeHasImmed_v OperandSize_v OperandSize_o OperandSizeDefaultIs64 JumpInstruction PartialInstruction
|
| - DontCareJump %rip, $Jzd
|
| - RegRIP OpSet
|
| - J_Operand OpUse OperandNear OperandRelative
|
| -NaClExpVector[4] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %rip, ExprSet | ExprSize64 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprConstant[0] , 0x2010005, ExprUsed | ExprSize32 | ExprSignedHex | ExprJumpTarget },
|
| -};
|
| -0000000000000000: 67 40 a0 00 01 02 03 mov %al, [0x3020100]
|
| - a0 386 OpcodeHasImmed_Addr OperandSize_b
|
| - Mov %al, $Ob
|
| - RegAL OpSet
|
| - O_Operand OpUse
|
| -NaClExpVector[8] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %al, ExprSet | ExprSize8 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprUsed | ExprSize32 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0x3020100, ExprSize32 | ExprUnsignedHex },
|
| -};
|
| -0000000000000000: 66 0f 3a 60 00 01 [P] dontcare %eax (s), %edx (s), [%rax] (u), 0x1 (u)
|
| - 66 0f 3a 60 SSE42 OpcodeUsesModRm OpcodeHasImmed_b OpcodeAllowsData16 SizeIgnoresData16 OperandSize_v OperandSize_o PartialInstruction
|
| - DontCare $rAXv, $rDXv, $Wdq, $Ib
|
| - RegREAX OpSet
|
| - RegREDX OpSet
|
| - Xmm_E_Operand OpUse
|
| - I_Operand OpUse
|
| -NaClExpVector[12] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %eax, ExprSet | ExprSize32 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %edx, ExprSet | ExprSize32 },
|
| - { OperandReference[1] , 2, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %rax, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0, ExprSize8 },
|
| - { OperandReference[1] , 3, ExprSize8 | ExprUnsignedInt },
|
| - { ExprConstant[0] , 0x1, ExprUsed | ExprSize8 | ExprUnsignedHex },
|
| -};
|
| -0000000000000000: 90 [P] dontcare
|
| - [hard coded] 386 PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: 66 90 [P] dontcare
|
| - [hard coded] 386 PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: 66 66 90 [P] dontcare %ax (suz), %ax (suz)
|
| - 90 - r0 386 OpcodePlusR OpcodeLockable OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o PartialInstruction
|
| - DontCare $r8v, $rAXv
|
| - G_OpcodeBase OpUse OpSet OperandZeroExtends_v
|
| - RegREAX OpUse OpSet OperandZeroExtends_v
|
| -NaClExpVector[4] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %ax, ExprSet | ExprUsed | ExprSize16 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %ax, ExprSet | ExprUsed | ExprSize16 },
|
| -};
|
| -0000000000000000: 8d 76 00 lea %esi, [%rsi]
|
| - 8d 386 ModRmModIsnt0x3 OpcodeUsesModRm OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o
|
| - Lea $Gv, $M
|
| - G_Operand OpSet OperandZeroExtends_v
|
| - M_Operand OpAddress
|
| -NaClExpVector[8] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %esi, ExprSet | ExprSize32 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprAddress | ExprSize64 },
|
| - { ExprRegister[0] , %rsi, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0x0, ExprSize8 | ExprSignedHex },
|
| -};
|
| -0000000000000000: 8d 74 26 00 lea %esi, [%rsi]
|
| - 8d 386 ModRmModIsnt0x3 OpcodeUsesModRm OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o
|
| - Lea $Gv, $M
|
| - G_Operand OpSet OperandZeroExtends_v
|
| - M_Operand OpAddress
|
| -NaClExpVector[8] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %esi, ExprSet | ExprSize32 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprAddress | ExprSize64 },
|
| - { ExprRegister[0] , %rsi, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0x0, ExprSize8 | ExprSignedHex },
|
| -};
|
| -0000000000000000: 8d b6 00 00 00 00 lea %esi, [%rsi]
|
| - 8d 386 ModRmModIsnt0x3 OpcodeUsesModRm OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o
|
| - Lea $Gv, $M
|
| - G_Operand OpSet OperandZeroExtends_v
|
| - M_Operand OpAddress
|
| -NaClExpVector[8] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %esi, ExprSet | ExprSize32 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprAddress | ExprSize64 },
|
| - { ExprRegister[0] , %rsi, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0x0, ExprSize32 | ExprSignedHex },
|
| -};
|
| -0000000000000000: 8d b4 26 00 00 00 00 lea %esi, [%rsi]
|
| - 8d 386 ModRmModIsnt0x3 OpcodeUsesModRm OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o
|
| - Lea $Gv, $M
|
| - G_Operand OpSet OperandZeroExtends_v
|
| - M_Operand OpAddress
|
| -NaClExpVector[8] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %esi, ExprSet | ExprSize32 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprAddress | ExprSize64 },
|
| - { ExprRegister[0] , %rsi, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0x0, ExprSize32 | ExprSignedHex },
|
| -};
|
| -0000000000000000: 89 f6 mov %esi, %esi
|
| - 89 386 OpcodeUsesModRm OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o
|
| - Mov $Ev, $Gv
|
| - E_Operand OpSet OperandZeroExtends_v
|
| - G_Operand OpUse
|
| -NaClExpVector[4] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %esi, ExprSet | ExprSize32 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %esi, ExprUsed | ExprSize32 },
|
| -};
|
| -0000000000000000: 8d bc 27 00 00 00 00 lea %edi, [%rdi]
|
| - 8d 386 ModRmModIsnt0x3 OpcodeUsesModRm OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o
|
| - Lea $Gv, $M
|
| - G_Operand OpSet OperandZeroExtends_v
|
| - M_Operand OpAddress
|
| -NaClExpVector[8] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %edi, ExprSet | ExprSize32 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprAddress | ExprSize64 },
|
| - { ExprRegister[0] , %rdi, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0x0, ExprSize32 | ExprSignedHex },
|
| -};
|
| -0000000000000000: 0f 1f 00 [P] dontcare
|
| - [hard coded] 386 PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: 0f 1f 40 00 [P] dontcare
|
| - [hard coded] 386 PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: 0f 1f 44 00 00 [P] dontcare
|
| - [hard coded] 386 PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: 66 0f 1f 44 00 00 [P] dontcare
|
| - [hard coded] 386 PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: 0f 1f 80 00 00 00 00 [P] dontcare
|
| - [hard coded] 386 PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: 0f 1f 84 00 00 00 00 00 [P] dontcare
|
| - [hard coded] 386 PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: 66 0f 1f 84 00 00 00 00 00 [P] dontcare
|
| - [hard coded] 386 PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: 66 2e 0f 1f 84 00 00 00 00 00 [P] dontcare
|
| - [hard coded] 386 PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: 66 66 2e 0f 1f 84 00 00 00 00 00 [P] dontcare
|
| - [hard coded] 386 PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: 66 66 66 2e 0f 1f 84 00 00 00 00 00 [P] dontcare
|
| - [hard coded] 386 PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 [P] dontcare
|
| - [hard coded] 386 PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 [P] dontcare
|
| - [hard coded] 386 PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: 66 66 66 66 66 66 2e 0f 1f 84 00 00 00 00 00 [P] dontcare
|
| - [hard coded] 386 PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: 41 ff 74 3f 20 push [%r15+%rdi*1+0x20]
|
| - ff / 6 386 OpcodeInModRm OpcodeUsesModRm OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o OperandSizeDefaultIs64
|
| - Push {%rsp}, $Ev
|
| - RegRSP OpUse OpSet OpImplicit
|
| - E_Operand OpUse
|
| -NaClExpVector[8] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt | ExprImplicit },
|
| - { ExprRegister[0] , %rsp, ExprSet | ExprUsed | ExprSize64 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %r15, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %rdi, ExprUsed | ExprSize64 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0x20, ExprSize8 | ExprSignedHex },
|
| -};
|
| -0000000000000000: 0f 0b [P] dontcare
|
| - [hard coded] 386 PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: 0f 70 00 00 [P] dontcare [%rax] (u), 0x0 (u)
|
| - 0f 70 MMX OpcodeUsesModRm OpcodeHasImmed_b PartialInstruction
|
| - DontCare $Qq, $Ib
|
| - Mmx_E_Operand OpUse
|
| - I_Operand OpUse
|
| -NaClExpVector[8] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %rax, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0, ExprSize8 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprConstant[0] , 0x0, ExprUsed | ExprSize8 | ExprUnsignedHex },
|
| -};
|
| -0000000000000000: 0f ae 38 [P] dontcare(illegal)
|
| - 0f ae / 7 SFENCE_CLFLUSH OpcodeInModRm ModRmModIsnt0x3 OpcodeUsesModRm NaClIllegal PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: 0f ae fc invalid
|
| - 0f ae / 7 / 4 INVALID OpcodeInModRm OpcodeInModRmRm ModRmModIs0x3 OpcodeUsesModRm NaClIllegal
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: 40 dc 20 [P] dontcare [%rax] (u)
|
| - dc / 4 X87 OpcodeInModRm ModRmModIsnt0x3 OpcodeUsesModRm PartialInstruction
|
| - DontCare $Mq
|
| - Mo_Operand OpUse
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %rax, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0, ExprSize8 },
|
| -};
|
| -0000000000000000: 0f ba 20 00 [P] dontcare [%rax] (u), 0x0 (u)
|
| - 0f ba / 4 386 OpcodeInModRm OpcodeUsesModRm OpcodeHasImmed_b OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o PartialInstruction
|
| - DontCare $Ev, $Ib
|
| - E_Operand OpUse
|
| - I_Operand OpUse
|
| -NaClExpVector[8] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %rax, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0, ExprSize8 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprConstant[0] , 0x0, ExprUsed | ExprSize8 | ExprUnsignedHex },
|
| -};
|
| -0000000000000000: 66 0f 3a 15 00 00 [P] dontcare [%rax] (s), 0x0 (u)
|
| - 66 0f 3a 15 SSE41 OpcodeUsesModRm OpcodeHasImmed_b OpcodeAllowsData16 SizeIgnoresData16 PartialInstruction
|
| - DontCare $Rd/Mw, $Ib
|
| - Ev_Operand OpSet
|
| - I_Operand OpUse
|
| -NaClExpVector[8] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprSet | ExprSize64 },
|
| - { ExprRegister[0] , %rax, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0, ExprSize8 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprConstant[0] , 0x0, ExprUsed | ExprSize8 | ExprUnsignedHex },
|
| -};
|
| -0000000000000000: 0f ec 00 [P] dontcare [%rax] (u)
|
| - 0f ec MMX OpcodeUsesModRm PartialInstruction
|
| - DontCare $Qq
|
| - Mmx_E_Operand OpUse
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %rax, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0, ExprSize8 },
|
| -};
|
| -0000000000000000: 0f f4 00 [P] dontcare [%rax] (u)
|
| - 0f f4 MMX OpcodeUsesModRm PartialInstruction
|
| - DontCare $Qq
|
| - Mmx_E_Operand OpUse
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %rax, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0, ExprSize8 },
|
| -};
|
| -0000000000001000: 40 e0 00 [P] dontcarecondjump %rip (s), %rcx (su), 0x1003 (u)
|
| - e0 386 OpcodeHasImmed OperandSize_b AddressSize_o ConditionalJump PartialInstruction
|
| - DontCareCondJump %rip, %rcx, $Jb
|
| - RegRIP OpSet
|
| - RegRCX OpUse OpSet
|
| - J_Operand OpUse OperandNear OperandRelative
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %rip, ExprSet | ExprSize64 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %rcx, ExprSet | ExprUsed | ExprSize64 },
|
| - { OperandReference[1] , 2, ExprSize8 | ExprUnsignedInt },
|
| - { ExprConstant[0] , 0x1003, ExprUsed | ExprSize8 | ExprSignedHex | ExprJumpTarget },
|
| -};
|
| -0000000000000000: 40 e3 00 [P] dontcarecondjump %rip (s), %rcx (u), 0x3 (u)
|
| - e3 386 OpcodeHasImmed OperandSize_b AddressSize_o ConditionalJump BranchHints PartialInstruction
|
| - DontCareCondJump %rip, %rcx, $Jb
|
| - RegRIP OpSet
|
| - RegRCX OpUse
|
| - J_Operand OpUse OperandNear OperandRelative
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %rip, ExprSet | ExprSize64 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %rcx, ExprUsed | ExprSize64 },
|
| - { OperandReference[1] , 2, ExprSize8 | ExprUnsignedInt },
|
| - { ExprConstant[0] , 0x3, ExprUsed | ExprSize8 | ExprSignedHex | ExprJumpTarget },
|
| -};
|
| -0000000000000000: 67 40 e3 00 [P] dontcarecondjump %rip (s), %ecx (u), 0x4 (u)
|
| - e3 386 OpcodeHasImmed OperandSize_b AddressSize_v ConditionalJump BranchHints PartialInstruction
|
| - DontCareCondJump %rip, %ecx, $Jb
|
| - RegRIP OpSet
|
| - RegECX OpUse
|
| - J_Operand OpUse OperandNear OperandRelative
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %rip, ExprSet | ExprSize64 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %ecx, ExprUsed | ExprSize32 },
|
| - { OperandReference[1] , 2, ExprSize8 | ExprUnsignedInt },
|
| - { ExprConstant[0] , 0x4, ExprUsed | ExprSize8 | ExprSignedHex | ExprJumpTarget },
|
| -};
|
| -0000000000000000: 41 d9 f0 [P] dontcare
|
| - d9 f0 X87 PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: 66 0f 52 invalid
|
| - 66 0f 52 INVALID OpcodeAllowsData16 SizeIgnoresData16 NaClIllegal
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: 66 0f 53 invalid
|
| - 66 0f 53 INVALID OpcodeAllowsData16 SizeIgnoresData16 NaClIllegal
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: f2 0f 52 invalid
|
| - f2 0f 52 INVALID OpcodeAllowsRepne NaClIllegal
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: f2 0f 53 invalid
|
| - f2 0f 53 INVALID OpcodeAllowsRepne NaClIllegal
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: 66 0f 78 00 00 00 [P] dontcare(illegal)
|
| - 66 0f 78 / 0 SSE4A OpcodeInModRm OpcodeUsesModRm OpcodeHasImmed_b OpcodeHasImmed2_b OpcodeAllowsData16 SizeIgnoresData16 NaClIllegal PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: 26 e8 00 01 02 03 call 0x3020106
|
| - e8 386 OpcodeHasImmed_v OperandSize_v OperandSize_o OperandSizeDefaultIs64 JumpInstruction
|
| - Call {%rip}, {%rsp}, $Jzd
|
| - RegRIP OpUse OpSet OpImplicit
|
| - RegRSP OpUse OpSet OpImplicit
|
| - J_Operand OpUse OperandNear OperandRelative
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt | ExprImplicit },
|
| - { ExprRegister[0] , %rip, ExprSet | ExprUsed | ExprSize64 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt | ExprImplicit },
|
| - { ExprRegister[0] , %rsp, ExprSet | ExprUsed | ExprSize64 },
|
| - { OperandReference[1] , 2, ExprSize8 | ExprUnsignedInt },
|
| - { ExprConstant[0] , 0x3020106, ExprUsed | ExprSize32 | ExprSignedHex | ExprJumpTarget },
|
| -};
|
| -0000000000000000: 0f a4 c6 01 [P] dontcare %esi (s), %eax (u), 0x1 (u)
|
| - 0f a4 386 OpcodeUsesModRm OpcodeHasImmed_b OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o PartialInstruction
|
| - DontCare $Ev, $Gv, $Ib
|
| - E_Operand OpSet
|
| - G_Operand OpUse
|
| - I_Operand OpUse
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %esi, ExprSet | ExprSize32 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %eax, ExprUsed | ExprSize32 },
|
| - { OperandReference[1] , 2, ExprSize8 | ExprUnsignedInt },
|
| - { ExprConstant[0] , 0x1, ExprUsed | ExprSize8 | ExprUnsignedHex },
|
| -};
|
| -0000000000000000: 0f a5 c6 [P] dontcare %esi (s), %eax (u), %cl (u)
|
| - 0f a5 386 OpcodeUsesModRm OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o PartialInstruction
|
| - DontCare $Ev, $Gv, %cl
|
| - E_Operand OpSet
|
| - G_Operand OpUse
|
| - RegCL OpUse
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %esi, ExprSet | ExprSize32 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %eax, ExprUsed | ExprSize32 },
|
| - { OperandReference[1] , 2, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %cl, ExprUsed | ExprSize8 },
|
| -};
|
| -0000000000000000: 48 0f a5 c6 [P] dontcare %rsi (s), %rax (u), %cl (u)
|
| - 0f a5 386 OpcodeUsesModRm OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o PartialInstruction
|
| - DontCare $Ev, $Gv, %cl
|
| - E_Operand OpSet
|
| - G_Operand OpUse
|
| - RegCL OpUse
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %rsi, ExprSet | ExprSize64 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %rax, ExprUsed | ExprSize64 },
|
| - { OperandReference[1] , 2, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %cl, ExprUsed | ExprSize8 },
|
| -};
|
| -0000000000000000: 0f 16 d1 [P] dontcare %xmm1 (u)
|
| - 0f 16 SSE ModRmModIs0x3 OpcodeUsesModRm PartialInstruction
|
| - DontCare $VRq
|
| - Xmm_E_Operand OpUse
|
| -NaClExpVector[2] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %xmm1, ExprUsed },
|
| -};
|
| -0000000000000000: 0f 16 a5 00 00 00 00 [P] dontcare [%rbp] (u)
|
| - 0f 16 SSE ModRmModIsnt0x3 OpcodeUsesModRm PartialInstruction
|
| - DontCare $Mq
|
| - Mo_Operand OpUse
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %rbp, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0x0, ExprSize32 | ExprSignedHex },
|
| -};
|
| -0000000000000000: 0f 12 e8 [P] dontcare %xmm0 (u)
|
| - 0f 12 SSE ModRmModIs0x3 OpcodeUsesModRm PartialInstruction
|
| - DontCare $VRq
|
| - Xmm_E_Operand OpUse
|
| -NaClExpVector[2] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %xmm0, ExprUsed },
|
| -};
|
| -0000000000000000: 0f 12 0c 17 [P] dontcare [%rdi+%rdx*1] (u)
|
| - 0f 12 SSE ModRmModIsnt0x3 OpcodeUsesModRm PartialInstruction
|
| - DontCare $Mq
|
| - Mo_Operand OpUse
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %rdi, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %rdx, ExprUsed | ExprSize64 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0, ExprSize8 },
|
| -};
|
| -0000000000000000: 41 0f 12 0c 17 [P] dontcare [%r15+%rdx*1] (u)
|
| - 0f 12 SSE ModRmModIsnt0x3 OpcodeUsesModRm PartialInstruction
|
| - DontCare $Mq
|
| - Mo_Operand OpUse
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %r15, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %rdx, ExprUsed | ExprSize64 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0, ExprSize8 },
|
| -};
|
| -0000000000000000: 0f c6 d2 00 [P] dontcare %xmm2 (u), 0x0 (u)
|
| - 0f c6 SSE OpcodeUsesModRm OpcodeHasImmed_b PartialInstruction
|
| - DontCare $Wps, $Ib
|
| - Xmm_E_Operand OpUse
|
| - I_Operand OpUse
|
| -NaClExpVector[4] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %xmm2, ExprUsed },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprConstant[0] , 0x0, ExprUsed | ExprSize8 | ExprUnsignedHex },
|
| -};
|
| -0000000000000000: 66 0f c6 d2 00 [P] dontcare %xmm2 (u), 0x0 (u)
|
| - 66 0f c6 SSE2 OpcodeUsesModRm OpcodeHasImmed_b OpcodeAllowsData16 SizeIgnoresData16 PartialInstruction
|
| - DontCare $Wpd, $Ib
|
| - Xmm_E_Operand OpUse
|
| - I_Operand OpUse
|
| -NaClExpVector[4] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %xmm2, ExprUsed },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprConstant[0] , 0x0, ExprUsed | ExprSize8 | ExprUnsignedHex },
|
| -};
|
| -0000000000000000: 66 43 0f be 04 27 [P] dontcare %ax (sz), [%r15+%r12*1] (u)
|
| - 0f be 386 OpcodeUsesModRm OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o PartialInstruction
|
| - DontCare $Gv, $Eb
|
| - G_Operand OpSet OperandZeroExtends_v
|
| - Eb_Operand OpUse
|
| -NaClExpVector[8] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %ax, ExprSet | ExprSize16 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %r15, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %r12, ExprUsed | ExprSize64 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0, ExprSize8 },
|
| -};
|
| -0000000000000000: 0f 30 [P] dontcare(illegal)
|
| - 0f 30 RDMSR NaClIllegal PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: 0f 31 [P] dontcare %eax (s), %edx (s)
|
| - 0f 31 RDTSC PartialInstruction
|
| - DontCare %eax, %edx
|
| - RegEAX OpSet
|
| - RegEDX OpSet
|
| -NaClExpVector[4] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %eax, ExprSet | ExprSize32 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %edx, ExprSet | ExprSize32 },
|
| -};
|
| -0000000000000000: 0f 32 [P] dontcare(illegal)
|
| - 0f 32 RDMSR NaClIllegal PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: 48 0f ac c1 10 [P] dontcare %rcx (su), %rax (u), 0x10 (u)
|
| - 0f ac 386 OpcodeUsesModRm OpcodeHasImmed_b OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o PartialInstruction
|
| - DontCare $Ev, $Gv, $Ib
|
| - E_Operand OpUse OpSet
|
| - G_Operand OpUse
|
| - I_Operand OpUse
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %rcx, ExprSet | ExprUsed | ExprSize64 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %rax, ExprUsed | ExprSize64 },
|
| - { OperandReference[1] , 2, ExprSize8 | ExprUnsignedInt },
|
| - { ExprConstant[0] , 0x10, ExprUsed | ExprSize8 | ExprUnsignedHex },
|
| -};
|
| -0000000000000000: 0f ac c1 10 [P] dontcare %ecx (su), %eax (u), 0x10 (u)
|
| - 0f ac 386 OpcodeUsesModRm OpcodeHasImmed_b OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o PartialInstruction
|
| - DontCare $Ev, $Gv, $Ib
|
| - E_Operand OpUse OpSet
|
| - G_Operand OpUse
|
| - I_Operand OpUse
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %ecx, ExprSet | ExprUsed | ExprSize32 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %eax, ExprUsed | ExprSize32 },
|
| - { OperandReference[1] , 2, ExprSize8 | ExprUnsignedInt },
|
| - { ExprConstant[0] , 0x10, ExprUsed | ExprSize8 | ExprUnsignedHex },
|
| -};
|
| -0000000000000000: 0f ad 45 bc [P] dontcare [%rbp-0x44] (su), %eax (u), %cl (u)
|
| - 0f ad 386 OpcodeUsesModRm OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o PartialInstruction
|
| - DontCare $Ev, $Gv, %cl
|
| - E_Operand OpUse OpSet
|
| - G_Operand OpUse
|
| - RegCL OpUse
|
| -NaClExpVector[10] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprSet | ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %rbp, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , -0x44, ExprSize8 | ExprSignedHex },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %eax, ExprUsed | ExprSize32 },
|
| - { OperandReference[1] , 2, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %cl, ExprUsed | ExprSize8 },
|
| -};
|
| -0000000000000000: 48 0f ad 45 bc [P] dontcare [%rbp-0x44] (su), %rax (u), %cl (u)
|
| - 0f ad 386 OpcodeUsesModRm OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o PartialInstruction
|
| - DontCare $Ev, $Gv, %cl
|
| - E_Operand OpUse OpSet
|
| - G_Operand OpUse
|
| - RegCL OpUse
|
| -NaClExpVector[10] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprSet | ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %rbp, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , -0x44, ExprSize8 | ExprSignedHex },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %rax, ExprUsed | ExprSize64 },
|
| - { OperandReference[1] , 2, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %cl, ExprUsed | ExprSize8 },
|
| -};
|
| -0000000000000000: 8c 00 [P] dontcare(illegal)
|
| - 8c 386 ModRmRegSOperand OpcodeUsesModRm OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o NaClIllegal PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: 64 48 8e 00 [P] dontcare(illegal)
|
| - 8e 386 ModRmRegSOperand OpcodeUsesModRm NaClIllegal PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: 26 64 65 00 01 add %gs:[%rcx], %al
|
| - 00 386 OpcodeUsesModRm OpcodeLockable OperandSize_b
|
| - Add $Eb, $Gb
|
| - E_Operand OpUse OpSet
|
| - G_Operand OpUse
|
| -NaClExpVector[10] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprSegmentAddress[2] , 0, ExprSet | ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %gs, ExprUsed | ExprSize16 },
|
| - { ExprMemOffset[4] , 0, ExprSize64 },
|
| - { ExprRegister[0] , %rcx, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0, ExprSize8 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %al, ExprUsed | ExprSize8 },
|
| -};
|
| -0000000000000000: 0f a3 00 [P] dontcare(illegal)
|
| - 0f a3 386 OpcodeUsesModRm OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o NaClIllegal PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: 0f a3 04 00 [P] dontcare(illegal)
|
| - 0f a3 386 OpcodeUsesModRm OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o NaClIllegal PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: 0f a3 80 00 01 02 03 [P] dontcare(illegal)
|
| - 0f a3 386 OpcodeUsesModRm OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o NaClIllegal PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: 36 64 6f [P] dontcare(illegal)
|
| - 6f 386 OpcodeAllowsRep OperandSize_v OperandSize_o NaClIllegal PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: 64 40 a0 00 01 02 03 04 05 06 07 mov %al, %fs:[0x706050403020100]
|
| - a0 386 OpcodeHasImmed_Addr OperandSize_b
|
| - Mov %al, $Ob
|
| - RegAL OpSet
|
| - O_Operand OpUse
|
| -NaClExpVector[10] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %al, ExprSet | ExprSize8 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprSegmentAddress[2] , 0, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %fs, ExprUsed | ExprSize16 },
|
| - { ExprMemOffset[4] , 0, ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0x706050403020100, ExprSize64 | ExprUnsignedHex },
|
| -};
|
| -0000000000000000: 0f 01 c8 [P] dontcare(illegal)
|
| - 0f 01 / 1 / 0 SYSTEM OpcodeInModRm OpcodeInModRmRm ModRmModIs0x3 OpcodeUsesModRm NaClIllegal PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: 0f 01 c9 [P] dontcare(illegal)
|
| - 0f 01 / 1 / 1 SYSTEM OpcodeInModRm OpcodeInModRmRm ModRmModIs0x3 OpcodeUsesModRm NaClIllegal PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: 0f 01 f8 [P] dontcare(illegal)
|
| - 0f 01 / 7 / 0 SYSTEM OpcodeInModRm OpcodeInModRmRm ModRmModIs0x3 OpcodeUsesModRm NaClIllegal LongMode PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: 0f 01 f9 [P] dontcare(illegal)
|
| - 0f 01 / 7 / 1 RDTSCP OpcodeInModRm OpcodeInModRmRm ModRmModIs0x3 OpcodeUsesModRm NaClIllegal PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: 0f 01 d8 [P] dontcare(illegal)
|
| - 0f 01 / 3 / 0 SVM OpcodeInModRm OpcodeInModRmRm ModRmModIs0x3 OpcodeUsesModRm NaClIllegal PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: 0f 01 d9 [P] dontcare(illegal)
|
| - 0f 01 / 3 / 1 SVM OpcodeInModRm OpcodeInModRmRm ModRmModIs0x3 OpcodeUsesModRm NaClIllegal PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: 0f 01 da [P] dontcare(illegal)
|
| - 0f 01 / 3 / 2 SVM OpcodeInModRm OpcodeInModRmRm ModRmModIs0x3 OpcodeUsesModRm NaClIllegal PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: 0f 01 db [P] dontcare(illegal)
|
| - 0f 01 / 3 / 3 SVM OpcodeInModRm OpcodeInModRmRm ModRmModIs0x3 OpcodeUsesModRm NaClIllegal PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: 0f 01 dc [P] dontcare(illegal)
|
| - 0f 01 / 3 / 4 SVM OpcodeInModRm OpcodeInModRmRm ModRmModIs0x3 OpcodeUsesModRm NaClIllegal PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: 0f 01 dd [P] dontcare(illegal)
|
| - 0f 01 / 3 / 5 SVM OpcodeInModRm OpcodeInModRmRm ModRmModIs0x3 OpcodeUsesModRm NaClIllegal PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: 0f 01 de [P] dontcare(illegal)
|
| - 0f 01 / 3 / 6 SVM OpcodeInModRm OpcodeInModRmRm ModRmModIs0x3 OpcodeUsesModRm NaClIllegal PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: 0f 01 df [P] dontcare(illegal)
|
| - 0f 01 / 3 / 7 SVM OpcodeInModRm OpcodeInModRmRm ModRmModIs0x3 OpcodeUsesModRm NaClIllegal PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: 0f 20 c0 [P] dontcare(illegal)
|
| - 0f 20 SYSTEM ModRmModIs0x3 OpcodeUsesModRm NaClIllegal PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: 0f 21 f3 [P] dontcare(illegal)
|
| - 0f 21 SYSTEM ModRmModIs0x3 OpcodeUsesModRm NaClIllegal PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: 0f 22 cd [P] dontcare(illegal)
|
| - 0f 22 SYSTEM ModRmModIs0x3 OpcodeUsesModRm NaClIllegal PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: 0f 23 dd [P] dontcare(illegal)
|
| - 0f 23 SYSTEM ModRmModIs0x3 OpcodeUsesModRm NaClIllegal PartialInstruction
|
| - DontCare
|
| -NaClExpVector[0] = {
|
| -};
|
| -0000000000000000: 0f 0f 00 00 invalid %mmx0, [%rax], 0x0
|
| - 0f 0f INVALID Opcode0F0F OpcodeUsesModRm OpcodeHasImmed_b NaClIllegal
|
| - Invalid $Pq, $Qq, $Ib
|
| - Mmx_G_Operand
|
| - Mmx_E_Operand
|
| - I_Operand
|
| -NaClExpVector[10] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %mmx0, 0 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprSize64 },
|
| - { ExprRegister[0] , %rax, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0, ExprSize8 },
|
| - { OperandReference[1] , 2, ExprSize8 | ExprUnsignedInt },
|
| - { ExprConstant[0] , 0x0, ExprSize8 | ExprUnsignedHex },
|
| -};
|
| -0000000000000000: 0f 0f 00 90 [P] dontcare [%rax] (u)
|
| - 0f 0f 90 3DNOW OpcodeUsesModRm PartialInstruction
|
| - DontCare $Qq
|
| - Mmx_E_Operand OpUse
|
| -NaClExpVector[6] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %rax, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0, ExprSize8 },
|
| -};
|
| -0000000000000000: 8d bf 00 00 00 00 lea %edi, [%rdi]
|
| - 8d 386 ModRmModIsnt0x3 OpcodeUsesModRm OpcodeAllowsData16 OperandSize_w OperandSize_v OperandSize_o
|
| - Lea $Gv, $M
|
| - G_Operand OpSet OperandZeroExtends_v
|
| - M_Operand OpAddress
|
| -NaClExpVector[8] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %edi, ExprSet | ExprSize32 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprAddress | ExprSize64 },
|
| - { ExprRegister[0] , %rdi, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0x0, ExprSize32 | ExprSignedHex },
|
| -};
|
| -0000000000000000: eb 1d [P] dontcarejump %rip (s), 0x1f (u)
|
| - eb 386 OpcodeHasImmed OperandSize_b JumpInstruction PartialInstruction
|
| - DontCareJump %rip, $Jb
|
| - RegRIP OpSet
|
| - J_Operand OpUse OperandNear OperandRelative
|
| -NaClExpVector[4] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %rip, ExprSet | ExprSize64 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprConstant[0] , 0x1f, ExprUsed | ExprSize8 | ExprSignedHex | ExprJumpTarget },
|
| -};
|
| -0000000000000000: f0 0f c7 08 [P] dontcare %edx (su), %eax (su), [%rax] (su)
|
| - 0f c7 / 1 CMPXCHG8B OpcodeInModRm ModRmModIsnt0x3 OpcodeUsesModRm OpcodeLockable OperandSize_v PartialInstruction
|
| - DontCare %edx, %eax, $Mq
|
| - RegEDX OpUse OpSet
|
| - RegEAX OpUse OpSet
|
| - Mo_Operand OpUse OpSet
|
| -NaClExpVector[10] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %edx, ExprSet | ExprUsed | ExprSize32 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %eax, ExprSet | ExprUsed | ExprSize32 },
|
| - { OperandReference[1] , 2, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprSet | ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %rax, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0, ExprSize8 },
|
| -};
|
| -0000000000000000: 48 f0 0f c7 08 [P] dontcare %rdx (su), %eax (su), [%rax] (su)
|
| - 0f c7 / 1 CMPXCHG16B OpcodeInModRm ModRmModIsnt0x3 OpcodeUsesModRm OpcodeLockable OperandSize_o PartialInstruction
|
| - DontCare %rdx, %eax, $Mdq
|
| - RegRDX OpUse OpSet
|
| - RegEAX OpUse OpSet
|
| - Mdq_Operand OpUse OpSet
|
| -NaClExpVector[10] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %rdx, ExprSet | ExprUsed | ExprSize64 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %eax, ExprSet | ExprUsed | ExprSize32 },
|
| - { OperandReference[1] , 2, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprSet | ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %rax, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0, ExprSize8 },
|
| -};
|
| -0000000000000000: f0 48 0f c7 08 [P] dontcare %rdx (su), %eax (su), [%rax] (su)
|
| - 0f c7 / 1 CMPXCHG16B OpcodeInModRm ModRmModIsnt0x3 OpcodeUsesModRm OpcodeLockable OperandSize_o PartialInstruction
|
| - DontCare %rdx, %eax, $Mdq
|
| - RegRDX OpUse OpSet
|
| - RegEAX OpUse OpSet
|
| - Mdq_Operand OpUse OpSet
|
| -NaClExpVector[10] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %rdx, ExprSet | ExprUsed | ExprSize64 },
|
| - { OperandReference[1] , 1, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %eax, ExprSet | ExprUsed | ExprSize32 },
|
| - { OperandReference[1] , 2, ExprSize8 | ExprUnsignedInt },
|
| - { ExprMemOffset[4] , 0, ExprSet | ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %rax, ExprUsed | ExprSize64 },
|
| - { ExprRegister[0] , %unknown, 0 },
|
| - { ExprConstant[0] , 1, ExprSize8 },
|
| - { ExprConstant[0] , 0, ExprSize8 },
|
| -};
|
| -0000000000000000: 66 48 0f 7e c6 [P] dontcare %rsi (s)
|
| - 66 0f 7e SSE2 OpcodeUsesModRm OpcodeAllowsData16 SizeIgnoresData16 OperandSize_o PartialInstruction
|
| - DontCare $Ed/q/q
|
| - E_Operand OpSet
|
| -NaClExpVector[2] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %rsi, ExprSet | ExprSize64 },
|
| -};
|
| -0000000000000000: 48 0f 7e c6 [P] dontcare %rsi (s)
|
| - 0f 7e MMX OpcodeUsesModRm SizeIgnoresData16 OperandSize_o PartialInstruction
|
| - DontCare $Ed/q/q
|
| - E_Operand OpSet
|
| -NaClExpVector[2] = {
|
| - { OperandReference[1] , 0, ExprSize8 | ExprUnsignedInt },
|
| - { ExprRegister[0] , %rsi, ExprSet | ExprSize64 },
|
| -};
|
|
|
Chromium Code Reviews
Issue 625923004:
Delete old x86 validator. (Closed)
Base URL: svn://svn.chromium.org/native_client/trunk/src/native_client