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Unified Diff: tests_lit/llvm2ice_tests/address-mode-opt.ll

Issue 622113002: Handle GPR and vector shift ops. Handle pmull also. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: test encodings Created 6 years, 2 months ago
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Index: tests_lit/llvm2ice_tests/address-mode-opt.ll
diff --git a/tests_lit/llvm2ice_tests/address-mode-opt.ll b/tests_lit/llvm2ice_tests/address-mode-opt.ll
index ba42d650f4af7db83bfb084f501b4a389afc3689..68538e06b2075780f56dbb60461958bfdb766ddc 100644
--- a/tests_lit/llvm2ice_tests/address-mode-opt.ll
+++ b/tests_lit/llvm2ice_tests/address-mode-opt.ll
@@ -3,6 +3,10 @@
; RUN: %p2i -i %s --args -O2 --verbose none \
; RUN: | llvm-mc -triple=i686-none-nacl -x86-asm-syntax=intel -filetype=obj \
; RUN: | llvm-objdump -d --symbolize -x86-asm-syntax=intel - | FileCheck %s
+; RUN: %p2i -i %s --args -O2 -mattr=sse4.1 --verbose none \
+; RUN: | llvm-mc -triple=i686-none-nacl -x86-asm-syntax=intel -filetype=obj \
+; RUN: | llvm-objdump -d --symbolize -x86-asm-syntax=intel - \
+; RUN: | FileCheck --check-prefix=SSE41 %s
; RUN: %p2i -i %s --args --verbose none | FileCheck --check-prefix=ERRORS %s
define float @load_arg_plus_200000(float* %arg) {
@@ -49,6 +53,32 @@ entry:
; CHECK: movss xmm0, dword ptr [e{{..}}]
}
+define <8 x i16> @load_mul_v8i16_mem(<8 x i16> %arg0, i32 %arg1_iptr) {
+entry:
+ %addr_sub = sub i32 %arg1_iptr, 200000
+ %addr_ptr = inttoptr i32 %addr_sub to <8 x i16>*
+ %arg1 = load <8 x i16>* %addr_ptr, align 2
+ %res_vec = mul <8 x i16> %arg0, %arg1
+ ret <8 x i16> %res_vec
+; CHECK-LABEL: load_mul_v8i16_mem:
+; CHECK: pmullw xmm{{.*}}, xmmword ptr [e{{.*}} - 200000]
+}
+
+define <4 x i32> @load_mul_v4i32_mem(<4 x i32> %arg0, i32 %arg1_iptr) {
+entry:
+ %addr_sub = sub i32 %arg1_iptr, 200000
+ %addr_ptr = inttoptr i32 %addr_sub to <4 x i32>*
+ %arg1 = load <4 x i32>* %addr_ptr, align 4
+ %res = mul <4 x i32> %arg0, %arg1
+ ret <4 x i32> %res
+; CHECK-LABEL: load_mul_v4i32_mem:
+; CHECK: pmuludq xmm{{.*}}, xmmword ptr [e{{.*}} - 200000]
+; CHECK: pmuludq
+;
+; SSE41-LABEL: load_mul_v4i32_mem:
+; SSE41: pmulld xmm{{.*}}, xmmword ptr [e{{.*}} - 200000]
+}
+
define float @address_mode_opt_chaining(float* %arg) {
entry:
%arg.int = ptrtoint float* %arg to i32
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