Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(545)

Unified Diff: tests_lit/llvm2ice_tests/nacl-other-intrinsics.ll

Issue 622113002: Handle GPR and vector shift ops. Handle pmull also. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: test encodings Created 6 years, 2 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View side-by-side diff with in-line comments
Download patch
« no previous file with comments | « tests_lit/llvm2ice_tests/address-mode-opt.ll ('k') | tests_lit/llvm2ice_tests/vector-arith.ll » ('j') | no next file with comments »
Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
Index: tests_lit/llvm2ice_tests/nacl-other-intrinsics.ll
diff --git a/tests_lit/llvm2ice_tests/nacl-other-intrinsics.ll b/tests_lit/llvm2ice_tests/nacl-other-intrinsics.ll
index e8bbb30bc170f315a6a215de7bf5ab3c11ca4e32..f1fc459b4263bb2267086cf99e2875601f67d0da 100644
--- a/tests_lit/llvm2ice_tests/nacl-other-intrinsics.ll
+++ b/tests_lit/llvm2ice_tests/nacl-other-intrinsics.ll
@@ -326,7 +326,9 @@ entry:
ret i32 %r_zext
}
; CHECK-LABEL: test_bswap_16
-; CHECK: rol {{.*}}, 8
+; Make sure this is the right operand size so that the most significant bit
+; to least significant bit rotation happens at the right boundary.
+; CHECK: rol {{[abcd]x|si|di|bp|word ptr}}, 8
define i32 @test_bswap_32(i32 %x) {
entry:
« no previous file with comments | « tests_lit/llvm2ice_tests/address-mode-opt.ll ('k') | tests_lit/llvm2ice_tests/vector-arith.ll » ('j') | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698