Index: src/compiler/instruction-codes.h |
diff --git a/src/compiler/instruction-codes.h b/src/compiler/instruction-codes.h |
index 4b7fe679e9a974aa8dee4013575d741f6bd6218e..0abed6c32181217e7d636d6dcee67b040297fce2 100644 |
--- a/src/compiler/instruction-codes.h |
+++ b/src/compiler/instruction-codes.h |
@@ -5,6 +5,8 @@ |
#ifndef V8_COMPILER_INSTRUCTION_CODES_H_ |
#define V8_COMPILER_INSTRUCTION_CODES_H_ |
+#include <iosfwd> |
+ |
#if V8_TARGET_ARCH_ARM |
#include "src/compiler/arm/instruction-codes-arm.h" |
#elif V8_TARGET_ARCH_ARM64 |
@@ -21,9 +23,6 @@ |
namespace v8 { |
namespace internal { |
- |
-class OStream; |
- |
namespace compiler { |
// Target-specific opcodes that specify which assembly sequence to emit. |
@@ -46,7 +45,7 @@ enum ArchOpcode { |
#undef COUNT_ARCH_OPCODE |
}; |
-OStream& operator<<(OStream& os, const ArchOpcode& ao); |
+std::ostream& operator<<(std::ostream& os, const ArchOpcode& ao); |
// Addressing modes represent the "shape" of inputs to an instruction. |
// Many instructions support multiple addressing modes. Addressing modes |
@@ -65,12 +64,12 @@ enum AddressingMode { |
#undef COUNT_ADDRESSING_MODE |
}; |
-OStream& operator<<(OStream& os, const AddressingMode& am); |
+std::ostream& operator<<(std::ostream& os, const AddressingMode& am); |
// The mode of the flags continuation (see below). |
enum FlagsMode { kFlags_none = 0, kFlags_branch = 1, kFlags_set = 2 }; |
-OStream& operator<<(OStream& os, const FlagsMode& fm); |
+std::ostream& operator<<(std::ostream& os, const FlagsMode& fm); |
// The condition of flags continuation (see below). |
enum FlagsCondition { |
@@ -94,7 +93,7 @@ enum FlagsCondition { |
kNotOverflow |
}; |
-OStream& operator<<(OStream& os, const FlagsCondition& fc); |
+std::ostream& operator<<(std::ostream& os, const FlagsCondition& fc); |
// The InstructionCode is an opaque, target-specific integer that encodes |
// what code to emit for an instruction in the code generator. It is not |