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1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #ifndef V8_COMPILER_INSTRUCTION_CODES_H_ | 5 #ifndef V8_COMPILER_INSTRUCTION_CODES_H_ |
6 #define V8_COMPILER_INSTRUCTION_CODES_H_ | 6 #define V8_COMPILER_INSTRUCTION_CODES_H_ |
7 | 7 |
| 8 #include <iosfwd> |
| 9 |
8 #if V8_TARGET_ARCH_ARM | 10 #if V8_TARGET_ARCH_ARM |
9 #include "src/compiler/arm/instruction-codes-arm.h" | 11 #include "src/compiler/arm/instruction-codes-arm.h" |
10 #elif V8_TARGET_ARCH_ARM64 | 12 #elif V8_TARGET_ARCH_ARM64 |
11 #include "src/compiler/arm64/instruction-codes-arm64.h" | 13 #include "src/compiler/arm64/instruction-codes-arm64.h" |
12 #elif V8_TARGET_ARCH_IA32 | 14 #elif V8_TARGET_ARCH_IA32 |
13 #include "src/compiler/ia32/instruction-codes-ia32.h" | 15 #include "src/compiler/ia32/instruction-codes-ia32.h" |
14 #elif V8_TARGET_ARCH_X64 | 16 #elif V8_TARGET_ARCH_X64 |
15 #include "src/compiler/x64/instruction-codes-x64.h" | 17 #include "src/compiler/x64/instruction-codes-x64.h" |
16 #else | 18 #else |
17 #define TARGET_ARCH_OPCODE_LIST(V) | 19 #define TARGET_ARCH_OPCODE_LIST(V) |
18 #define TARGET_ADDRESSING_MODE_LIST(V) | 20 #define TARGET_ADDRESSING_MODE_LIST(V) |
19 #endif | 21 #endif |
20 #include "src/utils.h" | 22 #include "src/utils.h" |
21 | 23 |
22 namespace v8 { | 24 namespace v8 { |
23 namespace internal { | 25 namespace internal { |
24 | |
25 class OStream; | |
26 | |
27 namespace compiler { | 26 namespace compiler { |
28 | 27 |
29 // Target-specific opcodes that specify which assembly sequence to emit. | 28 // Target-specific opcodes that specify which assembly sequence to emit. |
30 // Most opcodes specify a single instruction. | 29 // Most opcodes specify a single instruction. |
31 #define ARCH_OPCODE_LIST(V) \ | 30 #define ARCH_OPCODE_LIST(V) \ |
32 V(ArchCallCodeObject) \ | 31 V(ArchCallCodeObject) \ |
33 V(ArchCallJSFunction) \ | 32 V(ArchCallJSFunction) \ |
34 V(ArchJmp) \ | 33 V(ArchJmp) \ |
35 V(ArchNop) \ | 34 V(ArchNop) \ |
36 V(ArchRet) \ | 35 V(ArchRet) \ |
37 V(ArchTruncateDoubleToI) \ | 36 V(ArchTruncateDoubleToI) \ |
38 TARGET_ARCH_OPCODE_LIST(V) | 37 TARGET_ARCH_OPCODE_LIST(V) |
39 | 38 |
40 enum ArchOpcode { | 39 enum ArchOpcode { |
41 #define DECLARE_ARCH_OPCODE(Name) k##Name, | 40 #define DECLARE_ARCH_OPCODE(Name) k##Name, |
42 ARCH_OPCODE_LIST(DECLARE_ARCH_OPCODE) | 41 ARCH_OPCODE_LIST(DECLARE_ARCH_OPCODE) |
43 #undef DECLARE_ARCH_OPCODE | 42 #undef DECLARE_ARCH_OPCODE |
44 #define COUNT_ARCH_OPCODE(Name) +1 | 43 #define COUNT_ARCH_OPCODE(Name) +1 |
45 kLastArchOpcode = -1 ARCH_OPCODE_LIST(COUNT_ARCH_OPCODE) | 44 kLastArchOpcode = -1 ARCH_OPCODE_LIST(COUNT_ARCH_OPCODE) |
46 #undef COUNT_ARCH_OPCODE | 45 #undef COUNT_ARCH_OPCODE |
47 }; | 46 }; |
48 | 47 |
49 OStream& operator<<(OStream& os, const ArchOpcode& ao); | 48 std::ostream& operator<<(std::ostream& os, const ArchOpcode& ao); |
50 | 49 |
51 // Addressing modes represent the "shape" of inputs to an instruction. | 50 // Addressing modes represent the "shape" of inputs to an instruction. |
52 // Many instructions support multiple addressing modes. Addressing modes | 51 // Many instructions support multiple addressing modes. Addressing modes |
53 // are encoded into the InstructionCode of the instruction and tell the | 52 // are encoded into the InstructionCode of the instruction and tell the |
54 // code generator after register allocation which assembler method to call. | 53 // code generator after register allocation which assembler method to call. |
55 #define ADDRESSING_MODE_LIST(V) \ | 54 #define ADDRESSING_MODE_LIST(V) \ |
56 V(None) \ | 55 V(None) \ |
57 TARGET_ADDRESSING_MODE_LIST(V) | 56 TARGET_ADDRESSING_MODE_LIST(V) |
58 | 57 |
59 enum AddressingMode { | 58 enum AddressingMode { |
60 #define DECLARE_ADDRESSING_MODE(Name) kMode_##Name, | 59 #define DECLARE_ADDRESSING_MODE(Name) kMode_##Name, |
61 ADDRESSING_MODE_LIST(DECLARE_ADDRESSING_MODE) | 60 ADDRESSING_MODE_LIST(DECLARE_ADDRESSING_MODE) |
62 #undef DECLARE_ADDRESSING_MODE | 61 #undef DECLARE_ADDRESSING_MODE |
63 #define COUNT_ADDRESSING_MODE(Name) +1 | 62 #define COUNT_ADDRESSING_MODE(Name) +1 |
64 kLastAddressingMode = -1 ADDRESSING_MODE_LIST(COUNT_ADDRESSING_MODE) | 63 kLastAddressingMode = -1 ADDRESSING_MODE_LIST(COUNT_ADDRESSING_MODE) |
65 #undef COUNT_ADDRESSING_MODE | 64 #undef COUNT_ADDRESSING_MODE |
66 }; | 65 }; |
67 | 66 |
68 OStream& operator<<(OStream& os, const AddressingMode& am); | 67 std::ostream& operator<<(std::ostream& os, const AddressingMode& am); |
69 | 68 |
70 // The mode of the flags continuation (see below). | 69 // The mode of the flags continuation (see below). |
71 enum FlagsMode { kFlags_none = 0, kFlags_branch = 1, kFlags_set = 2 }; | 70 enum FlagsMode { kFlags_none = 0, kFlags_branch = 1, kFlags_set = 2 }; |
72 | 71 |
73 OStream& operator<<(OStream& os, const FlagsMode& fm); | 72 std::ostream& operator<<(std::ostream& os, const FlagsMode& fm); |
74 | 73 |
75 // The condition of flags continuation (see below). | 74 // The condition of flags continuation (see below). |
76 enum FlagsCondition { | 75 enum FlagsCondition { |
77 kEqual, | 76 kEqual, |
78 kNotEqual, | 77 kNotEqual, |
79 kSignedLessThan, | 78 kSignedLessThan, |
80 kSignedGreaterThanOrEqual, | 79 kSignedGreaterThanOrEqual, |
81 kSignedLessThanOrEqual, | 80 kSignedLessThanOrEqual, |
82 kSignedGreaterThan, | 81 kSignedGreaterThan, |
83 kUnsignedLessThan, | 82 kUnsignedLessThan, |
84 kUnsignedGreaterThanOrEqual, | 83 kUnsignedGreaterThanOrEqual, |
85 kUnsignedLessThanOrEqual, | 84 kUnsignedLessThanOrEqual, |
86 kUnsignedGreaterThan, | 85 kUnsignedGreaterThan, |
87 kUnorderedEqual, | 86 kUnorderedEqual, |
88 kUnorderedNotEqual, | 87 kUnorderedNotEqual, |
89 kUnorderedLessThan, | 88 kUnorderedLessThan, |
90 kUnorderedGreaterThanOrEqual, | 89 kUnorderedGreaterThanOrEqual, |
91 kUnorderedLessThanOrEqual, | 90 kUnorderedLessThanOrEqual, |
92 kUnorderedGreaterThan, | 91 kUnorderedGreaterThan, |
93 kOverflow, | 92 kOverflow, |
94 kNotOverflow | 93 kNotOverflow |
95 }; | 94 }; |
96 | 95 |
97 OStream& operator<<(OStream& os, const FlagsCondition& fc); | 96 std::ostream& operator<<(std::ostream& os, const FlagsCondition& fc); |
98 | 97 |
99 // The InstructionCode is an opaque, target-specific integer that encodes | 98 // The InstructionCode is an opaque, target-specific integer that encodes |
100 // what code to emit for an instruction in the code generator. It is not | 99 // what code to emit for an instruction in the code generator. It is not |
101 // interesting to the register allocator, as the inputs and flags on the | 100 // interesting to the register allocator, as the inputs and flags on the |
102 // instructions specify everything of interest. | 101 // instructions specify everything of interest. |
103 typedef int32_t InstructionCode; | 102 typedef int32_t InstructionCode; |
104 | 103 |
105 // Helpers for encoding / decoding InstructionCode into the fields needed | 104 // Helpers for encoding / decoding InstructionCode into the fields needed |
106 // for code generation. We encode the instruction, addressing mode, and flags | 105 // for code generation. We encode the instruction, addressing mode, and flags |
107 // continuation into a single InstructionCode which is stored as part of | 106 // continuation into a single InstructionCode which is stored as part of |
108 // the instruction. | 107 // the instruction. |
109 typedef BitField<ArchOpcode, 0, 7> ArchOpcodeField; | 108 typedef BitField<ArchOpcode, 0, 7> ArchOpcodeField; |
110 typedef BitField<AddressingMode, 7, 5> AddressingModeField; | 109 typedef BitField<AddressingMode, 7, 5> AddressingModeField; |
111 typedef BitField<FlagsMode, 12, 2> FlagsModeField; | 110 typedef BitField<FlagsMode, 12, 2> FlagsModeField; |
112 typedef BitField<FlagsCondition, 14, 5> FlagsConditionField; | 111 typedef BitField<FlagsCondition, 14, 5> FlagsConditionField; |
113 typedef BitField<int, 14, 18> MiscField; | 112 typedef BitField<int, 14, 18> MiscField; |
114 | 113 |
115 } // namespace compiler | 114 } // namespace compiler |
116 } // namespace internal | 115 } // namespace internal |
117 } // namespace v8 | 116 } // namespace v8 |
118 | 117 |
119 #endif // V8_COMPILER_INSTRUCTION_CODES_H_ | 118 #endif // V8_COMPILER_INSTRUCTION_CODES_H_ |
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