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Unified Diff: src/x64/assembler-x64.h

Issue 615223005: [turbofan] support all shift operands on x64 (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Created 6 years, 3 months ago
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Index: src/x64/assembler-x64.h
diff --git a/src/x64/assembler-x64.h b/src/x64/assembler-x64.h
index 529b100e24ae18d9e269d542eb4e8df90176250a..b46112487b76424cbb07576118014fb318ba7bf6 100644
--- a/src/x64/assembler-x64.h
+++ b/src/x64/assembler-x64.h
@@ -813,30 +813,42 @@ class Assembler : public AssemblerBase {
// Multiply rax by src, put the result in rdx:rax.
void mul(Register src);
-#define DECLARE_SHIFT_INSTRUCTION(instruction, subcode) \
- void instruction##p(Register dst, Immediate imm8) { \
- shift(dst, imm8, subcode, kPointerSize); \
- } \
- \
- void instruction##l(Register dst, Immediate imm8) { \
- shift(dst, imm8, subcode, kInt32Size); \
- } \
- \
- void instruction##q(Register dst, Immediate imm8) { \
- shift(dst, imm8, subcode, kInt64Size); \
- } \
- \
- void instruction##p_cl(Register dst) { \
- shift(dst, subcode, kPointerSize); \
- } \
- \
- void instruction##l_cl(Register dst) { \
- shift(dst, subcode, kInt32Size); \
- } \
- \
- void instruction##q_cl(Register dst) { \
- shift(dst, subcode, kInt64Size); \
- }
+#define DECLARE_SHIFT_INSTRUCTION(instruction, subcode) \
+ void instruction##p(Register dst, Immediate imm8) { \
+ shift(dst, imm8, subcode, kPointerSize); \
+ } \
+ \
+ void instruction##l(Register dst, Immediate imm8) { \
+ shift(dst, imm8, subcode, kInt32Size); \
+ } \
+ \
+ void instruction##q(Register dst, Immediate imm8) { \
+ shift(dst, imm8, subcode, kInt64Size); \
+ } \
+ \
+ void instruction##p(Operand dst, Immediate imm8) { \
+ shift(dst, imm8, subcode, kPointerSize); \
+ } \
+ \
+ void instruction##l(Operand dst, Immediate imm8) { \
+ shift(dst, imm8, subcode, kInt32Size); \
+ } \
+ \
+ void instruction##q(Operand dst, Immediate imm8) { \
+ shift(dst, imm8, subcode, kInt64Size); \
+ } \
+ \
+ void instruction##p_cl(Register dst) { shift(dst, subcode, kPointerSize); } \
+ \
+ void instruction##l_cl(Register dst) { shift(dst, subcode, kInt32Size); } \
+ \
+ void instruction##q_cl(Register dst) { shift(dst, subcode, kInt64Size); } \
+ \
+ void instruction##p_cl(Operand dst) { shift(dst, subcode, kPointerSize); } \
+ \
+ void instruction##l_cl(Operand dst) { shift(dst, subcode, kInt32Size); } \
+ \
+ void instruction##q_cl(Operand dst) { shift(dst, subcode, kInt64Size); }
SHIFT_INSTRUCTION_LIST(DECLARE_SHIFT_INSTRUCTION)
#undef DECLARE_SHIFT_INSTRUCTION
@@ -1365,9 +1377,11 @@ class Assembler : public AssemblerBase {
int size);
// Emit machine code for a shift operation.
+ void shift(Operand dst, Immediate shift_amount, int subcode, int size);
void shift(Register dst, Immediate shift_amount, int subcode, int size);
// Shift dst by cl % 64 bits.
void shift(Register dst, int subcode, int size);
+ void shift(Operand dst, int subcode, int size);
void emit_farith(int b1, int b2, int i);
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