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Unified Diff: test/cctest/test-assembler-ia32.cc

Issue 60093005: Introduce addps/subps/mulps/divps for IA32/X64 (Closed) Base URL: git://github.com/v8/v8.git@master
Patch Set: Put all SSE1 instruction after SSE2 flag Created 7 years, 1 month ago
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Index: test/cctest/test-assembler-ia32.cc
diff --git a/test/cctest/test-assembler-ia32.cc b/test/cctest/test-assembler-ia32.cc
index d40156841ec071d7aecd1b2001e328919851af49..ca788a9ebdd2c717ef025502f0b9273db4ff7f7f 100644
--- a/test/cctest/test-assembler-ia32.cc
+++ b/test/cctest/test-assembler-ia32.cc
@@ -599,4 +599,44 @@ TEST(AssemblerIa32Extractps) {
}
+typedef int (*F8)(float x, float y);
+TEST(AssemblerIa32SSE) {
+ CcTest::InitializeVM();
+ if (!CpuFeatures::IsSupported(SSE2)) return;
+
+ Isolate* isolate = reinterpret_cast<Isolate*>(CcTest::isolate());
+ HandleScope scope(isolate);
+ v8::internal::byte buffer[256];
+ MacroAssembler assm(isolate, buffer, sizeof buffer);
+ {
+ CpuFeatureScope fscope(&assm, SSE2);
+ __ movss(xmm0, Operand(esp, kPointerSize));
+ __ movss(xmm1, Operand(esp, 2 * kPointerSize));
+ __ shufps(xmm0, xmm0, 0x0);
+ __ shufps(xmm1, xmm1, 0x0);
+ __ movaps(xmm2, xmm1);
+ __ addps(xmm2, xmm0);
+ __ mulps(xmm2, xmm1);
+ __ subps(xmm2, xmm0);
+ __ divps(xmm2, xmm1);
+ __ cvttss2si(eax, xmm2);
+ __ ret(0);
+ }
+
+ CodeDesc desc;
+ assm.GetCode(&desc);
+ Code* code = Code::cast(isolate->heap()->CreateCode(
+ desc,
+ Code::ComputeFlags(Code::STUB),
+ Handle<Code>())->ToObjectChecked());
+ CHECK(code->IsCode());
+#ifdef OBJECT_PRINT
+ Code::cast(code)->Print();
+#endif
+
+ F8 f = FUNCTION_CAST<F8>(Code::cast(code)->entry());
+ CHECK_EQ(2, f(1.0, 2.0));
+}
+
+
#undef __
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