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Unified Diff: src/mips/simulator-mips.cc

Issue 553843002: Replace our home-grown BitCast with bit_cast from Chrome/Google3. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Created 6 years, 3 months ago
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Index: src/mips/simulator-mips.cc
diff --git a/src/mips/simulator-mips.cc b/src/mips/simulator-mips.cc
index b41e61d8ae0af0357fb52608fc5fc5b875e382b7..fabca67062fab264b5c9dff0192c308c18e67b9f 100644
--- a/src/mips/simulator-mips.cc
+++ b/src/mips/simulator-mips.cc
@@ -14,7 +14,6 @@
#include "src/assembler.h"
#include "src/base/bits.h"
#include "src/disasm.h"
-#include "src/globals.h" // Need the BitCast.
#include "src/mips/constants-mips.h"
#include "src/mips/simulator-mips.h"
#include "src/ostreams.h"
@@ -1126,17 +1125,17 @@ void Simulator::set_fpu_register_hi_word(int fpureg, int32_t value) {
void Simulator::set_fpu_register_float(int fpureg, float value) {
DCHECK((fpureg >= 0) && (fpureg < kNumFPURegisters));
- *BitCast<float*>(&FPUregisters_[fpureg]) = value;
+ *bit_cast<float*>(&FPUregisters_[fpureg]) = value;
}
void Simulator::set_fpu_register_double(int fpureg, double value) {
if (IsFp64Mode()) {
DCHECK((fpureg >= 0) && (fpureg < kNumFPURegisters));
- *BitCast<double*>(&FPUregisters_[fpureg]) = value;
+ *bit_cast<double*>(&FPUregisters_[fpureg]) = value;
} else {
DCHECK((fpureg >= 0) && (fpureg < kNumFPURegisters) && ((fpureg % 2) == 0));
- int64_t i64 = BitCast<int64_t>(value);
+ int64_t i64 = bit_cast<int64_t>(value);
set_fpu_register_word(fpureg, i64 & 0xffffffff);
set_fpu_register_word(fpureg + 1, i64 >> 32);
}
@@ -1195,21 +1194,20 @@ int32_t Simulator::get_fpu_register_hi_word(int fpureg) const {
float Simulator::get_fpu_register_float(int fpureg) const {
DCHECK((fpureg >= 0) && (fpureg < kNumFPURegisters));
- return *BitCast<float*>(
- const_cast<int64_t*>(&FPUregisters_[fpureg]));
+ return *bit_cast<float*>(const_cast<int64_t*>(&FPUregisters_[fpureg]));
}
double Simulator::get_fpu_register_double(int fpureg) const {
if (IsFp64Mode()) {
DCHECK((fpureg >= 0) && (fpureg < kNumFPURegisters));
- return *BitCast<double*>(&FPUregisters_[fpureg]);
+ return *bit_cast<double*>(&FPUregisters_[fpureg]);
} else {
DCHECK((fpureg >= 0) && (fpureg < kNumFPURegisters) && ((fpureg % 2) == 0));
int64_t i64;
i64 = static_cast<uint32_t>(get_fpu_register_word(fpureg));
i64 |= static_cast<uint64_t>(get_fpu_register_word(fpureg + 1)) << 32;
- return BitCast<double>(i64);
+ return bit_cast<double>(i64);
}
}
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