Support for MIPS in architecture independent files....

src/mips/test-mips.cc

Index: src/mips/test-mips.cc
===================================================================
--- src/mips/test-mips.cc	(revision 0)
+++ src/mips/test-mips.cc	(revision 0)
@@ -0,0 +1,146 @@
+#include "v8.h"
+#include "bootstrapper.h"
+#include "codegen-inl.h"
+#include "debug.h"
+#include "parser.h"
+#include "register-allocator-inl.h"
+#include "runtime.h"
+#include "scopes.h"
+#include "compiler.h"
+
+//#include "api.h"
+#include "mips/simulator-mips.h"
+//#include "v8threads.h"
+
+#include "test-interface-mips.h"
+
+
+namespace v8 {
+namespace internal {
+
+#define __ ACCESS_MASM(masm)
+  
+void TestMIPSStub::GenerateBody(MacroAssembler* masm) {
+  // The stub is called as a function, and expected to preserve callee-saved
+  // registers. If you don't v8 will raise an error when leaving the simulator.
+  // To do so you can use the following multi_push/pop pseudo-instructions.
+//  __ multi_push(kCalleeSaved | ra.bit());
+//  __ multi_pop(kCalleeSaved | ra.bit());
+
+  // ----- Save callee-saved registers on the stack
+  __ multi_push(kCalleeSaved | ra.bit());
+
+  for(int i=0; i< 5; i++) { __ nop(); }  // visual helper when disasembling
+
+  // ----- Test all instructions.
+
+  // Test lui, ori, and addiu, used in the li pseudo-instruction.
+  // This way we can then safely load registers with chosen values.
+
+  __ ori(t0, zero_reg, Operand(0));
+  __ lui(t0, 0x1234);
+  __ ori(t0, t0, Operand(0));
+  __ ori(t0, t0, Operand(0x0f0f));
+  __ ori(t0, t0, Operand(0xf0f0));
+  __ addiu(t1, t0, Operand(1));
+  __ addiu(t2, t1, Operand(-0x10));
+
+  // Load values in temporary registers
+  __ li(t0, Operand(0x1234));
+  __ li(t1, Operand(0xffff1234));
+  __ li(t2, Operand(0x4));
+  __ li(t3, Operand(0x8));
+  __ li(t4, Operand(0xfffff));
+  __ li(t5, Operand(0xffffff));
+  __ li(t6, Operand(0x7fffffff));
+  __ li(t7, Operand(0xffffffff));
+
+
+  ///// SPECIAL class
+  __ sll(v0, t0, 4);
+  __ sll(v0, t0, 28);
+  __ srl(v0, t0, 4);
+  __ srl(v0, t1, 4);
+  __ sra(v0, t0, 4);
+  __ sra(v0, t1, 4);
+  __ sllv(v0, t1, t2);
+  __ srlv(v0, t0, t2);
+  __ srlv(v0, t1, t2);
+  __ srav(v0, t0, t2);
+  __ srav(v0, t1, t2);
+  
+  __ mfhi(v1);
+  __ mflo(v0);
+  
+  __ add(v0, t0, t2);
+//  __ add(v0, t0, t6);   // overflow
+//  __ add(v0, t7, t1);   // overflow
+  __ addu(v0, t0, t2);
+  __ addu(v0, t1, t4);
+  __ sub(v1, t0, Operand(t2));
+//  __ sub(v1, t7, Operand(t0));   // underflow
+//  __ sub(v1, t6, Operand(t7));   // underflow
+
+  
+
+  // Return
+  
+  for(int i=0; i< 5; i++) { __ nop(); }  // visual helper when disasembling
+
+  // ----- Restore callee-saved registers on the stack
+  __ multi_pop(kCalleeSaved | ra.bit());
+
+  __ Jump(ra);
+  __ nop(); // NOP_ADDED
+
+}
+
+} }  // namespace v8::internal
+
+using namespace v8::internal;
+
+
+void TestMIPS1() {
+
+  typedef unsigned char byte;
+
+  // Entering JavaScript.
+  VMState state(JS);
+
+  // Placeholder for return value.
+  Object* value = reinterpret_cast<Object*>(kZapValue);
+
+  typedef Object* (*JSEntryFunction)(
+    byte* entry,
+    Object* function,
+    Object* receiver,
+    int argc,
+    Object*** args);
+
+  Handle<Code> code;
+  TestMIPSStub stub;
+  code = stub.GetCode();
+
+  {
+    // Save and restore context around invocation and block the
+    // allocation of handles without explicit handle scopes.
+    SaveContext save;
+    NoHandleAllocation na;
+    JSEntryFunction entry = FUNCTION_CAST<JSEntryFunction>(code->entry());
+
+    // Call TestMIPSStub generated code.
+    byte* entry_address= NULL;
+    JSFunction* function = NULL;
+    Object* receiver_pointer = NULL;
+    int argc = 0;
+    Object*** args =  NULL;
+    value = CALL_GENERATED_CODE(entry, entry_address, function,
+                                receiver_pointer, argc, args);
+  }
+
+  // Check the value returned (in v0).
+  printf("TestMIPSStub returned %#x.\n", (uint32_t)value);
+
+}
+
+