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Unified Diff: src/compiler/arm64/instruction-selector-arm64.cc

Issue 470593002: Unify MachineType and RepType. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Created 6 years, 4 months ago
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Index: src/compiler/arm64/instruction-selector-arm64.cc
diff --git a/src/compiler/arm64/instruction-selector-arm64.cc b/src/compiler/arm64/instruction-selector-arm64.cc
index 0d7dbb669aefe070fac65d189fc8b44388d13fc5..9eca69610b3e3ce2a5964acca900b32725e3ee7d 100644
--- a/src/compiler/arm64/instruction-selector-arm64.cc
+++ b/src/compiler/arm64/instruction-selector-arm64.cc
@@ -150,31 +150,33 @@ static void VisitBinop(InstructionSelector* selector, Node* node,
void InstructionSelector::VisitLoad(Node* node) {
- MachineType rep = OpParameter<MachineType>(node);
+ MachineType rep = RepresentationOf(OpParameter<MachineType>(node));
Arm64OperandGenerator g(this);
Node* base = node->InputAt(0);
Node* index = node->InputAt(1);
- InstructionOperand* result = rep == kMachineFloat64
+ InstructionOperand* result = rep == kRepFloat64
? g.DefineAsDoubleRegister(node)
: g.DefineAsRegister(node);
ArchOpcode opcode;
+ // TODO(titzer): signed/unsigned small loads
switch (rep) {
- case kMachineFloat64:
+ case kRepFloat64:
opcode = kArm64Float64Load;
break;
- case kMachineWord8:
+ case kRepBit: // Fall through.
+ case kRepWord8:
opcode = kArm64LoadWord8;
break;
- case kMachineWord16:
+ case kRepWord16:
opcode = kArm64LoadWord16;
break;
- case kMachineWord32:
+ case kRepWord32:
opcode = kArm64LoadWord32;
break;
- case kMachineTagged: // Fall through.
- case kMachineWord64:
+ case kRepTagged: // Fall through.
+ case kRepWord64:
opcode = kArm64LoadWord64;
break;
default:
@@ -201,9 +203,9 @@ void InstructionSelector::VisitStore(Node* node) {
Node* value = node->InputAt(2);
StoreRepresentation store_rep = OpParameter<StoreRepresentation>(node);
- MachineType rep = store_rep.rep;
+ MachineType rep = RepresentationOf(store_rep.machine_type);
if (store_rep.write_barrier_kind == kFullWriteBarrier) {
- DCHECK(rep == kMachineTagged);
+ DCHECK(rep == kRepTagged);
// TODO(dcarney): refactor RecordWrite function to take temp registers
// and pass them here instead of using fixed regs
// TODO(dcarney): handle immediate indices.
@@ -215,27 +217,28 @@ void InstructionSelector::VisitStore(Node* node) {
}
DCHECK_EQ(kNoWriteBarrier, store_rep.write_barrier_kind);
InstructionOperand* val;
- if (rep == kMachineFloat64) {
+ if (rep == kRepFloat64) {
val = g.UseDoubleRegister(value);
} else {
val = g.UseRegister(value);
}
ArchOpcode opcode;
switch (rep) {
- case kMachineFloat64:
+ case kRepFloat64:
opcode = kArm64Float64Store;
break;
- case kMachineWord8:
+ case kRepBit: // Fall through.
+ case kRepWord8:
opcode = kArm64StoreWord8;
break;
- case kMachineWord16:
+ case kRepWord16:
opcode = kArm64StoreWord16;
break;
- case kMachineWord32:
+ case kRepWord32:
opcode = kArm64StoreWord32;
break;
- case kMachineTagged: // Fall through.
- case kMachineWord64:
+ case kRepTagged: // Fall through.
+ case kRepWord64:
opcode = kArm64StoreWord64;
break;
default:
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