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Side by Side Diff: src/compiler/arm64/instruction-selector-arm64.cc

Issue 470593002: Unify MachineType and RepType. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Created 6 years, 4 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/compiler/instruction-selector-impl.h" 5 #include "src/compiler/instruction-selector-impl.h"
6 #include "src/compiler/node-matchers.h" 6 #include "src/compiler/node-matchers.h"
7 7
8 namespace v8 { 8 namespace v8 {
9 namespace internal { 9 namespace internal {
10 namespace compiler { 10 namespace compiler {
(...skipping 132 matching lines...) Expand 10 before | Expand all | Expand 10 after
143 143
144 // Shared routine for multiple binary operations. 144 // Shared routine for multiple binary operations.
145 static void VisitBinop(InstructionSelector* selector, Node* node, 145 static void VisitBinop(InstructionSelector* selector, Node* node,
146 ArchOpcode opcode, ImmediateMode operand_mode) { 146 ArchOpcode opcode, ImmediateMode operand_mode) {
147 FlagsContinuation cont; 147 FlagsContinuation cont;
148 VisitBinop(selector, node, opcode, operand_mode, &cont); 148 VisitBinop(selector, node, opcode, operand_mode, &cont);
149 } 149 }
150 150
151 151
152 void InstructionSelector::VisitLoad(Node* node) { 152 void InstructionSelector::VisitLoad(Node* node) {
153 MachineType rep = OpParameter<MachineType>(node); 153 MachineType rep = RepresentationOf(OpParameter<MachineType>(node));
154 Arm64OperandGenerator g(this); 154 Arm64OperandGenerator g(this);
155 Node* base = node->InputAt(0); 155 Node* base = node->InputAt(0);
156 Node* index = node->InputAt(1); 156 Node* index = node->InputAt(1);
157 157
158 InstructionOperand* result = rep == kMachineFloat64 158 InstructionOperand* result = rep == kRepFloat64
159 ? g.DefineAsDoubleRegister(node) 159 ? g.DefineAsDoubleRegister(node)
160 : g.DefineAsRegister(node); 160 : g.DefineAsRegister(node);
161 161
162 ArchOpcode opcode; 162 ArchOpcode opcode;
163 // TODO(titzer): signed/unsigned small loads
163 switch (rep) { 164 switch (rep) {
164 case kMachineFloat64: 165 case kRepFloat64:
165 opcode = kArm64Float64Load; 166 opcode = kArm64Float64Load;
166 break; 167 break;
167 case kMachineWord8: 168 case kRepBit: // Fall through.
169 case kRepWord8:
168 opcode = kArm64LoadWord8; 170 opcode = kArm64LoadWord8;
169 break; 171 break;
170 case kMachineWord16: 172 case kRepWord16:
171 opcode = kArm64LoadWord16; 173 opcode = kArm64LoadWord16;
172 break; 174 break;
173 case kMachineWord32: 175 case kRepWord32:
174 opcode = kArm64LoadWord32; 176 opcode = kArm64LoadWord32;
175 break; 177 break;
176 case kMachineTagged: // Fall through. 178 case kRepTagged: // Fall through.
177 case kMachineWord64: 179 case kRepWord64:
178 opcode = kArm64LoadWord64; 180 opcode = kArm64LoadWord64;
179 break; 181 break;
180 default: 182 default:
181 UNREACHABLE(); 183 UNREACHABLE();
182 return; 184 return;
183 } 185 }
184 if (g.CanBeImmediate(index, kLoadStoreImm)) { 186 if (g.CanBeImmediate(index, kLoadStoreImm)) {
185 Emit(opcode | AddressingModeField::encode(kMode_MRI), result, 187 Emit(opcode | AddressingModeField::encode(kMode_MRI), result,
186 g.UseRegister(base), g.UseImmediate(index)); 188 g.UseRegister(base), g.UseImmediate(index));
187 } else if (g.CanBeImmediate(base, kLoadStoreImm)) { 189 } else if (g.CanBeImmediate(base, kLoadStoreImm)) {
188 Emit(opcode | AddressingModeField::encode(kMode_MRI), result, 190 Emit(opcode | AddressingModeField::encode(kMode_MRI), result,
189 g.UseRegister(index), g.UseImmediate(base)); 191 g.UseRegister(index), g.UseImmediate(base));
190 } else { 192 } else {
191 Emit(opcode | AddressingModeField::encode(kMode_MRR), result, 193 Emit(opcode | AddressingModeField::encode(kMode_MRR), result,
192 g.UseRegister(base), g.UseRegister(index)); 194 g.UseRegister(base), g.UseRegister(index));
193 } 195 }
194 } 196 }
195 197
196 198
197 void InstructionSelector::VisitStore(Node* node) { 199 void InstructionSelector::VisitStore(Node* node) {
198 Arm64OperandGenerator g(this); 200 Arm64OperandGenerator g(this);
199 Node* base = node->InputAt(0); 201 Node* base = node->InputAt(0);
200 Node* index = node->InputAt(1); 202 Node* index = node->InputAt(1);
201 Node* value = node->InputAt(2); 203 Node* value = node->InputAt(2);
202 204
203 StoreRepresentation store_rep = OpParameter<StoreRepresentation>(node); 205 StoreRepresentation store_rep = OpParameter<StoreRepresentation>(node);
204 MachineType rep = store_rep.rep; 206 MachineType rep = RepresentationOf(store_rep.machine_type);
205 if (store_rep.write_barrier_kind == kFullWriteBarrier) { 207 if (store_rep.write_barrier_kind == kFullWriteBarrier) {
206 DCHECK(rep == kMachineTagged); 208 DCHECK(rep == kRepTagged);
207 // TODO(dcarney): refactor RecordWrite function to take temp registers 209 // TODO(dcarney): refactor RecordWrite function to take temp registers
208 // and pass them here instead of using fixed regs 210 // and pass them here instead of using fixed regs
209 // TODO(dcarney): handle immediate indices. 211 // TODO(dcarney): handle immediate indices.
210 InstructionOperand* temps[] = {g.TempRegister(x11), g.TempRegister(x12)}; 212 InstructionOperand* temps[] = {g.TempRegister(x11), g.TempRegister(x12)};
211 Emit(kArm64StoreWriteBarrier, NULL, g.UseFixed(base, x10), 213 Emit(kArm64StoreWriteBarrier, NULL, g.UseFixed(base, x10),
212 g.UseFixed(index, x11), g.UseFixed(value, x12), ARRAY_SIZE(temps), 214 g.UseFixed(index, x11), g.UseFixed(value, x12), ARRAY_SIZE(temps),
213 temps); 215 temps);
214 return; 216 return;
215 } 217 }
216 DCHECK_EQ(kNoWriteBarrier, store_rep.write_barrier_kind); 218 DCHECK_EQ(kNoWriteBarrier, store_rep.write_barrier_kind);
217 InstructionOperand* val; 219 InstructionOperand* val;
218 if (rep == kMachineFloat64) { 220 if (rep == kRepFloat64) {
219 val = g.UseDoubleRegister(value); 221 val = g.UseDoubleRegister(value);
220 } else { 222 } else {
221 val = g.UseRegister(value); 223 val = g.UseRegister(value);
222 } 224 }
223 ArchOpcode opcode; 225 ArchOpcode opcode;
224 switch (rep) { 226 switch (rep) {
225 case kMachineFloat64: 227 case kRepFloat64:
226 opcode = kArm64Float64Store; 228 opcode = kArm64Float64Store;
227 break; 229 break;
228 case kMachineWord8: 230 case kRepBit: // Fall through.
231 case kRepWord8:
229 opcode = kArm64StoreWord8; 232 opcode = kArm64StoreWord8;
230 break; 233 break;
231 case kMachineWord16: 234 case kRepWord16:
232 opcode = kArm64StoreWord16; 235 opcode = kArm64StoreWord16;
233 break; 236 break;
234 case kMachineWord32: 237 case kRepWord32:
235 opcode = kArm64StoreWord32; 238 opcode = kArm64StoreWord32;
236 break; 239 break;
237 case kMachineTagged: // Fall through. 240 case kRepTagged: // Fall through.
238 case kMachineWord64: 241 case kRepWord64:
239 opcode = kArm64StoreWord64; 242 opcode = kArm64StoreWord64;
240 break; 243 break;
241 default: 244 default:
242 UNREACHABLE(); 245 UNREACHABLE();
243 return; 246 return;
244 } 247 }
245 if (g.CanBeImmediate(index, kLoadStoreImm)) { 248 if (g.CanBeImmediate(index, kLoadStoreImm)) {
246 Emit(opcode | AddressingModeField::encode(kMode_MRI), NULL, 249 Emit(opcode | AddressingModeField::encode(kMode_MRI), NULL,
247 g.UseRegister(base), g.UseImmediate(index), val); 250 g.UseRegister(base), g.UseImmediate(index), val);
248 } else if (g.CanBeImmediate(base, kLoadStoreImm)) { 251 } else if (g.CanBeImmediate(base, kLoadStoreImm)) {
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668 // Caller clean up of stack for C-style calls. 671 // Caller clean up of stack for C-style calls.
669 if (is_c_frame && aligned_push_count > 0) { 672 if (is_c_frame && aligned_push_count > 0) {
670 DCHECK(deoptimization == NULL && continuation == NULL); 673 DCHECK(deoptimization == NULL && continuation == NULL);
671 Emit(kArm64Drop | MiscField::encode(aligned_push_count), NULL); 674 Emit(kArm64Drop | MiscField::encode(aligned_push_count), NULL);
672 } 675 }
673 } 676 }
674 677
675 } // namespace compiler 678 } // namespace compiler
676 } // namespace internal 679 } // namespace internal
677 } // namespace v8 680 } // namespace v8
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