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Side by Side Diff: src/mips/simulator-mips.h

Issue 458193002: Revert 23028 - "MIPS: Add support for arch. revision 6 to mips32 port." (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Created 6 years, 4 months ago
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1 // Copyright 2011 the V8 project authors. All rights reserved. 1 // Copyright 2011 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 5
6 // Declares a Simulator for MIPS instructions if we are not generating a native 6 // Declares a Simulator for MIPS instructions if we are not generating a native
7 // MIPS binary. This Simulator allows us to run and debug MIPS code generation 7 // MIPS binary. This Simulator allows us to run and debug MIPS code generation
8 // on regular desktop machines. 8 // on regular desktop machines.
9 // V8 calls into generated code by "calling" the CALL_GENERATED_CODE macro, 9 // V8 calls into generated code by "calling" the CALL_GENERATED_CODE macro,
10 // which will start execution in the Simulator or forwards to the real entry 10 // which will start execution in the Simulator or forwards to the real entry
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155 static Simulator* current(v8::internal::Isolate* isolate); 155 static Simulator* current(v8::internal::Isolate* isolate);
156 156
157 // Accessors for register state. Reading the pc value adheres to the MIPS 157 // Accessors for register state. Reading the pc value adheres to the MIPS
158 // architecture specification and is off by a 8 from the currently executing 158 // architecture specification and is off by a 8 from the currently executing
159 // instruction. 159 // instruction.
160 void set_register(int reg, int32_t value); 160 void set_register(int reg, int32_t value);
161 void set_dw_register(int dreg, const int* dbl); 161 void set_dw_register(int dreg, const int* dbl);
162 int32_t get_register(int reg) const; 162 int32_t get_register(int reg) const;
163 double get_double_from_register_pair(int reg); 163 double get_double_from_register_pair(int reg);
164 // Same for FPURegisters. 164 // Same for FPURegisters.
165 void set_fpu_register(int fpureg, int64_t value); 165 void set_fpu_register(int fpureg, int32_t value);
166 void set_fpu_register_word(int fpureg, int32_t value);
167 void set_fpu_register_hi_word(int fpureg, int32_t value);
168 void set_fpu_register_float(int fpureg, float value); 166 void set_fpu_register_float(int fpureg, float value);
169 void set_fpu_register_double(int fpureg, double value); 167 void set_fpu_register_double(int fpureg, double value);
170 int64_t get_fpu_register(int fpureg) const; 168 int32_t get_fpu_register(int fpureg) const;
171 int32_t get_fpu_register_word(int fpureg) const; 169 int64_t get_fpu_register_long(int fpureg) const;
172 int32_t get_fpu_register_signed_word(int fpureg) const;
173 int32_t get_fpu_register_hi_word(int fpureg) const;
174 float get_fpu_register_float(int fpureg) const; 170 float get_fpu_register_float(int fpureg) const;
175 double get_fpu_register_double(int fpureg) const; 171 double get_fpu_register_double(int fpureg) const;
176 void set_fcsr_bit(uint32_t cc, bool value); 172 void set_fcsr_bit(uint32_t cc, bool value);
177 bool test_fcsr_bit(uint32_t cc); 173 bool test_fcsr_bit(uint32_t cc);
178 bool set_fcsr_round_error(double original, double rounded); 174 bool set_fcsr_round_error(double original, double rounded);
179 175
180 // Special case of set_register and get_register to access the raw PC value. 176 // Special case of set_register and get_register to access the raw PC value.
181 void set_pc(int32_t value); 177 void set_pc(int32_t value);
182 int32_t get_pc() const; 178 int32_t get_pc() const;
183 179
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335 // Handle arguments and return value for runtime FP functions. 331 // Handle arguments and return value for runtime FP functions.
336 void GetFpArgs(double* x, double* y, int32_t* z); 332 void GetFpArgs(double* x, double* y, int32_t* z);
337 void SetFpResult(const double& result); 333 void SetFpResult(const double& result);
338 334
339 void CallInternal(byte* entry); 335 void CallInternal(byte* entry);
340 336
341 // Architecture state. 337 // Architecture state.
342 // Registers. 338 // Registers.
343 int32_t registers_[kNumSimuRegisters]; 339 int32_t registers_[kNumSimuRegisters];
344 // Coprocessor Registers. 340 // Coprocessor Registers.
345 // Note: FP32 mode uses only the lower 32-bit part of each element, 341 int32_t FPUregisters_[kNumFPURegisters];
346 // the upper 32-bit is unpredictable.
347 int64_t FPUregisters_[kNumFPURegisters];
348 // FPU control register. 342 // FPU control register.
349 uint32_t FCSR_; 343 uint32_t FCSR_;
350 344
351 // Simulator support. 345 // Simulator support.
352 // Allocate 1MB for stack. 346 // Allocate 1MB for stack.
353 static const size_t stack_size_ = 1 * 1024*1024; 347 static const size_t stack_size_ = 1 * 1024*1024;
354 char* stack_; 348 char* stack_;
355 bool pc_modified_; 349 bool pc_modified_;
356 int icount_; 350 int icount_;
357 int break_count_; 351 int break_count_;
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413 407
414 static inline void UnregisterCTryCatch() { 408 static inline void UnregisterCTryCatch() {
415 Simulator::current(Isolate::Current())->PopAddress(); 409 Simulator::current(Isolate::Current())->PopAddress();
416 } 410 }
417 }; 411 };
418 412
419 } } // namespace v8::internal 413 } } // namespace v8::internal
420 414
421 #endif // !defined(USE_SIMULATOR) 415 #endif // !defined(USE_SIMULATOR)
422 #endif // V8_MIPS_SIMULATOR_MIPS_H_ 416 #endif // V8_MIPS_SIMULATOR_MIPS_H_
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