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Issue 458193002: Revert 23028 - "MIPS: Add support for arch. revision 6 to mips32 port." (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Created 6 years, 4 months ago
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1 # Copyright 2013 the V8 project authors. All rights reserved. 1 # Copyright 2013 the V8 project authors. All rights reserved.
2 # Redistribution and use in source and binary forms, with or without 2 # Redistribution and use in source and binary forms, with or without
3 # modification, are permitted provided that the following conditions are 3 # modification, are permitted provided that the following conditions are
4 # met: 4 # met:
5 # 5 #
6 # * Redistributions of source code must retain the above copyright 6 # * Redistributions of source code must retain the above copyright
7 # notice, this list of conditions and the following disclaimer. 7 # notice, this list of conditions and the following disclaimer.
8 # * Redistributions in binary form must reproduce the above 8 # * Redistributions in binary form must reproduce the above
9 # copyright notice, this list of conditions and the following 9 # copyright notice, this list of conditions and the following
10 # disclaimer in the documentation and/or other materials provided 10 # disclaimer in the documentation and/or other materials provided
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51 51
52 # Similar to vfp but on MIPS. 52 # Similar to vfp but on MIPS.
53 'v8_can_use_fpu_instructions%': 'true', 53 'v8_can_use_fpu_instructions%': 'true',
54 54
55 # Similar to the ARM hard float ABI but on MIPS. 55 # Similar to the ARM hard float ABI but on MIPS.
56 'v8_use_mips_abi_hardfloat%': 'true', 56 'v8_use_mips_abi_hardfloat%': 'true',
57 57
58 # Default arch variant for MIPS. 58 # Default arch variant for MIPS.
59 'mips_arch_variant%': 'r2', 59 'mips_arch_variant%': 'r2',
60 60
61 # Possible values fp32, fp64, fpxx.
62 # fp32 - 32 32-bit FPU registers are available, doubles are placed in
63 # register pairs.
64 # fp64 - 32 64-bit FPU registers are available.
65 # fpxx - compatibility mode, it chooses fp32 or fp64 depending on runtime
66 # detection
67 'mips_fpu_mode%': 'fp32',
68
69 'v8_enable_backtrace%': 0, 61 'v8_enable_backtrace%': 0,
70 62
71 # Enable profiling support. Only required on Windows. 63 # Enable profiling support. Only required on Windows.
72 'v8_enable_prof%': 0, 64 'v8_enable_prof%': 0,
73 65
74 # Some versions of GCC 4.5 seem to need -fno-strict-aliasing. 66 # Some versions of GCC 4.5 seem to need -fno-strict-aliasing.
75 'v8_no_strict_aliasing%': 0, 67 'v8_no_strict_aliasing%': 0,
76 68
77 # Chrome needs this definition unconditionally. For standalone V8 builds, 69 # Chrome needs this definition unconditionally. For standalone V8 builds,
78 # it's handled in build/standalone.gypi. 70 # it's handled in build/standalone.gypi.
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273 'cflags': ['-EB'], 265 'cflags': ['-EB'],
274 'ldflags': ['-EB'], 266 'ldflags': ['-EB'],
275 'conditions': [ 267 'conditions': [
276 [ 'v8_use_mips_abi_hardfloat=="true"', { 268 [ 'v8_use_mips_abi_hardfloat=="true"', {
277 'cflags': ['-mhard-float'], 269 'cflags': ['-mhard-float'],
278 'ldflags': ['-mhard-float'], 270 'ldflags': ['-mhard-float'],
279 }, { 271 }, {
280 'cflags': ['-msoft-float'], 272 'cflags': ['-msoft-float'],
281 'ldflags': ['-msoft-float'], 273 'ldflags': ['-msoft-float'],
282 }], 274 }],
283 ['mips_fpu_mode=="fp64"', {
284 'cflags': ['-mfp64'],
285 }],
286 ['mips_fpu_mode=="fpxx"', {
287 'cflags': ['-mfpxx'],
288 }],
289 ['mips_fpu_mode=="fp32"', {
290 'cflags': ['-mfp32'],
291 }],
292 ['mips_arch_variant=="r6"', {
293 'cflags!': ['-mfp32'],
294 'cflags': ['-mips32r6', '-Wa,-mips32r6'],
295 'ldflags': [
296 '-mips32r6',
297 '-Wl,--dynamic-linker=$(LDSO_PATH)',
298 '-Wl,--rpath=$(LD_R_PATH)',
299 ],
300 }],
301 ['mips_arch_variant=="r2"', { 275 ['mips_arch_variant=="r2"', {
302 'cflags': ['-mips32r2', '-Wa,-mips32r2'], 276 'cflags': ['-mips32r2', '-Wa,-mips32r2'],
303 }], 277 }],
304 ['mips_arch_variant=="r1"', { 278 ['mips_arch_variant=="r1"', {
305 'cflags!': ['-mfp64'],
306 'cflags': ['-mips32', '-Wa,-mips32'],
307 }],
308 ['mips_arch_variant=="rx"', {
309 'cflags!': ['-mfp64'],
310 'cflags': ['-mips32', '-Wa,-mips32'], 279 'cflags': ['-mips32', '-Wa,-mips32'],
311 }], 280 }],
312 ], 281 ],
313 }], 282 }],
314 ], 283 ],
315 }], 284 }],
316 [ 'v8_can_use_fpu_instructions=="true"', { 285 [ 'v8_can_use_fpu_instructions=="true"', {
317 'defines': [ 286 'defines': [
318 'CAN_USE_FPU_INSTRUCTIONS', 287 'CAN_USE_FPU_INSTRUCTIONS',
319 ], 288 ],
320 }], 289 }],
321 [ 'v8_use_mips_abi_hardfloat=="true"', { 290 [ 'v8_use_mips_abi_hardfloat=="true"', {
322 'defines': [ 291 'defines': [
323 '__mips_hard_float=1', 292 '__mips_hard_float=1',
324 'CAN_USE_FPU_INSTRUCTIONS', 293 'CAN_USE_FPU_INSTRUCTIONS',
325 ], 294 ],
326 }, { 295 }, {
327 'defines': [ 296 'defines': [
328 '__mips_soft_float=1' 297 '__mips_soft_float=1'
329 ], 298 ],
330 }], 299 }],
331 ['mips_arch_variant=="rx"', {
332 'defines': ['_MIPS_ARCH_MIPS32RX',],
333 'defines': ['FPU_MODE_FPXX',],
334 }],
335 ['mips_arch_variant=="r6"', {
336 'defines': ['_MIPS_ARCH_MIPS32R6', 'FPU_MODE_FP64',],
337 }],
338 ['mips_arch_variant=="r2"', { 300 ['mips_arch_variant=="r2"', {
339 'defines': ['_MIPS_ARCH_MIPS32R2',], 301 'defines': ['_MIPS_ARCH_MIPS32R2',],
340 'conditions': [
341 ['mips_fpu_mode=="fp64"', {
342 'defines': ['FPU_MODE_FP64',],
343 }],
344 ['mips_fpu_mode=="fpxx"', {
345 'defines': ['FPU_MODE_FPXX',],
346 }],
347 ['mips_fpu_mode=="fp32"', {
348 'defines': ['FPU_MODE_FP32',],
349 }],
350 ],
351 }],
352 ['mips_arch_variant=="r1"', {
353 'defines': ['FPU_MODE_FP32',],
354 }], 302 }],
355 ], 303 ],
356 }], # v8_target_arch=="mips" 304 }], # v8_target_arch=="mips"
357 ['v8_target_arch=="mipsel"', { 305 ['v8_target_arch=="mipsel"', {
358 'defines': [ 306 'defines': [
359 'V8_TARGET_ARCH_MIPS', 307 'V8_TARGET_ARCH_MIPS',
360 ], 308 ],
361 'conditions': [ 309 'conditions': [
362 ['v8_target_arch==target_arch and android_webview_build==0', { 310 ['v8_target_arch==target_arch and android_webview_build==0', {
363 # Target built with a Mips CXX compiler. 311 # Target built with a Mips CXX compiler.
364 'target_conditions': [ 312 'target_conditions': [
365 ['_toolset=="target"', { 313 ['_toolset=="target"', {
366 'cflags': ['-EL'], 314 'cflags': ['-EL'],
367 'ldflags': ['-EL'], 315 'ldflags': ['-EL'],
368 'conditions': [ 316 'conditions': [
369 [ 'v8_use_mips_abi_hardfloat=="true"', { 317 [ 'v8_use_mips_abi_hardfloat=="true"', {
370 'cflags': ['-mhard-float'], 318 'cflags': ['-mhard-float'],
371 'ldflags': ['-mhard-float'], 319 'ldflags': ['-mhard-float'],
372 }, { 320 }, {
373 'cflags': ['-msoft-float'], 321 'cflags': ['-msoft-float'],
374 'ldflags': ['-msoft-float'], 322 'ldflags': ['-msoft-float'],
375 }], 323 }],
376 ['mips_fpu_mode=="fp64"', {
377 'cflags': ['-mfp64'],
378 }],
379 ['mips_fpu_mode=="fpxx"', {
380 'cflags': ['-mfpxx'],
381 }],
382 ['mips_fpu_mode=="fp32"', {
383 'cflags': ['-mfp32'],
384 }],
385 ['mips_arch_variant=="r6"', {
386 'cflags!': ['-mfp32'],
387 'cflags': ['-mips32r6', '-Wa,-mips32r6'],
388 'ldflags': [
389 '-mips32r6',
390 '-Wl,--dynamic-linker=$(LDSO_PATH)',
391 '-Wl,--rpath=$(LD_R_PATH)',
392 ],
393 }],
394 ['mips_arch_variant=="r2"', { 324 ['mips_arch_variant=="r2"', {
395 'cflags': ['-mips32r2', '-Wa,-mips32r2'], 325 'cflags': ['-mips32r2', '-Wa,-mips32r2'],
396 }], 326 }],
397 ['mips_arch_variant=="r1"', { 327 ['mips_arch_variant=="r1"', {
398 'cflags!': ['-mfp64'],
399 'cflags': ['-mips32', '-Wa,-mips32'], 328 'cflags': ['-mips32', '-Wa,-mips32'],
400 }], 329 }],
401 ['mips_arch_variant=="rx"', {
402 'cflags!': ['-mfp64'],
403 'cflags': ['-mips32', '-Wa,-mips32'],
404 }],
405 ['mips_arch_variant=="loongson"', { 330 ['mips_arch_variant=="loongson"', {
406 'cflags!': ['-mfp64'],
407 'cflags': ['-mips3', '-Wa,-mips3'], 331 'cflags': ['-mips3', '-Wa,-mips3'],
408 }], 332 }],
409 ], 333 ],
410 }], 334 }],
411 ], 335 ],
412 }], 336 }],
413 [ 'v8_can_use_fpu_instructions=="true"', { 337 [ 'v8_can_use_fpu_instructions=="true"', {
414 'defines': [ 338 'defines': [
415 'CAN_USE_FPU_INSTRUCTIONS', 339 'CAN_USE_FPU_INSTRUCTIONS',
416 ], 340 ],
417 }], 341 }],
418 [ 'v8_use_mips_abi_hardfloat=="true"', { 342 [ 'v8_use_mips_abi_hardfloat=="true"', {
419 'defines': [ 343 'defines': [
420 '__mips_hard_float=1', 344 '__mips_hard_float=1',
421 'CAN_USE_FPU_INSTRUCTIONS', 345 'CAN_USE_FPU_INSTRUCTIONS',
422 ], 346 ],
423 }, { 347 }, {
424 'defines': [ 348 'defines': [
425 '__mips_soft_float=1' 349 '__mips_soft_float=1'
426 ], 350 ],
427 }], 351 }],
428 ['mips_arch_variant=="rx"', {
429 'defines': ['_MIPS_ARCH_MIPS32RX',],
430 'defines': ['FPU_MODE_FPXX',],
431 }],
432 ['mips_arch_variant=="r6"', {
433 'defines': ['_MIPS_ARCH_MIPS32R6', 'FPU_MODE_FP64',],
434 }],
435 ['mips_arch_variant=="r2"', { 352 ['mips_arch_variant=="r2"', {
436 'defines': ['_MIPS_ARCH_MIPS32R2',], 353 'defines': ['_MIPS_ARCH_MIPS32R2',],
437 'conditions': [
438 ['mips_fpu_mode=="fp64"', {
439 'defines': ['FPU_MODE_FP64',],
440 }],
441 ['mips_fpu_mode=="fpxx"', {
442 'defines': ['FPU_MODE_FPXX',],
443 }],
444 ['mips_fpu_mode=="fp32"', {
445 'defines': ['FPU_MODE_FP32',],
446 }],
447 ],
448 }],
449 ['mips_arch_variant=="r1"', {
450 'defines': ['FPU_MODE_FP32',],
451 }], 354 }],
452 ['mips_arch_variant=="loongson"', { 355 ['mips_arch_variant=="loongson"', {
453 'defines': ['_MIPS_ARCH_LOONGSON',], 356 'defines': ['_MIPS_ARCH_LOONGSON',],
454 'defines': ['FPU_MODE_FP32',],
455 }], 357 }],
456 ], 358 ],
457 }], # v8_target_arch=="mipsel" 359 }], # v8_target_arch=="mipsel"
458 ['v8_target_arch=="mips64el"', { 360 ['v8_target_arch=="mips64el"', {
459 'defines': [ 361 'defines': [
460 'V8_TARGET_ARCH_MIPS64', 362 'V8_TARGET_ARCH_MIPS64',
461 ], 363 ],
462 'conditions': [ 364 'conditions': [
463 ['v8_target_arch==target_arch and android_webview_build==0', { 365 ['v8_target_arch==target_arch and android_webview_build==0', {
464 # Target built with a Mips CXX compiler. 366 # Target built with a Mips CXX compiler.
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939 'OptimizeReferences': '2', 841 'OptimizeReferences': '2',
940 'EnableCOMDATFolding': '2', 842 'EnableCOMDATFolding': '2',
941 }, 843 },
942 }, 844 },
943 }], # OS=="win" 845 }], # OS=="win"
944 ], # conditions 846 ], # conditions
945 }, # Release 847 }, # Release
946 }, # configurations 848 }, # configurations
947 }, # target_defaults 849 }, # target_defaults
948 } 850 }
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