Subzero: Randomize register assignment.

src/IceTargetLowering.cpp

Index: src/IceTargetLowering.cpp
diff --git a/src/IceTargetLowering.cpp b/src/IceTargetLowering.cpp
index 0034de5f7ca3e2340eb15e52f23530dfafc8ca56..9f03b1df151f8a6a694c8747b83024d334d8aaba 100644
--- a/src/IceTargetLowering.cpp
+++ b/src/IceTargetLowering.cpp
@@ -21,9 +21,20 @@
 #include "IceRegAlloc.h"
 #include "IceTargetLowering.h"
 #include "IceTargetLoweringX8632.h"
+#include "llvm/Support/CommandLine.h"
 
 namespace Ice {
 
+namespace {
+
+namespace cl = ::llvm::cl;
+cl::opt<bool>
+    CLRandomizeRegisterAllocation("randomize-regalloc",
+                                  cl::desc("Randomize register allocation"),
+                                  cl::init(false));
+
+} // end of anonymous namespace
+
 void LoweringContext::init(CfgNode *N) {
   Node = N;
   Begin = getNode()->getInsts().begin();
@@ -81,6 +92,11 @@ TargetLowering *TargetLowering::createLowering(TargetArch Target, Cfg *Func) {
   return NULL;
 }
 
+TargetLowering::TargetLowering(Cfg *Func)
+    : Func(Func), Ctx(Func->getContext()), HasComputedFrame(false),
+      StackAdjustment(0),
+      RandomizeRegisterAllocation(CLRandomizeRegisterAllocation) {}
+
 void TargetLowering::doAddressOpt() {
   if (llvm::isa<InstLoad>(*Context.getCur()))
     doAddressOptLoad();
@@ -190,7 +206,7 @@ void TargetLowering::regAlloc() {
   if (hasFramePointer())
     RegExclude |= RegSet_FramePointer;
   llvm::SmallBitVector RegMask = getRegisterSet(RegInclude, RegExclude);
-  LinearScan.scan(RegMask);
+  LinearScan.scan(RegMask, RandomizeRegisterAllocation);
 }
 
 TargetGlobalInitLowering *