| Index: src/x87/assembler-x87.h
|
| diff --git a/src/x87/assembler-x87.h b/src/x87/assembler-x87.h
|
| index 162416735b0be3150e9f6efa4a95de00d3f6fd1c..03b6eb107e5a2d8f56d19e54fdd4911c344ca952 100644
|
| --- a/src/x87/assembler-x87.h
|
| +++ b/src/x87/assembler-x87.h
|
| @@ -292,6 +292,7 @@ class Immediate BASE_EMBEDDED {
|
| int x_;
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| RelocInfo::Mode rmode_;
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|
|
| + friend class Operand;
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| friend class Assembler;
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| friend class MacroAssembler;
|
| };
|
| @@ -314,9 +315,14 @@ enum ScaleFactor {
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|
|
| class Operand BASE_EMBEDDED {
|
| public:
|
| + // reg
|
| + INLINE(explicit Operand(Register reg));
|
| +
|
| // [disp/r]
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| INLINE(explicit Operand(int32_t disp, RelocInfo::Mode rmode));
|
| - // disp only must always be relocated
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| +
|
| + // [disp/r]
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| + INLINE(explicit Operand(Immediate imm));
|
|
|
| // [base + disp/r]
|
| explicit Operand(Register base, int32_t disp,
|
| @@ -353,6 +359,10 @@ class Operand BASE_EMBEDDED {
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| RelocInfo::CELL);
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| }
|
|
|
| + static Operand ForRegisterPlusImmediate(Register base, Immediate imm) {
|
| + return Operand(base, imm.x_, imm.rmode_);
|
| + }
|
| +
|
| // Returns true if this Operand is a wrapper for the specified register.
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| bool is_reg(Register reg) const;
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|
|
| @@ -364,9 +374,6 @@ class Operand BASE_EMBEDDED {
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| Register reg() const;
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|
|
| private:
|
| - // reg
|
| - INLINE(explicit Operand(Register reg));
|
| -
|
| // Set the ModRM byte without an encoded 'reg' register. The
|
| // register is encoded later as part of the emit_operand operation.
|
| inline void set_modrm(int mod, Register rm);
|
| @@ -383,7 +390,6 @@ class Operand BASE_EMBEDDED {
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|
|
| friend class Assembler;
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| friend class MacroAssembler;
|
| - friend class LCodeGen;
|
| };
|
|
|
|
|
| @@ -630,8 +636,9 @@ class Assembler : public AssemblerBase {
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| void rep_stos();
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| void stos();
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|
|
| - // Exchange two registers
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| + // Exchange
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| void xchg(Register dst, Register src);
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| + void xchg(Register dst, const Operand& src);
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|
|
| // Arithmetics
|
| void adc(Register dst, int32_t imm32);
|
| @@ -673,13 +680,17 @@ class Assembler : public AssemblerBase {
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|
|
| void cdq();
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|
|
| - void idiv(Register src);
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| + void idiv(Register src) { idiv(Operand(src)); }
|
| + void idiv(const Operand& src);
|
| + void div(Register src) { div(Operand(src)); }
|
| + void div(const Operand& src);
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|
|
| // Signed multiply instructions.
|
| void imul(Register src); // edx:eax = eax * src.
|
| void imul(Register dst, Register src) { imul(dst, Operand(src)); }
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| void imul(Register dst, const Operand& src); // dst = dst * src.
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| void imul(Register dst, Register src, int32_t imm32); // dst = src * imm32.
|
| + void imul(Register dst, const Operand& src, int32_t imm32);
|
|
|
| void inc(Register dst);
|
| void inc(const Operand& dst);
|
| @@ -690,8 +701,10 @@ class Assembler : public AssemblerBase {
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| void mul(Register src); // edx:eax = eax * reg.
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|
|
| void neg(Register dst);
|
| + void neg(const Operand& dst);
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|
|
| void not_(Register dst);
|
| + void not_(const Operand& dst);
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|
|
| void or_(Register dst, int32_t imm32);
|
| void or_(Register dst, Register src) { or_(dst, Operand(src)); }
|
| @@ -705,22 +718,28 @@ class Assembler : public AssemblerBase {
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| void ror(Register dst, uint8_t imm8);
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| void ror_cl(Register dst);
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|
|
| - void sar(Register dst, uint8_t imm8);
|
| - void sar_cl(Register dst);
|
| + void sar(Register dst, uint8_t imm8) { sar(Operand(dst), imm8); }
|
| + void sar(const Operand& dst, uint8_t imm8);
|
| + void sar_cl(Register dst) { sar_cl(Operand(dst)); }
|
| + void sar_cl(const Operand& dst);
|
|
|
| void sbb(Register dst, const Operand& src);
|
|
|
| void shld(Register dst, Register src) { shld(dst, Operand(src)); }
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| void shld(Register dst, const Operand& src);
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|
|
| - void shl(Register dst, uint8_t imm8);
|
| - void shl_cl(Register dst);
|
| + void shl(Register dst, uint8_t imm8) { shl(Operand(dst), imm8); }
|
| + void shl(const Operand& dst, uint8_t imm8);
|
| + void shl_cl(Register dst) { shl_cl(Operand(dst)); }
|
| + void shl_cl(const Operand& dst);
|
|
|
| void shrd(Register dst, Register src) { shrd(dst, Operand(src)); }
|
| void shrd(Register dst, const Operand& src);
|
|
|
| - void shr(Register dst, uint8_t imm8);
|
| - void shr_cl(Register dst);
|
| + void shr(Register dst, uint8_t imm8) { shr(Operand(dst), imm8); }
|
| + void shr(const Operand& dst, uint8_t imm8);
|
| + void shr_cl(Register dst) { shr_cl(Operand(dst)); }
|
| + void shr_cl(const Operand& dst);
|
|
|
| void sub(Register dst, const Immediate& imm) { sub(Operand(dst), imm); }
|
| void sub(const Operand& dst, const Immediate& x);
|
|
|