| Index: src/x87/assembler-x87.cc
|
| diff --git a/src/x87/assembler-x87.cc b/src/x87/assembler-x87.cc
|
| index 557be236ba062f1b3d3495d5cd3d46b51c00bc01..8b5ebcfd9f6427309743245eb5f0026f9593ce69 100644
|
| --- a/src/x87/assembler-x87.cc
|
| +++ b/src/x87/assembler-x87.cc
|
| @@ -567,6 +567,13 @@ void Assembler::xchg(Register dst, Register src) {
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| }
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|
|
|
|
| +void Assembler::xchg(Register dst, const Operand& src) {
|
| + EnsureSpace ensure_space(this);
|
| + EMIT(0x87);
|
| + emit_operand(dst, src);
|
| +}
|
| +
|
| +
|
| void Assembler::adc(Register dst, int32_t imm32) {
|
| EnsureSpace ensure_space(this);
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| emit_arith(2, Operand(dst), Immediate(imm32));
|
| @@ -750,10 +757,17 @@ void Assembler::cdq() {
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| }
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|
|
|
|
| -void Assembler::idiv(Register src) {
|
| +void Assembler::idiv(const Operand& src) {
|
| + EnsureSpace ensure_space(this);
|
| + EMIT(0xF7);
|
| + emit_operand(edi, src);
|
| +}
|
| +
|
| +
|
| +void Assembler::div(const Operand& src) {
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| EnsureSpace ensure_space(this);
|
| EMIT(0xF7);
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| - EMIT(0xF8 | src.code());
|
| + emit_operand(esi, src);
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| }
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|
|
|
|
| @@ -773,14 +787,19 @@ void Assembler::imul(Register dst, const Operand& src) {
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|
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|
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| void Assembler::imul(Register dst, Register src, int32_t imm32) {
|
| + imul(dst, Operand(src), imm32);
|
| +}
|
| +
|
| +
|
| +void Assembler::imul(Register dst, const Operand& src, int32_t imm32) {
|
| EnsureSpace ensure_space(this);
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| if (is_int8(imm32)) {
|
| EMIT(0x6B);
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| - EMIT(0xC0 | dst.code() << 3 | src.code());
|
| + emit_operand(dst, src);
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| EMIT(imm32);
|
| } else {
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| EMIT(0x69);
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| - EMIT(0xC0 | dst.code() << 3 | src.code());
|
| + emit_operand(dst, src);
|
| emit(imm32);
|
| }
|
| }
|
| @@ -820,6 +839,13 @@ void Assembler::neg(Register dst) {
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| }
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|
|
|
|
| +void Assembler::neg(const Operand& dst) {
|
| + EnsureSpace ensure_space(this);
|
| + EMIT(0xF7);
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| + emit_operand(ebx, dst);
|
| +}
|
| +
|
| +
|
| void Assembler::not_(Register dst) {
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| EnsureSpace ensure_space(this);
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| EMIT(0xF7);
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| @@ -827,6 +853,13 @@ void Assembler::not_(Register dst) {
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| }
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|
|
|
|
| +void Assembler::not_(const Operand& dst) {
|
| + EnsureSpace ensure_space(this);
|
| + EMIT(0xF7);
|
| + emit_operand(edx, dst);
|
| +}
|
| +
|
| +
|
| void Assembler::or_(Register dst, int32_t imm32) {
|
| EnsureSpace ensure_space(this);
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| emit_arith(1, Operand(dst), Immediate(imm32));
|
| @@ -902,24 +935,24 @@ void Assembler::ror_cl(Register dst) {
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| }
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|
|
|
|
| -void Assembler::sar(Register dst, uint8_t imm8) {
|
| +void Assembler::sar(const Operand& dst, uint8_t imm8) {
|
| EnsureSpace ensure_space(this);
|
| ASSERT(is_uint5(imm8)); // illegal shift count
|
| if (imm8 == 1) {
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| EMIT(0xD1);
|
| - EMIT(0xF8 | dst.code());
|
| + emit_operand(edi, dst);
|
| } else {
|
| EMIT(0xC1);
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| - EMIT(0xF8 | dst.code());
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| + emit_operand(edi, dst);
|
| EMIT(imm8);
|
| }
|
| }
|
|
|
|
|
| -void Assembler::sar_cl(Register dst) {
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| +void Assembler::sar_cl(const Operand& dst) {
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| EnsureSpace ensure_space(this);
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| EMIT(0xD3);
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| - EMIT(0xF8 | dst.code());
|
| + emit_operand(edi, dst);
|
| }
|
|
|
|
|
| @@ -938,24 +971,24 @@ void Assembler::shld(Register dst, const Operand& src) {
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| }
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|
|
|
|
| -void Assembler::shl(Register dst, uint8_t imm8) {
|
| +void Assembler::shl(const Operand& dst, uint8_t imm8) {
|
| EnsureSpace ensure_space(this);
|
| ASSERT(is_uint5(imm8)); // illegal shift count
|
| if (imm8 == 1) {
|
| EMIT(0xD1);
|
| - EMIT(0xE0 | dst.code());
|
| + emit_operand(esp, dst);
|
| } else {
|
| EMIT(0xC1);
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| - EMIT(0xE0 | dst.code());
|
| + emit_operand(esp, dst);
|
| EMIT(imm8);
|
| }
|
| }
|
|
|
|
|
| -void Assembler::shl_cl(Register dst) {
|
| +void Assembler::shl_cl(const Operand& dst) {
|
| EnsureSpace ensure_space(this);
|
| EMIT(0xD3);
|
| - EMIT(0xE0 | dst.code());
|
| + emit_operand(esp, dst);
|
| }
|
|
|
|
|
| @@ -967,24 +1000,24 @@ void Assembler::shrd(Register dst, const Operand& src) {
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| }
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|
|
|
|
| -void Assembler::shr(Register dst, uint8_t imm8) {
|
| +void Assembler::shr(const Operand& dst, uint8_t imm8) {
|
| EnsureSpace ensure_space(this);
|
| ASSERT(is_uint5(imm8)); // illegal shift count
|
| if (imm8 == 1) {
|
| EMIT(0xD1);
|
| - EMIT(0xE8 | dst.code());
|
| + emit_operand(ebp, dst);
|
| } else {
|
| EMIT(0xC1);
|
| - EMIT(0xE8 | dst.code());
|
| + emit_operand(ebp, dst);
|
| EMIT(imm8);
|
| }
|
| }
|
|
|
|
|
| -void Assembler::shr_cl(Register dst) {
|
| +void Assembler::shr_cl(const Operand& dst) {
|
| EnsureSpace ensure_space(this);
|
| EMIT(0xD3);
|
| - EMIT(0xE8 | dst.code());
|
| + emit_operand(ebp, dst);
|
| }
|
|
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|