DescriptionLower insertelement and extractelement.
Use instructions that do the operations in registers and that are
available in SSE2. Spill to memory to perform the operation in the
absence of any other reasonable options (v16i8 and v16i1).
Unfortunately there is no natural class of SSE2 instructions that
insertelement / extractelement can get lowered
to for all vector types (though pinsr[bwd] and pextr[bwd] are
available in SSE4.1). There are in some cases a large number of
choices available for lowering and I have not looked into which
choices are the best yet, besides using LLVM output as a guide.
BUG=none
R=jvoung@chromium.org, stichnot@chromium.org
Committed: https://gerrit.chromium.org/gerrit/gitweb?p=native_client/pnacl-subzero.git;a=commit;h=4988923
Patch Set 1 #
Total comments: 15
Patch Set 2 : 1) first round of changes 2) add lit test 3) rebase #Patch Set 3 : ICETYPEX8632_TABLE formatting #Patch Set 4 : Use a forward declaration to name i1 vector types in test_vector_ops_main.cpp #
Total comments: 4
Patch Set 5 : Address Jim's comments. #Patch Set 6 : Rebase #
Messages
Total messages: 9 (0 generated)
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