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Unified Diff: src/arm64/macro-assembler-arm64.h

Issue 318773009: ARM64: Clean up support for explicit literal load. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Created 6 years, 6 months ago
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Index: src/arm64/macro-assembler-arm64.h
diff --git a/src/arm64/macro-assembler-arm64.h b/src/arm64/macro-assembler-arm64.h
index 3737692b5ee1cd13e477ee2831c7be67fd6dacf9..3fe5c4bef827349a8e7213051219a738bd6335d2 100644
--- a/src/arm64/macro-assembler-arm64.h
+++ b/src/arm64/macro-assembler-arm64.h
@@ -394,13 +394,10 @@ class MacroAssembler : public Assembler {
inline void Ldpsw(const Register& rt,
const Register& rt2,
const MemOperand& src);
- // Provide both double and float interfaces for FP immediate loads, rather
- // than relying on implicit C++ casts. This allows signalling NaNs to be
- // preserved when the immediate matches the format of fd. Most systems convert
- // signalling NaNs to quiet NaNs when converting between float and double.
- inline void Ldr(const FPRegister& ft, double imm);
- inline void Ldr(const FPRegister& ft, float imm);
- inline void Ldr(const Register& rt, uint64_t imm);
+ // Load a literal from an inline pool.
rmcilroy 2014/06/06 22:48:58 Nit, "Load a literal from the inline constant pool
Rodolph Perfetta (ARM) 2014/06/09 14:12:21 Done.
+ inline void Ldr(const CPURegister& rt, const Immediate& imm);
+ // helper function for double immediate.
rmcilroy 2014/06/06 22:48:58 nit - Helper
Rodolph Perfetta (ARM) 2014/06/09 14:12:21 Done.
+ inline void Ldr(const CPURegister& rt, double imm);
inline void Lsl(const Register& rd, const Register& rn, unsigned shift);
inline void Lsl(const Register& rd, const Register& rn, const Register& rm);
inline void Lsr(const Register& rd, const Register& rn, unsigned shift);

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