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Side by Side Diff: src/arm64/macro-assembler-arm64.h

Issue 318773009: ARM64: Clean up support for explicit literal load. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Created 6 years, 6 months ago
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1 // Copyright 2013 the V8 project authors. All rights reserved. 1 // Copyright 2013 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_ARM64_MACRO_ASSEMBLER_ARM64_H_ 5 #ifndef V8_ARM64_MACRO_ASSEMBLER_ARM64_H_
6 #define V8_ARM64_MACRO_ASSEMBLER_ARM64_H_ 6 #define V8_ARM64_MACRO_ASSEMBLER_ARM64_H_
7 7
8 #include <vector> 8 #include <vector>
9 9
10 #include "src/globals.h" 10 #include "src/globals.h"
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387 inline void Isb(); 387 inline void Isb();
388 inline void Ldnp(const CPURegister& rt, 388 inline void Ldnp(const CPURegister& rt,
389 const CPURegister& rt2, 389 const CPURegister& rt2,
390 const MemOperand& src); 390 const MemOperand& src);
391 inline void Ldp(const CPURegister& rt, 391 inline void Ldp(const CPURegister& rt,
392 const CPURegister& rt2, 392 const CPURegister& rt2,
393 const MemOperand& src); 393 const MemOperand& src);
394 inline void Ldpsw(const Register& rt, 394 inline void Ldpsw(const Register& rt,
395 const Register& rt2, 395 const Register& rt2,
396 const MemOperand& src); 396 const MemOperand& src);
397 // Provide both double and float interfaces for FP immediate loads, rather 397 // Load a literal from an inline pool.
rmcilroy 2014/06/06 22:48:58 Nit, "Load a literal from the inline constant pool
Rodolph Perfetta (ARM) 2014/06/09 14:12:21 Done.
398 // than relying on implicit C++ casts. This allows signalling NaNs to be 398 inline void Ldr(const CPURegister& rt, const Immediate& imm);
399 // preserved when the immediate matches the format of fd. Most systems convert 399 // helper function for double immediate.
rmcilroy 2014/06/06 22:48:58 nit - Helper
Rodolph Perfetta (ARM) 2014/06/09 14:12:21 Done.
400 // signalling NaNs to quiet NaNs when converting between float and double. 400 inline void Ldr(const CPURegister& rt, double imm);
401 inline void Ldr(const FPRegister& ft, double imm);
402 inline void Ldr(const FPRegister& ft, float imm);
403 inline void Ldr(const Register& rt, uint64_t imm);
404 inline void Lsl(const Register& rd, const Register& rn, unsigned shift); 401 inline void Lsl(const Register& rd, const Register& rn, unsigned shift);
405 inline void Lsl(const Register& rd, const Register& rn, const Register& rm); 402 inline void Lsl(const Register& rd, const Register& rn, const Register& rm);
406 inline void Lsr(const Register& rd, const Register& rn, unsigned shift); 403 inline void Lsr(const Register& rd, const Register& rn, unsigned shift);
407 inline void Lsr(const Register& rd, const Register& rn, const Register& rm); 404 inline void Lsr(const Register& rd, const Register& rn, const Register& rm);
408 inline void Madd(const Register& rd, 405 inline void Madd(const Register& rd,
409 const Register& rn, 406 const Register& rn,
410 const Register& rm, 407 const Register& rm,
411 const Register& ra); 408 const Register& ra);
412 inline void Mneg(const Register& rd, const Register& rn, const Register& rm); 409 inline void Mneg(const Register& rd, const Register& rn, const Register& rm);
413 inline void Mov(const Register& rd, const Register& rm); 410 inline void Mov(const Register& rd, const Register& rm);
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2321 #error "Unsupported option" 2318 #error "Unsupported option"
2322 #define CODE_COVERAGE_STRINGIFY(x) #x 2319 #define CODE_COVERAGE_STRINGIFY(x) #x
2323 #define CODE_COVERAGE_TOSTRING(x) CODE_COVERAGE_STRINGIFY(x) 2320 #define CODE_COVERAGE_TOSTRING(x) CODE_COVERAGE_STRINGIFY(x)
2324 #define __FILE_LINE__ __FILE__ ":" CODE_COVERAGE_TOSTRING(__LINE__) 2321 #define __FILE_LINE__ __FILE__ ":" CODE_COVERAGE_TOSTRING(__LINE__)
2325 #define ACCESS_MASM(masm) masm->stop(__FILE_LINE__); masm-> 2322 #define ACCESS_MASM(masm) masm->stop(__FILE_LINE__); masm->
2326 #else 2323 #else
2327 #define ACCESS_MASM(masm) masm-> 2324 #define ACCESS_MASM(masm) masm->
2328 #endif 2325 #endif
2329 2326
2330 #endif // V8_ARM64_MACRO_ASSEMBLER_ARM64_H_ 2327 #endif // V8_ARM64_MACRO_ASSEMBLER_ARM64_H_
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