Chromium Code Reviews| Index: src/base/atomicops_internals_arm_gcc.h |
| diff --git a/src/atomicops_internals_arm_gcc.h b/src/base/atomicops_internals_arm_gcc.h |
| similarity index 98% |
| rename from src/atomicops_internals_arm_gcc.h |
| rename to src/base/atomicops_internals_arm_gcc.h |
| index b72ffb6a6dd7b844a0f743a4b4dfadc00b8f131a..03c1e650c178efbd2ebb99527e2f745a0d662024 100644 |
| --- a/src/atomicops_internals_arm_gcc.h |
| +++ b/src/base/atomicops_internals_arm_gcc.h |
| @@ -6,15 +6,15 @@ |
| // |
| // LinuxKernelCmpxchg and Barrier_AtomicIncrement are from Google Gears. |
| -#ifndef V8_ATOMICOPS_INTERNALS_ARM_GCC_H_ |
| -#define V8_ATOMICOPS_INTERNALS_ARM_GCC_H_ |
| +#ifndef V8_BASE_ATOMICOPS_INTERNALS_ARM_GCC_H_ |
| +#define V8_BASE_ATOMICOPS_INTERNALS_ARM_GCC_H_ |
| #if defined(__QNXNTO__) |
| #include <sys/cpuinline.h> |
| #endif |
| namespace v8 { |
| -namespace internal { |
| +namespace base { |
| // Memory barriers on ARM are funky, but the kernel is here to help: |
| // |
| @@ -296,6 +296,6 @@ inline void NoBarrier_Store(volatile Atomic8* ptr, Atomic8 value) { |
| inline Atomic8 NoBarrier_Load(volatile const Atomic8* ptr) { return *ptr; } |
| -} } // namespace v8::internal |
| +} } // namespace v8::bae |
|
Jakob Kummerow
2014/06/05 11:49:06
nit: typo
|
| -#endif // V8_ATOMICOPS_INTERNALS_ARM_GCC_H_ |
| +#endif // V8_BASE_ATOMICOPS_INTERNALS_ARM_GCC_H_ |