Reduce register pressure on ARM, ARM64, and MIPS.

runtime/vm/assembler_arm64.h

Index: runtime/vm/assembler_arm64.h
===================================================================
--- runtime/vm/assembler_arm64.h	(revision 36746)
+++ runtime/vm/assembler_arm64.h	(working copy)
@@ -612,10 +612,10 @@
 
   // Conditional select.
   void csel(Register rd, Register rn, Register rm, Condition cond) {
-    EmitCoditionalSelect(CSEL, rd, rn, rm, cond, kDoubleWord);
+    EmitConditionalSelect(CSEL, rd, rn, rm, cond, kDoubleWord);
   }
   void csinc(Register rd, Register rn, Register rm, Condition cond) {
-    EmitCoditionalSelect(CSINC, rd, rn, rm, cond, kDoubleWord);
+    EmitConditionalSelect(CSINC, rd, rn, rm, cond, kDoubleWord);
   }
   void cinc(Register rd, Register rn, Condition cond) {
     csinc(rd, rn, rn, InvertCondition(cond));
@@ -623,6 +623,15 @@
   void cset(Register rd, Condition cond) {
     csinc(rd, ZR, ZR, InvertCondition(cond));
   }
+  void csinv(Register rd, Register rn, Register rm, Condition cond) {
+    EmitConditionalSelect(CSINV, rd, rn, rm, cond, kDoubleWord);
+  }
+  void cinv(Register rd, Register rn, Condition cond) {
+    csinv(rd, rn, rn, InvertCondition(cond));
+  }
+  void csetm(Register rd, Condition cond) {
+    csinv(rd, ZR, ZR, InvertCondition(cond));
+  }
 
   // Comparison.
   // rn cmp o.
@@ -1010,6 +1019,9 @@
   void SmiUntag(Register reg) {
     Asr(reg, reg, kSmiTagSize);
   }
+  void SmiUntag(Register dst, Register src) {
+    Asr(dst, src, kSmiTagSize);
+  }
   void SmiTag(Register reg) {
     Lsl(reg, reg, kSmiTagSize);
   }
@@ -1549,9 +1561,9 @@
     Emit(encoding);
   }
 
-  void EmitCoditionalSelect(ConditionalSelectOp op,
-                            Register rd, Register rn, Register rm,
-                            Condition cond, OperandSize sz) {
+  void EmitConditionalSelect(ConditionalSelectOp op,
+                             Register rd, Register rn, Register rm,
+                             Condition cond, OperandSize sz) {
     ASSERT((rd != SP) && (rn != SP) && (rm != SP));
     ASSERT((sz == kDoubleWord) || (sz == kWord) || (sz == kUnsignedWord));
     const Register crd = ConcreteRegister(rd);