| Index: runtime/vm/assembler_ia32.cc
|
| diff --git a/runtime/vm/assembler_ia32.cc b/runtime/vm/assembler_ia32.cc
|
| index a437c29cf829b1772eaf0c70a2b043b07ba20f12..d06a3be4666ff4455d74a3ac4f4df4cc75aeaa2a 100644
|
| --- a/runtime/vm/assembler_ia32.cc
|
| +++ b/runtime/vm/assembler_ia32.cc
|
| @@ -18,7 +18,6 @@ namespace dart {
|
|
|
| DECLARE_FLAG(bool, inline_alloc);
|
|
|
| -
|
| class DirectCallRelocation : public AssemblerFixup {
|
| public:
|
| void Process(const MemoryRegion& region, intptr_t position) {
|
| @@ -31,7 +30,6 @@ class DirectCallRelocation : public AssemblerFixup {
|
| virtual bool IsPointerOffset() const { return false; }
|
| };
|
|
|
| -
|
| int32_t Assembler::jit_cookie() {
|
| if (jit_cookie_ == 0) {
|
| jit_cookie_ =
|
| @@ -40,26 +38,22 @@ int32_t Assembler::jit_cookie() {
|
| return jit_cookie_;
|
| }
|
|
|
| -
|
| void Assembler::InitializeMemoryWithBreakpoints(uword data, intptr_t length) {
|
| memset(reinterpret_cast<void*>(data), Instr::kBreakPointInstruction, length);
|
| }
|
|
|
| -
|
| void Assembler::call(Register reg) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xFF);
|
| EmitRegisterOperand(2, reg);
|
| }
|
|
|
| -
|
| void Assembler::call(const Address& address) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xFF);
|
| EmitOperand(2, address);
|
| }
|
|
|
| -
|
| void Assembler::call(Label* label) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xE8);
|
| @@ -67,7 +61,6 @@ void Assembler::call(Label* label) {
|
| EmitLabel(label, kSize);
|
| }
|
|
|
| -
|
| void Assembler::call(const ExternalLabel* label) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| intptr_t call_start = buffer_.GetPosition();
|
| @@ -77,20 +70,17 @@ void Assembler::call(const ExternalLabel* label) {
|
| ASSERT((buffer_.GetPosition() - call_start) == kCallExternalLabelSize);
|
| }
|
|
|
| -
|
| void Assembler::pushl(Register reg) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x50 + reg);
|
| }
|
|
|
| -
|
| void Assembler::pushl(const Address& address) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xFF);
|
| EmitOperand(6, address);
|
| }
|
|
|
| -
|
| void Assembler::pushl(const Immediate& imm) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| if (imm.is_int8()) {
|
| @@ -102,32 +92,27 @@ void Assembler::pushl(const Immediate& imm) {
|
| }
|
| }
|
|
|
| -
|
| void Assembler::popl(Register reg) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x58 + reg);
|
| }
|
|
|
| -
|
| void Assembler::popl(const Address& address) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x8F);
|
| EmitOperand(0, address);
|
| }
|
|
|
| -
|
| void Assembler::pushal() {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x60);
|
| }
|
|
|
| -
|
| void Assembler::popal() {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x61);
|
| }
|
|
|
| -
|
| void Assembler::setcc(Condition condition, ByteRegister dst) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| @@ -135,35 +120,30 @@ void Assembler::setcc(Condition condition, ByteRegister dst) {
|
| EmitUint8(0xC0 + dst);
|
| }
|
|
|
| -
|
| void Assembler::movl(Register dst, const Immediate& imm) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xB8 + dst);
|
| EmitImmediate(imm);
|
| }
|
|
|
| -
|
| void Assembler::movl(Register dst, Register src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x89);
|
| EmitRegisterOperand(src, dst);
|
| }
|
|
|
| -
|
| void Assembler::movl(Register dst, const Address& src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x8B);
|
| EmitOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::movl(const Address& dst, Register src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x89);
|
| EmitOperand(src, dst);
|
| }
|
|
|
| -
|
| void Assembler::movl(const Address& dst, const Immediate& imm) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xC7);
|
| @@ -171,7 +151,6 @@ void Assembler::movl(const Address& dst, const Immediate& imm) {
|
| EmitImmediate(imm);
|
| }
|
|
|
| -
|
| void Assembler::movzxb(Register dst, ByteRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| @@ -179,7 +158,6 @@ void Assembler::movzxb(Register dst, ByteRegister src) {
|
| EmitRegisterOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::movzxb(Register dst, const Address& src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| @@ -187,7 +165,6 @@ void Assembler::movzxb(Register dst, const Address& src) {
|
| EmitOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::movsxb(Register dst, ByteRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| @@ -195,7 +172,6 @@ void Assembler::movsxb(Register dst, ByteRegister src) {
|
| EmitRegisterOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::movsxb(Register dst, const Address& src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| @@ -203,19 +179,16 @@ void Assembler::movsxb(Register dst, const Address& src) {
|
| EmitOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::movb(Register dst, const Address& src) {
|
| FATAL("Use movzxb or movsxb instead.");
|
| }
|
|
|
| -
|
| void Assembler::movb(const Address& dst, ByteRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x88);
|
| EmitOperand(src, dst);
|
| }
|
|
|
| -
|
| void Assembler::movb(const Address& dst, const Immediate& imm) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xC6);
|
| @@ -224,7 +197,6 @@ void Assembler::movb(const Address& dst, const Immediate& imm) {
|
| EmitUint8(imm.value() & 0xFF);
|
| }
|
|
|
| -
|
| void Assembler::movzxw(Register dst, Register src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| @@ -232,7 +204,6 @@ void Assembler::movzxw(Register dst, Register src) {
|
| EmitRegisterOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::movzxw(Register dst, const Address& src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| @@ -240,7 +211,6 @@ void Assembler::movzxw(Register dst, const Address& src) {
|
| EmitOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::movsxw(Register dst, Register src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| @@ -248,7 +218,6 @@ void Assembler::movsxw(Register dst, Register src) {
|
| EmitRegisterOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::movsxw(Register dst, const Address& src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| @@ -256,12 +225,10 @@ void Assembler::movsxw(Register dst, const Address& src) {
|
| EmitOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::movw(Register dst, const Address& src) {
|
| FATAL("Use movzxw or movsxw instead.");
|
| }
|
|
|
| -
|
| void Assembler::movw(const Address& dst, Register src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitOperandSizeOverride();
|
| @@ -269,7 +236,6 @@ void Assembler::movw(const Address& dst, Register src) {
|
| EmitOperand(src, dst);
|
| }
|
|
|
| -
|
| void Assembler::movw(const Address& dst, const Immediate& imm) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitOperandSizeOverride();
|
| @@ -279,14 +245,12 @@ void Assembler::movw(const Address& dst, const Immediate& imm) {
|
| EmitUint8((imm.value() >> 8) & 0xFF);
|
| }
|
|
|
| -
|
| void Assembler::leal(Register dst, const Address& src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x8D);
|
| EmitOperand(dst, src);
|
| }
|
|
|
| -
|
| // Move if not overflow.
|
| void Assembler::cmovno(Register dst, Register src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| @@ -295,7 +259,6 @@ void Assembler::cmovno(Register dst, Register src) {
|
| EmitRegisterOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::cmove(Register dst, Register src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| @@ -303,7 +266,6 @@ void Assembler::cmove(Register dst, Register src) {
|
| EmitRegisterOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::cmovne(Register dst, Register src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| @@ -311,7 +273,6 @@ void Assembler::cmovne(Register dst, Register src) {
|
| EmitRegisterOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::cmovs(Register dst, Register src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| @@ -319,7 +280,6 @@ void Assembler::cmovs(Register dst, Register src) {
|
| EmitRegisterOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::cmovns(Register dst, Register src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| @@ -327,7 +287,6 @@ void Assembler::cmovns(Register dst, Register src) {
|
| EmitRegisterOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::cmovgel(Register dst, Register src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| @@ -335,7 +294,6 @@ void Assembler::cmovgel(Register dst, Register src) {
|
| EmitRegisterOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::cmovlessl(Register dst, Register src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| @@ -343,14 +301,12 @@ void Assembler::cmovlessl(Register dst, Register src) {
|
| EmitRegisterOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::rep_movsb() {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xF3);
|
| EmitUint8(0xA4);
|
| }
|
|
|
| -
|
| void Assembler::movss(XmmRegister dst, const Address& src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xF3);
|
| @@ -359,7 +315,6 @@ void Assembler::movss(XmmRegister dst, const Address& src) {
|
| EmitOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::movss(const Address& dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xF3);
|
| @@ -368,7 +323,6 @@ void Assembler::movss(const Address& dst, XmmRegister src) {
|
| EmitOperand(src, dst);
|
| }
|
|
|
| -
|
| void Assembler::movss(XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xF3);
|
| @@ -377,7 +331,6 @@ void Assembler::movss(XmmRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(src, dst);
|
| }
|
|
|
| -
|
| void Assembler::movd(XmmRegister dst, Register src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x66);
|
| @@ -386,7 +339,6 @@ void Assembler::movd(XmmRegister dst, Register src) {
|
| EmitOperand(dst, Operand(src));
|
| }
|
|
|
| -
|
| void Assembler::movd(Register dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x66);
|
| @@ -395,7 +347,6 @@ void Assembler::movd(Register dst, XmmRegister src) {
|
| EmitOperand(src, Operand(dst));
|
| }
|
|
|
| -
|
| void Assembler::movq(const Address& dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x66);
|
| @@ -404,7 +355,6 @@ void Assembler::movq(const Address& dst, XmmRegister src) {
|
| EmitOperand(src, Operand(dst));
|
| }
|
|
|
| -
|
| void Assembler::movq(XmmRegister dst, const Address& src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xF3);
|
| @@ -413,7 +363,6 @@ void Assembler::movq(XmmRegister dst, const Address& src) {
|
| EmitOperand(dst, Operand(src));
|
| }
|
|
|
| -
|
| void Assembler::addss(XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xF3);
|
| @@ -422,7 +371,6 @@ void Assembler::addss(XmmRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::addss(XmmRegister dst, const Address& src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xF3);
|
| @@ -431,7 +379,6 @@ void Assembler::addss(XmmRegister dst, const Address& src) {
|
| EmitOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::subss(XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xF3);
|
| @@ -440,7 +387,6 @@ void Assembler::subss(XmmRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::subss(XmmRegister dst, const Address& src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xF3);
|
| @@ -449,7 +395,6 @@ void Assembler::subss(XmmRegister dst, const Address& src) {
|
| EmitOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::mulss(XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xF3);
|
| @@ -458,7 +403,6 @@ void Assembler::mulss(XmmRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::mulss(XmmRegister dst, const Address& src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xF3);
|
| @@ -467,7 +411,6 @@ void Assembler::mulss(XmmRegister dst, const Address& src) {
|
| EmitOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::divss(XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xF3);
|
| @@ -476,7 +419,6 @@ void Assembler::divss(XmmRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::divss(XmmRegister dst, const Address& src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xF3);
|
| @@ -485,21 +427,18 @@ void Assembler::divss(XmmRegister dst, const Address& src) {
|
| EmitOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::flds(const Address& src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xD9);
|
| EmitOperand(0, src);
|
| }
|
|
|
| -
|
| void Assembler::fstps(const Address& dst) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xD9);
|
| EmitOperand(3, dst);
|
| }
|
|
|
| -
|
| void Assembler::movsd(XmmRegister dst, const Address& src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xF2);
|
| @@ -508,7 +447,6 @@ void Assembler::movsd(XmmRegister dst, const Address& src) {
|
| EmitOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::movsd(const Address& dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xF2);
|
| @@ -517,7 +455,6 @@ void Assembler::movsd(const Address& dst, XmmRegister src) {
|
| EmitOperand(src, dst);
|
| }
|
|
|
| -
|
| void Assembler::movsd(XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xF2);
|
| @@ -526,7 +463,6 @@ void Assembler::movsd(XmmRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(src, dst);
|
| }
|
|
|
| -
|
| void Assembler::movaps(XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| @@ -534,7 +470,6 @@ void Assembler::movaps(XmmRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::movups(XmmRegister dst, const Address& src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| @@ -542,7 +477,6 @@ void Assembler::movups(XmmRegister dst, const Address& src) {
|
| EmitOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::movups(const Address& dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| @@ -550,7 +484,6 @@ void Assembler::movups(const Address& dst, XmmRegister src) {
|
| EmitOperand(src, dst);
|
| }
|
|
|
| -
|
| void Assembler::addsd(XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xF2);
|
| @@ -559,7 +492,6 @@ void Assembler::addsd(XmmRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::addsd(XmmRegister dst, const Address& src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xF2);
|
| @@ -568,7 +500,6 @@ void Assembler::addsd(XmmRegister dst, const Address& src) {
|
| EmitOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::addpl(XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x66);
|
| @@ -577,7 +508,6 @@ void Assembler::addpl(XmmRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::subpl(XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x66);
|
| @@ -586,7 +516,6 @@ void Assembler::subpl(XmmRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::addps(XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| @@ -594,7 +523,6 @@ void Assembler::addps(XmmRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::subps(XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| @@ -602,7 +530,6 @@ void Assembler::subps(XmmRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::divps(XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| @@ -610,7 +537,6 @@ void Assembler::divps(XmmRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::mulps(XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| @@ -618,7 +544,6 @@ void Assembler::mulps(XmmRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::minps(XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| @@ -626,7 +551,6 @@ void Assembler::minps(XmmRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::maxps(XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| @@ -634,7 +558,6 @@ void Assembler::maxps(XmmRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::andps(XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| @@ -642,7 +565,6 @@ void Assembler::andps(XmmRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::andps(XmmRegister dst, const Address& src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| @@ -650,7 +572,6 @@ void Assembler::andps(XmmRegister dst, const Address& src) {
|
| EmitOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::orps(XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| @@ -658,7 +579,6 @@ void Assembler::orps(XmmRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::notps(XmmRegister dst) {
|
| static const struct ALIGN16 {
|
| uint32_t a;
|
| @@ -669,7 +589,6 @@ void Assembler::notps(XmmRegister dst) {
|
| xorps(dst, Address::Absolute(reinterpret_cast<uword>(&float_not_constant)));
|
| }
|
|
|
| -
|
| void Assembler::negateps(XmmRegister dst) {
|
| static const struct ALIGN16 {
|
| uint32_t a;
|
| @@ -681,7 +600,6 @@ void Assembler::negateps(XmmRegister dst) {
|
| Address::Absolute(reinterpret_cast<uword>(&float_negate_constant)));
|
| }
|
|
|
| -
|
| void Assembler::absps(XmmRegister dst) {
|
| static const struct ALIGN16 {
|
| uint32_t a;
|
| @@ -693,7 +611,6 @@ void Assembler::absps(XmmRegister dst) {
|
| Address::Absolute(reinterpret_cast<uword>(&float_absolute_constant)));
|
| }
|
|
|
| -
|
| void Assembler::zerowps(XmmRegister dst) {
|
| static const struct ALIGN16 {
|
| uint32_t a;
|
| @@ -704,7 +621,6 @@ void Assembler::zerowps(XmmRegister dst) {
|
| andps(dst, Address::Absolute(reinterpret_cast<uword>(&float_zerow_constant)));
|
| }
|
|
|
| -
|
| void Assembler::cmppseq(XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| @@ -713,7 +629,6 @@ void Assembler::cmppseq(XmmRegister dst, XmmRegister src) {
|
| EmitUint8(0x0);
|
| }
|
|
|
| -
|
| void Assembler::cmppsneq(XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| @@ -722,7 +637,6 @@ void Assembler::cmppsneq(XmmRegister dst, XmmRegister src) {
|
| EmitUint8(0x4);
|
| }
|
|
|
| -
|
| void Assembler::cmppslt(XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| @@ -731,7 +645,6 @@ void Assembler::cmppslt(XmmRegister dst, XmmRegister src) {
|
| EmitUint8(0x1);
|
| }
|
|
|
| -
|
| void Assembler::cmppsle(XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| @@ -740,7 +653,6 @@ void Assembler::cmppsle(XmmRegister dst, XmmRegister src) {
|
| EmitUint8(0x2);
|
| }
|
|
|
| -
|
| void Assembler::cmppsnlt(XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| @@ -749,7 +661,6 @@ void Assembler::cmppsnlt(XmmRegister dst, XmmRegister src) {
|
| EmitUint8(0x5);
|
| }
|
|
|
| -
|
| void Assembler::cmppsnle(XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| @@ -758,7 +669,6 @@ void Assembler::cmppsnle(XmmRegister dst, XmmRegister src) {
|
| EmitUint8(0x6);
|
| }
|
|
|
| -
|
| void Assembler::sqrtps(XmmRegister dst) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| @@ -766,7 +676,6 @@ void Assembler::sqrtps(XmmRegister dst) {
|
| EmitXmmRegisterOperand(dst, dst);
|
| }
|
|
|
| -
|
| void Assembler::rsqrtps(XmmRegister dst) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| @@ -774,7 +683,6 @@ void Assembler::rsqrtps(XmmRegister dst) {
|
| EmitXmmRegisterOperand(dst, dst);
|
| }
|
|
|
| -
|
| void Assembler::reciprocalps(XmmRegister dst) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| @@ -782,7 +690,6 @@ void Assembler::reciprocalps(XmmRegister dst) {
|
| EmitXmmRegisterOperand(dst, dst);
|
| }
|
|
|
| -
|
| void Assembler::movhlps(XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| @@ -790,7 +697,6 @@ void Assembler::movhlps(XmmRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::movlhps(XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| @@ -798,7 +704,6 @@ void Assembler::movlhps(XmmRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::unpcklps(XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| @@ -806,7 +711,6 @@ void Assembler::unpcklps(XmmRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::unpckhps(XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| @@ -814,7 +718,6 @@ void Assembler::unpckhps(XmmRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::unpcklpd(XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x66);
|
| @@ -823,7 +726,6 @@ void Assembler::unpcklpd(XmmRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::unpckhpd(XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x66);
|
| @@ -832,7 +734,6 @@ void Assembler::unpckhpd(XmmRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::set1ps(XmmRegister dst, Register tmp1, const Immediate& imm) {
|
| // Load 32-bit immediate value into tmp1.
|
| movl(tmp1, imm);
|
| @@ -842,7 +743,6 @@ void Assembler::set1ps(XmmRegister dst, Register tmp1, const Immediate& imm) {
|
| shufps(dst, dst, Immediate(0x0));
|
| }
|
|
|
| -
|
| void Assembler::shufps(XmmRegister dst, XmmRegister src, const Immediate& imm) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| @@ -852,7 +752,6 @@ void Assembler::shufps(XmmRegister dst, XmmRegister src, const Immediate& imm) {
|
| EmitUint8(imm.value());
|
| }
|
|
|
| -
|
| void Assembler::addpd(XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x66);
|
| @@ -861,7 +760,6 @@ void Assembler::addpd(XmmRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::negatepd(XmmRegister dst) {
|
| static const struct ALIGN16 {
|
| uint64_t a;
|
| @@ -871,7 +769,6 @@ void Assembler::negatepd(XmmRegister dst) {
|
| Address::Absolute(reinterpret_cast<uword>(&double_negate_constant)));
|
| }
|
|
|
| -
|
| void Assembler::subpd(XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x66);
|
| @@ -880,7 +777,6 @@ void Assembler::subpd(XmmRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::mulpd(XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x66);
|
| @@ -889,7 +785,6 @@ void Assembler::mulpd(XmmRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::divpd(XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x66);
|
| @@ -898,7 +793,6 @@ void Assembler::divpd(XmmRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::abspd(XmmRegister dst) {
|
| static const struct ALIGN16 {
|
| uint64_t a;
|
| @@ -908,7 +802,6 @@ void Assembler::abspd(XmmRegister dst) {
|
| Address::Absolute(reinterpret_cast<uword>(&double_absolute_constant)));
|
| }
|
|
|
| -
|
| void Assembler::minpd(XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x66);
|
| @@ -917,7 +810,6 @@ void Assembler::minpd(XmmRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::maxpd(XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x66);
|
| @@ -926,7 +818,6 @@ void Assembler::maxpd(XmmRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::sqrtpd(XmmRegister dst) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x66);
|
| @@ -935,7 +826,6 @@ void Assembler::sqrtpd(XmmRegister dst) {
|
| EmitXmmRegisterOperand(dst, dst);
|
| }
|
|
|
| -
|
| void Assembler::cvtps2pd(XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| @@ -943,7 +833,6 @@ void Assembler::cvtps2pd(XmmRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::cvtpd2ps(XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x66);
|
| @@ -952,7 +841,6 @@ void Assembler::cvtpd2ps(XmmRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::shufpd(XmmRegister dst, XmmRegister src, const Immediate& imm) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x66);
|
| @@ -963,7 +851,6 @@ void Assembler::shufpd(XmmRegister dst, XmmRegister src, const Immediate& imm) {
|
| EmitUint8(imm.value());
|
| }
|
|
|
| -
|
| void Assembler::subsd(XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xF2);
|
| @@ -972,7 +859,6 @@ void Assembler::subsd(XmmRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::subsd(XmmRegister dst, const Address& src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xF2);
|
| @@ -981,7 +867,6 @@ void Assembler::subsd(XmmRegister dst, const Address& src) {
|
| EmitOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::mulsd(XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xF2);
|
| @@ -990,7 +875,6 @@ void Assembler::mulsd(XmmRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::mulsd(XmmRegister dst, const Address& src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xF2);
|
| @@ -999,7 +883,6 @@ void Assembler::mulsd(XmmRegister dst, const Address& src) {
|
| EmitOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::divsd(XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xF2);
|
| @@ -1008,7 +891,6 @@ void Assembler::divsd(XmmRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::divsd(XmmRegister dst, const Address& src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xF2);
|
| @@ -1017,7 +899,6 @@ void Assembler::divsd(XmmRegister dst, const Address& src) {
|
| EmitOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::cvtsi2ss(XmmRegister dst, Register src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xF3);
|
| @@ -1026,7 +907,6 @@ void Assembler::cvtsi2ss(XmmRegister dst, Register src) {
|
| EmitOperand(dst, Operand(src));
|
| }
|
|
|
| -
|
| void Assembler::cvtsi2sd(XmmRegister dst, Register src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xF2);
|
| @@ -1035,7 +915,6 @@ void Assembler::cvtsi2sd(XmmRegister dst, Register src) {
|
| EmitOperand(dst, Operand(src));
|
| }
|
|
|
| -
|
| void Assembler::cvtss2si(Register dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xF3);
|
| @@ -1044,7 +923,6 @@ void Assembler::cvtss2si(Register dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::cvtss2sd(XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xF3);
|
| @@ -1053,7 +931,6 @@ void Assembler::cvtss2sd(XmmRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::cvtsd2si(Register dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xF2);
|
| @@ -1062,7 +939,6 @@ void Assembler::cvtsd2si(Register dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::cvttss2si(Register dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xF3);
|
| @@ -1071,7 +947,6 @@ void Assembler::cvttss2si(Register dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::cvttsd2si(Register dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xF2);
|
| @@ -1080,7 +955,6 @@ void Assembler::cvttsd2si(Register dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::cvtsd2ss(XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xF2);
|
| @@ -1089,7 +963,6 @@ void Assembler::cvtsd2ss(XmmRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::cvtdq2pd(XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xF3);
|
| @@ -1098,7 +971,6 @@ void Assembler::cvtdq2pd(XmmRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::comiss(XmmRegister a, XmmRegister b) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| @@ -1106,7 +978,6 @@ void Assembler::comiss(XmmRegister a, XmmRegister b) {
|
| EmitXmmRegisterOperand(a, b);
|
| }
|
|
|
| -
|
| void Assembler::comisd(XmmRegister a, XmmRegister b) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x66);
|
| @@ -1115,7 +986,6 @@ void Assembler::comisd(XmmRegister a, XmmRegister b) {
|
| EmitXmmRegisterOperand(a, b);
|
| }
|
|
|
| -
|
| void Assembler::movmskpd(Register dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x66);
|
| @@ -1124,7 +994,6 @@ void Assembler::movmskpd(Register dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::movmskps(Register dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| @@ -1132,7 +1001,6 @@ void Assembler::movmskps(Register dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::sqrtsd(XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xF2);
|
| @@ -1141,7 +1009,6 @@ void Assembler::sqrtsd(XmmRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::sqrtss(XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xF3);
|
| @@ -1150,7 +1017,6 @@ void Assembler::sqrtss(XmmRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::xorpd(XmmRegister dst, const Address& src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x66);
|
| @@ -1159,7 +1025,6 @@ void Assembler::xorpd(XmmRegister dst, const Address& src) {
|
| EmitOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::xorpd(XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x66);
|
| @@ -1168,7 +1033,6 @@ void Assembler::xorpd(XmmRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::orpd(XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x66);
|
| @@ -1177,7 +1041,6 @@ void Assembler::orpd(XmmRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::xorps(XmmRegister dst, const Address& src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| @@ -1185,7 +1048,6 @@ void Assembler::xorps(XmmRegister dst, const Address& src) {
|
| EmitOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::xorps(XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| @@ -1193,7 +1055,6 @@ void Assembler::xorps(XmmRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::andpd(XmmRegister dst, const Address& src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x66);
|
| @@ -1202,7 +1063,6 @@ void Assembler::andpd(XmmRegister dst, const Address& src) {
|
| EmitOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::andpd(XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x66);
|
| @@ -1211,7 +1071,6 @@ void Assembler::andpd(XmmRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::pextrd(Register dst, XmmRegister src, const Immediate& imm) {
|
| ASSERT(TargetCPUFeatures::sse4_1_supported());
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| @@ -1224,7 +1083,6 @@ void Assembler::pextrd(Register dst, XmmRegister src, const Immediate& imm) {
|
| EmitUint8(imm.value());
|
| }
|
|
|
| -
|
| void Assembler::pmovsxdq(XmmRegister dst, XmmRegister src) {
|
| ASSERT(TargetCPUFeatures::sse4_1_supported());
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| @@ -1235,7 +1093,6 @@ void Assembler::pmovsxdq(XmmRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::pcmpeqq(XmmRegister dst, XmmRegister src) {
|
| ASSERT(TargetCPUFeatures::sse4_1_supported());
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| @@ -1246,7 +1103,6 @@ void Assembler::pcmpeqq(XmmRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::pxor(XmmRegister dst, XmmRegister src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x66);
|
| @@ -1255,7 +1111,6 @@ void Assembler::pxor(XmmRegister dst, XmmRegister src) {
|
| EmitXmmRegisterOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::roundsd(XmmRegister dst, XmmRegister src, RoundingMode mode) {
|
| ASSERT(TargetCPUFeatures::sse4_1_supported());
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| @@ -1268,70 +1123,60 @@ void Assembler::roundsd(XmmRegister dst, XmmRegister src, RoundingMode mode) {
|
| EmitUint8(static_cast<uint8_t>(mode) | 0x8);
|
| }
|
|
|
| -
|
| void Assembler::fldl(const Address& src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xDD);
|
| EmitOperand(0, src);
|
| }
|
|
|
| -
|
| void Assembler::fstpl(const Address& dst) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xDD);
|
| EmitOperand(3, dst);
|
| }
|
|
|
| -
|
| void Assembler::fnstcw(const Address& dst) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xD9);
|
| EmitOperand(7, dst);
|
| }
|
|
|
| -
|
| void Assembler::fldcw(const Address& src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xD9);
|
| EmitOperand(5, src);
|
| }
|
|
|
| -
|
| void Assembler::fistpl(const Address& dst) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xDF);
|
| EmitOperand(7, dst);
|
| }
|
|
|
| -
|
| void Assembler::fistps(const Address& dst) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xDB);
|
| EmitOperand(3, dst);
|
| }
|
|
|
| -
|
| void Assembler::fildl(const Address& src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xDF);
|
| EmitOperand(5, src);
|
| }
|
|
|
| -
|
| void Assembler::filds(const Address& src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xDB);
|
| EmitOperand(0, src);
|
| }
|
|
|
| -
|
| void Assembler::fincstp() {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xD9);
|
| EmitUint8(0xF7);
|
| }
|
|
|
| -
|
| void Assembler::ffree(intptr_t value) {
|
| ASSERT(value < 7);
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| @@ -1339,89 +1184,76 @@ void Assembler::ffree(intptr_t value) {
|
| EmitUint8(0xC0 + value);
|
| }
|
|
|
| -
|
| void Assembler::fsin() {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xD9);
|
| EmitUint8(0xFE);
|
| }
|
|
|
| -
|
| void Assembler::fcos() {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xD9);
|
| EmitUint8(0xFF);
|
| }
|
|
|
| -
|
| void Assembler::fsincos() {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xD9);
|
| EmitUint8(0xFB);
|
| }
|
|
|
| -
|
| void Assembler::fptan() {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xD9);
|
| EmitUint8(0xF2);
|
| }
|
|
|
| -
|
| void Assembler::xchgl(Register dst, Register src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x87);
|
| EmitRegisterOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::cmpl(Register reg, const Immediate& imm) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitComplex(7, Operand(reg), imm);
|
| }
|
|
|
| -
|
| void Assembler::cmpl(Register reg0, Register reg1) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x3B);
|
| EmitOperand(reg0, Operand(reg1));
|
| }
|
|
|
| -
|
| void Assembler::cmpl(Register reg, const Address& address) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x3B);
|
| EmitOperand(reg, address);
|
| }
|
|
|
| -
|
| void Assembler::addl(Register dst, Register src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x03);
|
| EmitRegisterOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::addl(Register reg, const Address& address) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x03);
|
| EmitOperand(reg, address);
|
| }
|
|
|
| -
|
| void Assembler::cmpl(const Address& address, Register reg) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x39);
|
| EmitOperand(reg, address);
|
| }
|
|
|
| -
|
| void Assembler::cmpl(const Address& address, const Immediate& imm) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitComplex(7, address, imm);
|
| }
|
|
|
| -
|
| void Assembler::cmpw(Register reg, const Address& address) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitOperandSizeOverride();
|
| @@ -1429,7 +1261,6 @@ void Assembler::cmpw(Register reg, const Address& address) {
|
| EmitOperand(reg, address);
|
| }
|
|
|
| -
|
| void Assembler::cmpw(const Address& address, const Immediate& imm) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitOperandSizeOverride();
|
| @@ -1439,7 +1270,6 @@ void Assembler::cmpw(const Address& address, const Immediate& imm) {
|
| EmitUint8((imm.value() >> 8) & 0xFF);
|
| }
|
|
|
| -
|
| void Assembler::cmpb(const Address& address, const Immediate& imm) {
|
| ASSERT(imm.is_int8());
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| @@ -1448,14 +1278,12 @@ void Assembler::cmpb(const Address& address, const Immediate& imm) {
|
| EmitUint8(imm.value() & 0xFF);
|
| }
|
|
|
| -
|
| void Assembler::testl(Register reg1, Register reg2) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x85);
|
| EmitRegisterOperand(reg1, reg2);
|
| }
|
|
|
| -
|
| void Assembler::testl(Register reg, const Immediate& immediate) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| // For registers that have a byte variant (EAX, EBX, ECX, and EDX)
|
| @@ -1480,7 +1308,6 @@ void Assembler::testl(Register reg, const Immediate& immediate) {
|
| }
|
| }
|
|
|
| -
|
| void Assembler::testb(const Address& address, const Immediate& imm) {
|
| ASSERT(imm.is_int8());
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| @@ -1489,167 +1316,142 @@ void Assembler::testb(const Address& address, const Immediate& imm) {
|
| EmitUint8(imm.value() & 0xFF);
|
| }
|
|
|
| -
|
| void Assembler::andl(Register dst, Register src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x23);
|
| EmitOperand(dst, Operand(src));
|
| }
|
|
|
| -
|
| void Assembler::andl(Register dst, const Immediate& imm) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitComplex(4, Operand(dst), imm);
|
| }
|
|
|
| -
|
| void Assembler::andl(Register dst, const Address& address) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x23);
|
| EmitOperand(dst, address);
|
| }
|
|
|
| -
|
| void Assembler::orl(Register dst, Register src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0B);
|
| EmitOperand(dst, Operand(src));
|
| }
|
|
|
| -
|
| void Assembler::orl(Register dst, const Immediate& imm) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitComplex(1, Operand(dst), imm);
|
| }
|
|
|
| -
|
| void Assembler::orl(Register dst, const Address& address) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0B);
|
| EmitOperand(dst, address);
|
| }
|
|
|
| -
|
| void Assembler::orl(const Address& address, Register reg) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x09);
|
| EmitOperand(reg, address);
|
| }
|
|
|
| -
|
| void Assembler::xorl(Register dst, Register src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x33);
|
| EmitOperand(dst, Operand(src));
|
| }
|
|
|
| -
|
| void Assembler::xorl(Register dst, const Immediate& imm) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitComplex(6, Operand(dst), imm);
|
| }
|
|
|
| -
|
| void Assembler::xorl(Register dst, const Address& address) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x33);
|
| EmitOperand(dst, address);
|
| }
|
|
|
| -
|
| void Assembler::addl(Register reg, const Immediate& imm) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitComplex(0, Operand(reg), imm);
|
| }
|
|
|
| -
|
| void Assembler::addl(const Address& address, Register reg) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x01);
|
| EmitOperand(reg, address);
|
| }
|
|
|
| -
|
| void Assembler::addl(const Address& address, const Immediate& imm) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitComplex(0, address, imm);
|
| }
|
|
|
| -
|
| void Assembler::adcl(Register reg, const Immediate& imm) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitComplex(2, Operand(reg), imm);
|
| }
|
|
|
| -
|
| void Assembler::adcl(Register dst, Register src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x13);
|
| EmitOperand(dst, Operand(src));
|
| }
|
|
|
| -
|
| void Assembler::adcl(Register dst, const Address& address) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x13);
|
| EmitOperand(dst, address);
|
| }
|
|
|
| -
|
| void Assembler::adcl(const Address& address, Register reg) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x11);
|
| EmitOperand(reg, address);
|
| }
|
|
|
| -
|
| void Assembler::subl(Register dst, Register src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x2B);
|
| EmitOperand(dst, Operand(src));
|
| }
|
|
|
| -
|
| void Assembler::subl(Register reg, const Immediate& imm) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitComplex(5, Operand(reg), imm);
|
| }
|
|
|
| -
|
| void Assembler::subl(Register reg, const Address& address) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x2B);
|
| EmitOperand(reg, address);
|
| }
|
|
|
| -
|
| void Assembler::subl(const Address& address, Register reg) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x29);
|
| EmitOperand(reg, address);
|
| }
|
|
|
| -
|
| void Assembler::cdq() {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x99);
|
| }
|
|
|
| -
|
| void Assembler::idivl(Register reg) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xF7);
|
| EmitOperand(7, Operand(reg));
|
| }
|
|
|
| -
|
| void Assembler::divl(Register reg) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xF7);
|
| EmitOperand(6, Operand(reg));
|
| }
|
|
|
| -
|
| void Assembler::imull(Register dst, Register src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| @@ -1657,7 +1459,6 @@ void Assembler::imull(Register dst, Register src) {
|
| EmitOperand(dst, Operand(src));
|
| }
|
|
|
| -
|
| void Assembler::imull(Register reg, const Immediate& imm) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x69);
|
| @@ -1665,7 +1466,6 @@ void Assembler::imull(Register reg, const Immediate& imm) {
|
| EmitImmediate(imm);
|
| }
|
|
|
| -
|
| void Assembler::imull(Register reg, const Address& address) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| @@ -1673,128 +1473,107 @@ void Assembler::imull(Register reg, const Address& address) {
|
| EmitOperand(reg, address);
|
| }
|
|
|
| -
|
| void Assembler::imull(Register reg) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xF7);
|
| EmitOperand(5, Operand(reg));
|
| }
|
|
|
| -
|
| void Assembler::imull(const Address& address) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xF7);
|
| EmitOperand(5, address);
|
| }
|
|
|
| -
|
| void Assembler::mull(Register reg) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xF7);
|
| EmitOperand(4, Operand(reg));
|
| }
|
|
|
| -
|
| void Assembler::mull(const Address& address) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xF7);
|
| EmitOperand(4, address);
|
| }
|
|
|
| -
|
| void Assembler::sbbl(Register dst, Register src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x1B);
|
| EmitOperand(dst, Operand(src));
|
| }
|
|
|
| -
|
| void Assembler::sbbl(Register reg, const Immediate& imm) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitComplex(3, Operand(reg), imm);
|
| }
|
|
|
| -
|
| void Assembler::sbbl(Register dst, const Address& address) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x1B);
|
| EmitOperand(dst, address);
|
| }
|
|
|
| -
|
| void Assembler::sbbl(const Address& address, Register dst) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x19);
|
| EmitOperand(dst, address);
|
| }
|
|
|
| -
|
| void Assembler::incl(Register reg) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x40 + reg);
|
| }
|
|
|
| -
|
| void Assembler::incl(const Address& address) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xFF);
|
| EmitOperand(0, address);
|
| }
|
|
|
| -
|
| void Assembler::decl(Register reg) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x48 + reg);
|
| }
|
|
|
| -
|
| void Assembler::decl(const Address& address) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xFF);
|
| EmitOperand(1, address);
|
| }
|
|
|
| -
|
| void Assembler::shll(Register reg, const Immediate& imm) {
|
| EmitGenericShift(4, reg, imm);
|
| }
|
|
|
| -
|
| void Assembler::shll(Register operand, Register shifter) {
|
| EmitGenericShift(4, Operand(operand), shifter);
|
| }
|
|
|
| -
|
| void Assembler::shll(const Address& operand, Register shifter) {
|
| EmitGenericShift(4, Operand(operand), shifter);
|
| }
|
|
|
| -
|
| void Assembler::shrl(Register reg, const Immediate& imm) {
|
| EmitGenericShift(5, reg, imm);
|
| }
|
|
|
| -
|
| void Assembler::shrl(Register operand, Register shifter) {
|
| EmitGenericShift(5, Operand(operand), shifter);
|
| }
|
|
|
| -
|
| void Assembler::sarl(Register reg, const Immediate& imm) {
|
| EmitGenericShift(7, reg, imm);
|
| }
|
|
|
| -
|
| void Assembler::sarl(Register operand, Register shifter) {
|
| EmitGenericShift(7, Operand(operand), shifter);
|
| }
|
|
|
| -
|
| void Assembler::sarl(const Address& address, Register shifter) {
|
| EmitGenericShift(7, Operand(address), shifter);
|
| }
|
|
|
| -
|
| void Assembler::shldl(Register dst, Register src, Register shifter) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| ASSERT(shifter == ECX);
|
| @@ -1803,7 +1582,6 @@ void Assembler::shldl(Register dst, Register src, Register shifter) {
|
| EmitRegisterOperand(src, dst);
|
| }
|
|
|
| -
|
| void Assembler::shldl(Register dst, Register src, const Immediate& imm) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| ASSERT(imm.is_int8());
|
| @@ -1813,7 +1591,6 @@ void Assembler::shldl(Register dst, Register src, const Immediate& imm) {
|
| EmitUint8(imm.value() & 0xFF);
|
| }
|
|
|
| -
|
| void Assembler::shldl(const Address& operand, Register src, Register shifter) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| ASSERT(shifter == ECX);
|
| @@ -1822,7 +1599,6 @@ void Assembler::shldl(const Address& operand, Register src, Register shifter) {
|
| EmitOperand(src, Operand(operand));
|
| }
|
|
|
| -
|
| void Assembler::shrdl(Register dst, Register src, Register shifter) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| ASSERT(shifter == ECX);
|
| @@ -1831,7 +1607,6 @@ void Assembler::shrdl(Register dst, Register src, Register shifter) {
|
| EmitRegisterOperand(src, dst);
|
| }
|
|
|
| -
|
| void Assembler::shrdl(Register dst, Register src, const Immediate& imm) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| ASSERT(imm.is_int8());
|
| @@ -1841,7 +1616,6 @@ void Assembler::shrdl(Register dst, Register src, const Immediate& imm) {
|
| EmitUint8(imm.value() & 0xFF);
|
| }
|
|
|
| -
|
| void Assembler::shrdl(const Address& dst, Register src, Register shifter) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| ASSERT(shifter == ECX);
|
| @@ -1850,21 +1624,18 @@ void Assembler::shrdl(const Address& dst, Register src, Register shifter) {
|
| EmitOperand(src, Operand(dst));
|
| }
|
|
|
| -
|
| void Assembler::negl(Register reg) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xF7);
|
| EmitOperand(3, Operand(reg));
|
| }
|
|
|
| -
|
| void Assembler::notl(Register reg) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xF7);
|
| EmitUint8(0xD0 | reg);
|
| }
|
|
|
| -
|
| void Assembler::bsrl(Register dst, Register src) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| @@ -1872,7 +1643,6 @@ void Assembler::bsrl(Register dst, Register src) {
|
| EmitRegisterOperand(dst, src);
|
| }
|
|
|
| -
|
| void Assembler::bt(Register base, Register offset) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| @@ -1880,7 +1650,6 @@ void Assembler::bt(Register base, Register offset) {
|
| EmitRegisterOperand(offset, base);
|
| }
|
|
|
| -
|
| void Assembler::enter(const Immediate& imm) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xC8);
|
| @@ -1890,19 +1659,16 @@ void Assembler::enter(const Immediate& imm) {
|
| EmitUint8(0x00);
|
| }
|
|
|
| -
|
| void Assembler::leave() {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xC9);
|
| }
|
|
|
| -
|
| void Assembler::ret() {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xC3);
|
| }
|
|
|
| -
|
| void Assembler::ret(const Immediate& imm) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xC2);
|
| @@ -1911,7 +1677,6 @@ void Assembler::ret(const Immediate& imm) {
|
| EmitUint8((imm.value() >> 8) & 0xFF);
|
| }
|
|
|
| -
|
| void Assembler::nop(int size) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| // There are nops up to size 15, but for now just provide up to size 8.
|
| @@ -1974,19 +1739,16 @@ void Assembler::nop(int size) {
|
| }
|
| }
|
|
|
| -
|
| void Assembler::int3() {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xCC);
|
| }
|
|
|
| -
|
| void Assembler::hlt() {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xF4);
|
| }
|
|
|
| -
|
| void Assembler::j(Condition condition, Label* label, bool near) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| if (label->IsBound()) {
|
| @@ -2012,7 +1774,6 @@ void Assembler::j(Condition condition, Label* label, bool near) {
|
| }
|
| }
|
|
|
| -
|
| void Assembler::j(Condition condition, const ExternalLabel* label) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| @@ -2021,14 +1782,12 @@ void Assembler::j(Condition condition, const ExternalLabel* label) {
|
| EmitInt32(label->address());
|
| }
|
|
|
| -
|
| void Assembler::jmp(Register reg) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xFF);
|
| EmitRegisterOperand(4, reg);
|
| }
|
|
|
| -
|
| void Assembler::jmp(Label* label, bool near) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| if (label->IsBound()) {
|
| @@ -2052,7 +1811,6 @@ void Assembler::jmp(Label* label, bool near) {
|
| }
|
| }
|
|
|
| -
|
| void Assembler::jmp(const ExternalLabel* label) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xE9);
|
| @@ -2060,13 +1818,11 @@ void Assembler::jmp(const ExternalLabel* label) {
|
| EmitInt32(label->address());
|
| }
|
|
|
| -
|
| void Assembler::lock() {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0xF0);
|
| }
|
|
|
| -
|
| void Assembler::cmpxchgl(const Address& address, Register reg) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| @@ -2074,31 +1830,26 @@ void Assembler::cmpxchgl(const Address& address, Register reg) {
|
| EmitOperand(reg, address);
|
| }
|
|
|
| -
|
| void Assembler::cpuid() {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| EmitUint8(0x0F);
|
| EmitUint8(0xA2);
|
| }
|
|
|
| -
|
| void Assembler::CompareRegisters(Register a, Register b) {
|
| cmpl(a, b);
|
| }
|
|
|
| -
|
| void Assembler::MoveRegister(Register to, Register from) {
|
| if (to != from) {
|
| movl(to, from);
|
| }
|
| }
|
|
|
| -
|
| void Assembler::PopRegister(Register r) {
|
| popl(r);
|
| }
|
|
|
| -
|
| void Assembler::AddImmediate(Register reg, const Immediate& imm) {
|
| const intptr_t value = imm.value();
|
| if (value == 0) {
|
| @@ -2115,7 +1866,6 @@ void Assembler::AddImmediate(Register reg, const Immediate& imm) {
|
| }
|
| }
|
|
|
| -
|
| void Assembler::SubImmediate(Register reg, const Immediate& imm) {
|
| const intptr_t value = imm.value();
|
| if (value == 0) {
|
| @@ -2132,7 +1882,6 @@ void Assembler::SubImmediate(Register reg, const Immediate& imm) {
|
| }
|
| }
|
|
|
| -
|
| void Assembler::Drop(intptr_t stack_elements) {
|
| ASSERT(stack_elements >= 0);
|
| if (stack_elements > 0) {
|
| @@ -2140,12 +1889,10 @@ void Assembler::Drop(intptr_t stack_elements) {
|
| }
|
| }
|
|
|
| -
|
| void Assembler::LoadIsolate(Register dst) {
|
| movl(dst, Address(THR, Thread::isolate_offset()));
|
| }
|
|
|
| -
|
| void Assembler::LoadObject(Register dst, const Object& object) {
|
| ASSERT(!object.IsICData() || ICData::Cast(object).IsOriginal());
|
| ASSERT(!object.IsField() || Field::Cast(object).IsOriginal());
|
| @@ -2160,7 +1907,6 @@ void Assembler::LoadObject(Register dst, const Object& object) {
|
| }
|
| }
|
|
|
| -
|
| void Assembler::LoadObjectSafely(Register dst, const Object& object) {
|
| ASSERT(!object.IsICData() || ICData::Cast(object).IsOriginal());
|
| ASSERT(!object.IsField() || Field::Cast(object).IsOriginal());
|
| @@ -2173,7 +1919,6 @@ void Assembler::LoadObjectSafely(Register dst, const Object& object) {
|
| }
|
| }
|
|
|
| -
|
| void Assembler::PushObject(const Object& object) {
|
| ASSERT(!object.IsICData() || ICData::Cast(object).IsOriginal());
|
| ASSERT(!object.IsField() || Field::Cast(object).IsOriginal());
|
| @@ -2188,7 +1933,6 @@ void Assembler::PushObject(const Object& object) {
|
| }
|
| }
|
|
|
| -
|
| void Assembler::CompareObject(Register reg, const Object& object) {
|
| ASSERT(!object.IsICData() || ICData::Cast(object).IsOriginal());
|
| ASSERT(!object.IsField() || Field::Cast(object).IsOriginal());
|
| @@ -2209,7 +1953,6 @@ void Assembler::CompareObject(Register reg, const Object& object) {
|
| }
|
| }
|
|
|
| -
|
| // Destroys the value register.
|
| void Assembler::StoreIntoObjectFilterNoSmi(Register object,
|
| Register value,
|
| @@ -2229,7 +1972,6 @@ void Assembler::StoreIntoObjectFilterNoSmi(Register object,
|
| j(NOT_ZERO, no_update, Assembler::kNearJump);
|
| }
|
|
|
| -
|
| // Destroys the value register.
|
| void Assembler::StoreIntoObjectFilter(Register object,
|
| Register value,
|
| @@ -2249,7 +1991,6 @@ void Assembler::StoreIntoObjectFilter(Register object,
|
| j(NOT_ZERO, no_update, Assembler::kNearJump);
|
| }
|
|
|
| -
|
| // Destroys the value register.
|
| void Assembler::StoreIntoObject(Register object,
|
| const Address& dest,
|
| @@ -2277,7 +2018,6 @@ void Assembler::StoreIntoObject(Register object,
|
| Bind(&done);
|
| }
|
|
|
| -
|
| void Assembler::StoreIntoObjectNoBarrier(Register object,
|
| const Address& dest,
|
| Register value) {
|
| @@ -2293,7 +2033,6 @@ void Assembler::StoreIntoObjectNoBarrier(Register object,
|
| // No store buffer update.
|
| }
|
|
|
| -
|
| void Assembler::UnverifiedStoreOldObject(const Address& dest,
|
| const Object& value) {
|
| ASSERT(!value.IsICData() || ICData::Cast(value).IsOriginal());
|
| @@ -2306,7 +2045,6 @@ void Assembler::UnverifiedStoreOldObject(const Address& dest,
|
| buffer_.EmitObject(value);
|
| }
|
|
|
| -
|
| void Assembler::StoreIntoObjectNoBarrier(Register object,
|
| const Address& dest,
|
| const Object& value) {
|
| @@ -2321,7 +2059,6 @@ void Assembler::StoreIntoObjectNoBarrier(Register object,
|
| // No store buffer update.
|
| }
|
|
|
| -
|
| void Assembler::StoreIntoSmiField(const Address& dest, Register value) {
|
| #if defined(DEBUG)
|
| Label done;
|
| @@ -2333,13 +2070,11 @@ void Assembler::StoreIntoSmiField(const Address& dest, Register value) {
|
| movl(dest, value);
|
| }
|
|
|
| -
|
| void Assembler::ZeroInitSmiField(const Address& dest) {
|
| Immediate zero(Smi::RawValue(0));
|
| movl(dest, zero);
|
| }
|
|
|
| -
|
| void Assembler::IncrementSmiField(const Address& dest, int32_t increment) {
|
| // Note: FlowGraphCompiler::EdgeCounterIncrementSizeInBytes depends on
|
| // the length of this instruction sequence.
|
| @@ -2347,7 +2082,6 @@ void Assembler::IncrementSmiField(const Address& dest, int32_t increment) {
|
| addl(dest, inc_imm);
|
| }
|
|
|
| -
|
| void Assembler::LoadDoubleConstant(XmmRegister dst, double value) {
|
| // TODO(5410843): Need to have a code constants table.
|
| int64_t constant = bit_cast<int64_t, double>(value);
|
| @@ -2357,7 +2091,6 @@ void Assembler::LoadDoubleConstant(XmmRegister dst, double value) {
|
| addl(ESP, Immediate(2 * kWordSize));
|
| }
|
|
|
| -
|
| void Assembler::FloatNegate(XmmRegister f) {
|
| static const struct ALIGN16 {
|
| uint32_t a;
|
| @@ -2368,7 +2101,6 @@ void Assembler::FloatNegate(XmmRegister f) {
|
| xorps(f, Address::Absolute(reinterpret_cast<uword>(&float_negate_constant)));
|
| }
|
|
|
| -
|
| void Assembler::DoubleNegate(XmmRegister d) {
|
| static const struct ALIGN16 {
|
| uint64_t a;
|
| @@ -2377,7 +2109,6 @@ void Assembler::DoubleNegate(XmmRegister d) {
|
| xorpd(d, Address::Absolute(reinterpret_cast<uword>(&double_negate_constant)));
|
| }
|
|
|
| -
|
| void Assembler::DoubleAbs(XmmRegister reg) {
|
| static const struct ALIGN16 {
|
| uint64_t a;
|
| @@ -2386,7 +2117,6 @@ void Assembler::DoubleAbs(XmmRegister reg) {
|
| andpd(reg, Address::Absolute(reinterpret_cast<uword>(&double_abs_constant)));
|
| }
|
|
|
| -
|
| void Assembler::EnterFrame(intptr_t frame_size) {
|
| if (prologue_offset_ == -1) {
|
| Comment("PrologueOffset = %" Pd "", CodeSize());
|
| @@ -2407,13 +2137,11 @@ void Assembler::EnterFrame(intptr_t frame_size) {
|
| }
|
| }
|
|
|
| -
|
| void Assembler::LeaveFrame() {
|
| movl(ESP, EBP);
|
| popl(EBP);
|
| }
|
|
|
| -
|
| void Assembler::ReserveAlignedFrameSpace(intptr_t frame_space) {
|
| // Reserve space for arguments and align frame before entering
|
| // the C++ world.
|
| @@ -2423,17 +2151,14 @@ void Assembler::ReserveAlignedFrameSpace(intptr_t frame_space) {
|
| }
|
| }
|
|
|
| -
|
| static const intptr_t kNumberOfVolatileCpuRegisters = 3;
|
| static const Register volatile_cpu_registers[kNumberOfVolatileCpuRegisters] = {
|
| EAX, ECX, EDX};
|
|
|
| -
|
| // XMM0 is used only as a scratch register in the optimized code. No need to
|
| // save it.
|
| static const intptr_t kNumberOfVolatileXmmRegisters = kNumberOfXmmRegisters - 1;
|
|
|
| -
|
| void Assembler::EnterCallRuntimeFrame(intptr_t frame_space) {
|
| Comment("EnterCallRuntimeFrame");
|
| EnterFrame(0);
|
| @@ -2457,7 +2182,6 @@ void Assembler::EnterCallRuntimeFrame(intptr_t frame_space) {
|
| ReserveAlignedFrameSpace(frame_space);
|
| }
|
|
|
| -
|
| void Assembler::LeaveCallRuntimeFrame() {
|
| // ESP might have been modified to reserve space for arguments
|
| // and ensure proper alignment of the stack frame.
|
| @@ -2485,38 +2209,32 @@ void Assembler::LeaveCallRuntimeFrame() {
|
| leave();
|
| }
|
|
|
| -
|
| void Assembler::CallRuntime(const RuntimeEntry& entry,
|
| intptr_t argument_count) {
|
| entry.Call(this, argument_count);
|
| }
|
|
|
| -
|
| void Assembler::Call(const StubEntry& stub_entry) {
|
| const Code& target = Code::ZoneHandle(stub_entry.code());
|
| LoadObject(CODE_REG, target);
|
| call(FieldAddress(CODE_REG, Code::entry_point_offset()));
|
| }
|
|
|
| -
|
| void Assembler::CallToRuntime() {
|
| movl(CODE_REG, Address(THR, Thread::call_to_runtime_stub_offset()));
|
| call(Address(THR, Thread::call_to_runtime_entry_point_offset()));
|
| }
|
|
|
| -
|
| void Assembler::Jmp(const StubEntry& stub_entry) {
|
| const ExternalLabel label(stub_entry.EntryPoint());
|
| jmp(&label);
|
| }
|
|
|
| -
|
| void Assembler::J(Condition condition, const StubEntry& stub_entry) {
|
| const ExternalLabel label(stub_entry.EntryPoint());
|
| j(condition, &label);
|
| }
|
|
|
| -
|
| void Assembler::Align(intptr_t alignment, intptr_t offset) {
|
| ASSERT(Utils::IsPowerOfTwo(alignment));
|
| intptr_t pos = offset + buffer_.GetPosition();
|
| @@ -2535,7 +2253,6 @@ void Assembler::Align(intptr_t alignment, intptr_t offset) {
|
| ASSERT(((offset + buffer_.GetPosition()) & (alignment - 1)) == 0);
|
| }
|
|
|
| -
|
| void Assembler::Bind(Label* label) {
|
| intptr_t bound = buffer_.Size();
|
| ASSERT(!label->IsBound()); // Labels can only be bound once.
|
| @@ -2554,7 +2271,6 @@ void Assembler::Bind(Label* label) {
|
| label->BindTo(bound);
|
| }
|
|
|
| -
|
| #ifndef PRODUCT
|
| void Assembler::MaybeTraceAllocation(intptr_t cid,
|
| Register temp_reg,
|
| @@ -2575,7 +2291,6 @@ void Assembler::MaybeTraceAllocation(intptr_t cid,
|
| j(NOT_ZERO, trace, near_jump);
|
| }
|
|
|
| -
|
| void Assembler::UpdateAllocationStats(intptr_t cid,
|
| Register temp_reg,
|
| Heap::Space space) {
|
| @@ -2590,7 +2305,6 @@ void Assembler::UpdateAllocationStats(intptr_t cid,
|
| incl(Address(temp_reg, counter_offset));
|
| }
|
|
|
| -
|
| void Assembler::UpdateAllocationStatsWithSize(intptr_t cid,
|
| Register size_reg,
|
| Register temp_reg,
|
| @@ -2602,7 +2316,6 @@ void Assembler::UpdateAllocationStatsWithSize(intptr_t cid,
|
| addl(Address(temp_reg, size_offset), size_reg);
|
| }
|
|
|
| -
|
| void Assembler::UpdateAllocationStatsWithSize(intptr_t cid,
|
| intptr_t size_in_bytes,
|
| Register temp_reg,
|
| @@ -2615,7 +2328,6 @@ void Assembler::UpdateAllocationStatsWithSize(intptr_t cid,
|
| }
|
| #endif // !PRODUCT
|
|
|
| -
|
| void Assembler::TryAllocate(const Class& cls,
|
| Label* failure,
|
| bool near_jump,
|
| @@ -2653,7 +2365,6 @@ void Assembler::TryAllocate(const Class& cls,
|
| }
|
| }
|
|
|
| -
|
| void Assembler::TryAllocateArray(intptr_t cid,
|
| intptr_t instance_size,
|
| Label* failure,
|
| @@ -2699,7 +2410,6 @@ void Assembler::TryAllocateArray(intptr_t cid,
|
| }
|
| }
|
|
|
| -
|
| void Assembler::PushCodeObject() {
|
| ASSERT(code_.IsNotTemporaryScopedHandle());
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| @@ -2707,7 +2417,6 @@ void Assembler::PushCodeObject() {
|
| buffer_.EmitObject(code_);
|
| }
|
|
|
| -
|
| void Assembler::EnterDartFrame(intptr_t frame_size) {
|
| EnterFrame(0);
|
|
|
| @@ -2718,7 +2427,6 @@ void Assembler::EnterDartFrame(intptr_t frame_size) {
|
| }
|
| }
|
|
|
| -
|
| // On entry to a function compiled for OSR, the caller's frame pointer, the
|
| // stack locals, and any copied parameters are already in place. The frame
|
| // pointer is already set up. There may be extra space for spill slots to
|
| @@ -2735,12 +2443,10 @@ void Assembler::EnterOsrFrame(intptr_t extra_size) {
|
| }
|
| }
|
|
|
| -
|
| void Assembler::EnterStubFrame() {
|
| EnterDartFrame(0);
|
| }
|
|
|
| -
|
| void Assembler::Stop(const char* message) {
|
| if (FLAG_print_stop_message) {
|
| pushl(EAX); // Preserve EAX.
|
| @@ -2755,7 +2461,6 @@ void Assembler::Stop(const char* message) {
|
| int3(); // Execution can be resumed with the 'cont' command in gdb.
|
| }
|
|
|
| -
|
| void Assembler::EmitOperand(int rm, const Operand& operand) {
|
| ASSERT(rm >= 0 && rm < 8);
|
| const intptr_t length = operand.length_;
|
| @@ -2769,12 +2474,10 @@ void Assembler::EmitOperand(int rm, const Operand& operand) {
|
| }
|
| }
|
|
|
| -
|
| void Assembler::EmitImmediate(const Immediate& imm) {
|
| EmitInt32(imm.value());
|
| }
|
|
|
| -
|
| void Assembler::EmitComplex(int rm,
|
| const Operand& operand,
|
| const Immediate& immediate) {
|
| @@ -2795,7 +2498,6 @@ void Assembler::EmitComplex(int rm,
|
| }
|
| }
|
|
|
| -
|
| void Assembler::EmitLabel(Label* label, intptr_t instruction_size) {
|
| if (label->IsBound()) {
|
| intptr_t offset = label->Position() - buffer_.Size();
|
| @@ -2806,7 +2508,6 @@ void Assembler::EmitLabel(Label* label, intptr_t instruction_size) {
|
| }
|
| }
|
|
|
| -
|
| void Assembler::EmitLabelLink(Label* label) {
|
| ASSERT(!label->IsBound());
|
| intptr_t position = buffer_.Size();
|
| @@ -2814,7 +2515,6 @@ void Assembler::EmitLabelLink(Label* label) {
|
| label->LinkTo(position);
|
| }
|
|
|
| -
|
| void Assembler::EmitNearLabelLink(Label* label) {
|
| ASSERT(!label->IsBound());
|
| intptr_t position = buffer_.Size();
|
| @@ -2822,7 +2522,6 @@ void Assembler::EmitNearLabelLink(Label* label) {
|
| label->NearLinkTo(position);
|
| }
|
|
|
| -
|
| void Assembler::EmitGenericShift(int rm, Register reg, const Immediate& imm) {
|
| AssemblerBuffer::EnsureCapacity ensured(&buffer_);
|
| ASSERT(imm.is_int8());
|
| @@ -2836,7 +2535,6 @@ void Assembler::EmitGenericShift(int rm, Register reg, const Immediate& imm) {
|
| }
|
| }
|
|
|
| -
|
| void Assembler::EmitGenericShift(int rm,
|
| const Operand& operand,
|
| Register shifter) {
|
| @@ -2846,7 +2544,6 @@ void Assembler::EmitGenericShift(int rm,
|
| EmitOperand(rm, Operand(operand));
|
| }
|
|
|
| -
|
| void Assembler::LoadClassId(Register result, Register object) {
|
| ASSERT(RawObject::kClassIdTagPos == 16);
|
| ASSERT(RawObject::kClassIdTagSize == 16);
|
| @@ -2855,7 +2552,6 @@ void Assembler::LoadClassId(Register result, Register object) {
|
| movzxw(result, FieldAddress(object, class_id_offset));
|
| }
|
|
|
| -
|
| void Assembler::LoadClassById(Register result, Register class_id) {
|
| ASSERT(result != class_id);
|
| LoadIsolate(result);
|
| @@ -2865,14 +2561,12 @@ void Assembler::LoadClassById(Register result, Register class_id) {
|
| movl(result, Address(result, class_id, TIMES_4, 0));
|
| }
|
|
|
| -
|
| void Assembler::LoadClass(Register result, Register object, Register scratch) {
|
| ASSERT(scratch != result);
|
| LoadClassId(scratch, object);
|
| LoadClassById(result, scratch);
|
| }
|
|
|
| -
|
| void Assembler::CompareClassId(Register object,
|
| intptr_t class_id,
|
| Register scratch) {
|
| @@ -2880,7 +2574,6 @@ void Assembler::CompareClassId(Register object,
|
| cmpl(scratch, Immediate(class_id));
|
| }
|
|
|
| -
|
| void Assembler::SmiUntagOrCheckClass(Register object,
|
| intptr_t class_id,
|
| Register scratch,
|
| @@ -2900,7 +2593,6 @@ void Assembler::SmiUntagOrCheckClass(Register object,
|
| cmpl(scratch, Immediate(class_id));
|
| }
|
|
|
| -
|
| void Assembler::LoadClassIdMayBeSmi(Register result, Register object) {
|
| if (result == object) {
|
| Label smi, join;
|
| @@ -2931,7 +2623,6 @@ void Assembler::LoadClassIdMayBeSmi(Register result, Register object) {
|
| }
|
| }
|
|
|
| -
|
| void Assembler::LoadTaggedClassIdMayBeSmi(Register result, Register object) {
|
| if (result == object) {
|
| Label smi, join;
|
| @@ -2952,7 +2643,6 @@ void Assembler::LoadTaggedClassIdMayBeSmi(Register result, Register object) {
|
| }
|
| }
|
|
|
| -
|
| Address Assembler::ElementAddressForIntIndex(bool is_external,
|
| intptr_t cid,
|
| intptr_t index_scale,
|
| @@ -2968,7 +2658,6 @@ Address Assembler::ElementAddressForIntIndex(bool is_external,
|
| }
|
| }
|
|
|
| -
|
| static ScaleFactor ToScaleFactor(intptr_t index_scale) {
|
| // Note that index is expected smi-tagged, (i.e, times 2) for all arrays with
|
| // index scale factor > 1. E.g., for Uint8Array and OneByteString the index is
|
| @@ -2991,7 +2680,6 @@ static ScaleFactor ToScaleFactor(intptr_t index_scale) {
|
| }
|
| }
|
|
|
| -
|
| Address Assembler::ElementAddressForRegIndex(bool is_external,
|
| intptr_t cid,
|
| intptr_t index_scale,
|
| @@ -3005,27 +2693,22 @@ Address Assembler::ElementAddressForRegIndex(bool is_external,
|
| }
|
| }
|
|
|
| -
|
| static const char* cpu_reg_names[kNumberOfCpuRegisters] = {
|
| "eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi"};
|
|
|
| -
|
| const char* Assembler::RegisterName(Register reg) {
|
| ASSERT((0 <= reg) && (reg < kNumberOfCpuRegisters));
|
| return cpu_reg_names[reg];
|
| }
|
|
|
| -
|
| static const char* xmm_reg_names[kNumberOfXmmRegisters] = {
|
| "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7"};
|
|
|
| -
|
| const char* Assembler::FpuRegisterName(FpuRegister reg) {
|
| ASSERT((0 <= reg) && (reg < kNumberOfXmmRegisters));
|
| return xmm_reg_names[reg];
|
| }
|
|
|
| -
|
| } // namespace dart
|
|
|
| #endif // defined TARGET_ARCH_IA32
|
|
|