Revert "VM: Reland Inline instance object hash code into object header on 64bit."

runtime/vm/assembler_arm64.h

Index: runtime/vm/assembler_arm64.h
diff --git a/runtime/vm/assembler_arm64.h b/runtime/vm/assembler_arm64.h
index 1b25c5bb0e89f9d4b54842d8ebc688358feed2c6..cbeadfd80e1fa3b669cfd6ffb2fafefb6e0dbbf9 100644
--- a/runtime/vm/assembler_arm64.h
+++ b/runtime/vm/assembler_arm64.h
@@ -742,19 +742,16 @@ class Assembler : public ValueObject {
     EmitLoadStoreRegPair(STP, rt, rt2, a, sz);
   }
 
-  void ldxr(Register rt, Register rn, OperandSize size = kDoubleWord) {
+  void ldxr(Register rt, Register rn) {
     // rt = value
     // rn = address
-    EmitLoadStoreExclusive(LDXR, R31, rn, rt, size);
+    EmitLoadStoreExclusive(LDXR, R31, rn, rt, kDoubleWord);
   }
-  void stxr(Register rs,
-            Register rt,
-            Register rn,
-            OperandSize size = kDoubleWord) {
+  void stxr(Register rs, Register rt, Register rn) {
     // rs = status (1 = failure, 0 = success)
     // rt = value
     // rn = address
-    EmitLoadStoreExclusive(STXR, rs, rn, rt, size);
+    EmitLoadStoreExclusive(STXR, rs, rn, rt, kDoubleWord);
   }
   void clrex() {
     const int32_t encoding = static_cast<int32_t>(CLREX);
@@ -1704,8 +1701,8 @@ class Assembler : public ValueObject {
                               Register rn,
                               Register rt,
                               OperandSize sz = kDoubleWord) {
-    ASSERT(sz == kDoubleWord || sz == kWord);
-    const int32_t size = B31 | (sz == kDoubleWord ? B30 : 0);
+    ASSERT(sz == kDoubleWord);
+    const int32_t size = B31 | B30;
 
     ASSERT((rs != kNoRegister) && (rs != ZR));
     ASSERT((rn != kNoRegister) && (rn != ZR));