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Side by Side Diff: third_party/opus/src/silk/arm/biquad_alt_arm.h

Issue 2962373002: [Opus] Update to v1.2.1 (Closed)
Patch Set: Pre-increment instead of post-increment Created 3 years, 5 months ago
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1 /*********************************************************************** 1 /***********************************************************************
2 Copyright (c) 2006-2011, Skype Limited. All rights reserved. 2 Copyright (c) 2017 Google Inc.
3 Redistribution and use in source and binary forms, with or without 3 Redistribution and use in source and binary forms, with or without
4 modification, are permitted provided that the following conditions 4 modification, are permitted provided that the following conditions
5 are met: 5 are met:
6 - Redistributions of source code must retain the above copyright notice, 6 - Redistributions of source code must retain the above copyright notice,
7 this list of conditions and the following disclaimer. 7 this list of conditions and the following disclaimer.
8 - Redistributions in binary form must reproduce the above copyright 8 - Redistributions in binary form must reproduce the above copyright
9 notice, this list of conditions and the following disclaimer in the 9 notice, this list of conditions and the following disclaimer in the
10 documentation and/or other materials provided with the distribution. 10 documentation and/or other materials provided with the distribution.
11 - Neither the name of Internet Society, IETF or IETF Trust, nor the 11 - Neither the name of Internet Society, IETF or IETF Trust, nor the
12 names of specific contributors, may be used to endorse or promote 12 names of specific contributors, may be used to endorse or promote
13 products derived from this software without specific prior written 13 products derived from this software without specific prior written
14 permission. 14 permission.
15 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 15 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
16 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 18 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
19 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 19 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
20 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 20 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
21 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 21 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
22 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 22 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
23 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 23 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
24 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 24 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
25 POSSIBILITY OF SUCH DAMAGE. 25 POSSIBILITY OF SUCH DAMAGE.
26 ***********************************************************************/ 26 ***********************************************************************/
27 27
28 /* * 28 #ifndef SILK_BIQUAD_ALT_ARM_H
29 * silk_biquad_alt.c * 29 # define SILK_BIQUAD_ALT_ARM_H
30 * *
31 * Second order ARMA filter *
32 * Can handle slowly varying filter coefficients *
33 * */
34 30
35 #ifdef HAVE_CONFIG_H 31 # include "celt/arm/armcpu.h"
36 #include "config.h"
37 #endif
38 32
39 #include "SigProc_FIX.h" 33 # if defined(OPUS_ARM_MAY_HAVE_NEON_INTR)
40 34 void silk_biquad_alt_stride2_neon(
41 /* Second order ARMA filter, alternative implementation */
42 void silk_biquad_alt(
43 const opus_int16 *in, /* I input signal */ 35 const opus_int16 *in, /* I input signal */
44 const opus_int32 *B_Q28, /* I MA coefficients [3] */ 36 const opus_int32 *B_Q28, /* I MA coefficients [3] */
45 const opus_int32 *A_Q28, /* I AR coefficients [2] */ 37 const opus_int32 *A_Q28, /* I AR coefficients [2] */
46 opus_int32 *S, /* I/O State vector [2] */ 38 opus_int32 *S, /* I/O State vector [4] */
47 opus_int16 *out, /* O output signal */ 39 opus_int16 *out, /* O output signal */
48 const opus_int32 len, /* I signal length (must be even) */ 40 const opus_int32 len /* I signal length (must be even) */
49 opus_int stride /* I Operate on interlea ved signal if > 1 */ 41 );
50 )
51 {
52 /* DIRECT FORM II TRANSPOSED (uses 2 element state vector) */
53 opus_int k;
54 opus_int32 inval, A0_U_Q28, A0_L_Q28, A1_U_Q28, A1_L_Q28, out32_Q14;
55 42
56 /* Negate A_Q28 values and split in two parts */ 43 # if !defined(OPUS_HAVE_RTCD) && defined(OPUS_ARM_PRESUME_NEON)
57 A0_L_Q28 = ( -A_Q28[ 0 ] ) & 0x00003FFF; /* lower part */ 44 # define OVERRIDE_silk_biquad_alt_stride2 (1)
58 A0_U_Q28 = silk_RSHIFT( -A_Q28[ 0 ], 14 ); /* upper part */ 45 # define silk_biquad_alt_stride2(in, B_Q28, A_Q28, S, out, len, arch) ((void)( arch), PRESUME_NEON(silk_biquad_alt_stride2)(in, B_Q28, A_Q28, S, out, len))
59 A1_L_Q28 = ( -A_Q28[ 1 ] ) & 0x00003FFF; /* lower part */ 46 # endif
60 A1_U_Q28 = silk_RSHIFT( -A_Q28[ 1 ], 14 ); /* upper part */ 47 # endif
61 48
62 for( k = 0; k < len; k++ ) { 49 # if !defined(OVERRIDE_silk_biquad_alt_stride2)
63 /* S[ 0 ], S[ 1 ]: Q12 */ 50 /*Is run-time CPU detection enabled on this platform?*/
64 inval = in[ k * stride ]; 51 # if defined(OPUS_HAVE_RTCD) && (defined(OPUS_ARM_MAY_HAVE_NEON_INTR) && !defin ed(OPUS_ARM_PRESUME_NEON_INTR))
65 out32_Q14 = silk_LSHIFT( silk_SMLAWB( S[ 0 ], B_Q28[ 0 ], inval ), 2 ); 52 extern void (*const SILK_BIQUAD_ALT_STRIDE2_IMPL[OPUS_ARCHMASK+1])(
53 const opus_int16 *in, /* I input signal */
54 const opus_int32 *B_Q28, /* I MA coefficients [3] */
55 const opus_int32 *A_Q28, /* I AR coefficients [2] */
56 opus_int32 *S, /* I/O State vector [4 ] */
57 opus_int16 *out, /* O output signal */
58 const opus_int32 len /* I signal length ( must be even) */
59 );
60 # define OVERRIDE_silk_biquad_alt_stride2 (1)
61 # define silk_biquad_alt_stride2(in, B_Q28, A_Q28, S, out, len, arch) ((*SILK_ BIQUAD_ALT_STRIDE2_IMPL[(arch)&OPUS_ARCHMASK])(in, B_Q28, A_Q28, S, out, len))
62 # elif defined(OPUS_ARM_PRESUME_NEON_INTR)
63 # define OVERRIDE_silk_biquad_alt_stride2 (1)
64 # define silk_biquad_alt_stride2(in, B_Q28, A_Q28, S, out, len, arch) ((void)( arch), silk_biquad_alt_stride2_neon(in, B_Q28, A_Q28, S, out, len))
65 # endif
66 # endif
66 67
67 S[ 0 ] = S[1] + silk_RSHIFT_ROUND( silk_SMULWB( out32_Q14, A0_L_Q28 ), 1 4 ); 68 #endif /* end SILK_BIQUAD_ALT_ARM_H */
68 S[ 0 ] = silk_SMLAWB( S[ 0 ], out32_Q14, A0_U_Q28 );
69 S[ 0 ] = silk_SMLAWB( S[ 0 ], B_Q28[ 1 ], inval);
70
71 S[ 1 ] = silk_RSHIFT_ROUND( silk_SMULWB( out32_Q14, A1_L_Q28 ), 14 );
72 S[ 1 ] = silk_SMLAWB( S[ 1 ], out32_Q14, A1_U_Q28 );
73 S[ 1 ] = silk_SMLAWB( S[ 1 ], B_Q28[ 2 ], inval );
74
75 /* Scale back to Q0 and saturate */
76 out[ k * stride ] = (opus_int16)silk_SAT16( silk_RSHIFT( out32_Q14 + (1< <14) - 1, 14 ) );
77 }
78 }
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