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1 /* Copyright (C) 2007-2009 Xiph.Org Foundation | 1 /* Copyright (C) 2007-2009 Xiph.Org Foundation |
2 Copyright (C) 2003-2008 Jean-Marc Valin | 2 Copyright (C) 2003-2008 Jean-Marc Valin |
3 Copyright (C) 2007-2008 CSIRO | 3 Copyright (C) 2007-2008 CSIRO |
4 Copyright (C) 2013 Parrot */ | 4 Copyright (C) 2013 Parrot */ |
5 /* | 5 /* |
6 Redistribution and use in source and binary forms, with or without | 6 Redistribution and use in source and binary forms, with or without |
7 modification, are permitted provided that the following conditions | 7 modification, are permitted provided that the following conditions |
8 are met: | 8 are met: |
9 | 9 |
10 - Redistributions of source code must retain the above copyright | 10 - Redistributions of source code must retain the above copyright |
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52 #undef MULT16_32_Q15 | 52 #undef MULT16_32_Q15 |
53 static OPUS_INLINE opus_val32 MULT16_32_Q15_armv5e(opus_val16 a, opus_val32 b) | 53 static OPUS_INLINE opus_val32 MULT16_32_Q15_armv5e(opus_val16 a, opus_val32 b) |
54 { | 54 { |
55 int res; | 55 int res; |
56 __asm__( | 56 __asm__( |
57 "#MULT16_32_Q15\n\t" | 57 "#MULT16_32_Q15\n\t" |
58 "smulwb %0, %1, %2\n\t" | 58 "smulwb %0, %1, %2\n\t" |
59 : "=r"(res) | 59 : "=r"(res) |
60 : "r"(b), "r"(a) | 60 : "r"(b), "r"(a) |
61 ); | 61 ); |
62 return res<<1; | 62 return SHL32(res,1); |
63 } | 63 } |
64 #define MULT16_32_Q15(a, b) (MULT16_32_Q15_armv5e(a, b)) | 64 #define MULT16_32_Q15(a, b) (MULT16_32_Q15_armv5e(a, b)) |
65 | 65 |
66 | 66 |
67 /** 16x32 multiply, followed by a 15-bit shift right and 32-bit add. | 67 /** 16x32 multiply, followed by a 15-bit shift right and 32-bit add. |
68 b must fit in 31 bits. | 68 b must fit in 31 bits. |
69 Result fits in 32 bits. */ | 69 Result fits in 32 bits. */ |
70 #undef MAC16_32_Q15 | 70 #undef MAC16_32_Q15 |
71 static OPUS_INLINE opus_val32 MAC16_32_Q15_armv5e(opus_val32 c, opus_val16 a, | 71 static OPUS_INLINE opus_val32 MAC16_32_Q15_armv5e(opus_val32 c, opus_val16 a, |
72 opus_val32 b) | 72 opus_val32 b) |
73 { | 73 { |
74 int res; | 74 int res; |
75 __asm__( | 75 __asm__( |
76 "#MAC16_32_Q15\n\t" | 76 "#MAC16_32_Q15\n\t" |
77 "smlawb %0, %1, %2, %3;\n" | 77 "smlawb %0, %1, %2, %3;\n" |
78 : "=r"(res) | 78 : "=r"(res) |
79 : "r"(b<<1), "r"(a), "r"(c) | 79 : "r"(SHL32(b,1)), "r"(a), "r"(c) |
80 ); | 80 ); |
81 return res; | 81 return res; |
82 } | 82 } |
83 #define MAC16_32_Q15(c, a, b) (MAC16_32_Q15_armv5e(c, a, b)) | 83 #define MAC16_32_Q15(c, a, b) (MAC16_32_Q15_armv5e(c, a, b)) |
84 | 84 |
85 /** 16x32 multiply, followed by a 16-bit shift right and 32-bit add. | 85 /** 16x32 multiply, followed by a 16-bit shift right and 32-bit add. |
86 Result fits in 32 bits. */ | 86 Result fits in 32 bits. */ |
87 #undef MAC16_32_Q16 | 87 #undef MAC16_32_Q16 |
88 static OPUS_INLINE opus_val32 MAC16_32_Q16_armv5e(opus_val32 c, opus_val16 a, | 88 static OPUS_INLINE opus_val32 MAC16_32_Q16_armv5e(opus_val32 c, opus_val16 a, |
89 opus_val32 b) | 89 opus_val32 b) |
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142 : "=r"(res) | 142 : "=r"(res) |
143 : "r"(x+2048) | 143 : "r"(x+2048) |
144 ); | 144 ); |
145 return EXTRACT16(res); | 145 return EXTRACT16(res); |
146 } | 146 } |
147 #define SIG2WORD16(x) (SIG2WORD16_armv6(x)) | 147 #define SIG2WORD16(x) (SIG2WORD16_armv6(x)) |
148 | 148 |
149 #endif /* OPUS_ARM_INLINE_MEDIA */ | 149 #endif /* OPUS_ARM_INLINE_MEDIA */ |
150 | 150 |
151 #endif | 151 #endif |
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