Index: test/cctest/wasm/test-run-wasm-simd.cc |
diff --git a/test/cctest/wasm/test-run-wasm-simd.cc b/test/cctest/wasm/test-run-wasm-simd.cc |
index e411bf9e83e728e68aa86eca8895aa7693acb177..12e4b38e7b8384df03b80c43e86c30e22023b5be 100644 |
--- a/test/cctest/wasm/test-run-wasm-simd.cc |
+++ b/test/cctest/wasm/test-run-wasm-simd.cc |
@@ -932,7 +932,7 @@ WASM_SIMD_TEST(I32x4ConvertI16x8) { |
// V8_TARGET_ARCH_MIPS64 |
#if V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_ARM64 || SIMD_LOWERING_TARGET || \ |
- V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64 |
+ V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64 || V8_TARGET_ARCH_X64 |
void RunI32x4UnOpTest(WasmOpcode simd_op, Int32UnOp expected_op) { |
WasmRunner<int32_t, int32_t, int32_t> r(kExecuteCompiled); |
byte a = 0; |
@@ -947,11 +947,13 @@ void RunI32x4UnOpTest(WasmOpcode simd_op, Int32UnOp expected_op) { |
WASM_SIMD_TEST(I32x4Neg) { RunI32x4UnOpTest(kExprI32x4Neg, Negate); } |
#endif // V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_ARM64 || SIMD_LOWERING_TARGET || |
- // V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64 |
+ // V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64 || V8_TARGET_ARCH_X64 |
-#if V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_ARM64 || SIMD_LOWERING_TARGET |
+#if V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_ARM64 || SIMD_LOWERING_TARGET || \ |
+ V8_TARGET_ARCH_X64 |
WASM_SIMD_TEST(S128Not) { RunI32x4UnOpTest(kExprS128Not, Not); } |
#endif // V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_ARM64 || SIMD_LOWERING_TARGET |
+ // V8_TARGET_ARCH_X64 |
void RunI32x4BinOpTest(WasmOpcode simd_op, Int32BinOp expected_op) { |
WasmRunner<int32_t, int32_t, int32_t, int32_t> r(kExecuteCompiled); |
@@ -1018,11 +1020,7 @@ void RunI32x4CompareOpTest(WasmOpcode simd_op, Int32CompareOp expected_op) { |
WASM_SIMD_TEST(I32x4Eq) { RunI32x4CompareOpTest(kExprI32x4Eq, Equal); } |
WASM_SIMD_TEST(I32x4Ne) { RunI32x4CompareOpTest(kExprI32x4Ne, NotEqual); } |
-#endif // V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_ARM64 || V8_TARGET_ARCH_X64 || |
- // SIMD_LOWERING_TARGET || V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64 |
-#if V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_ARM64 || SIMD_LOWERING_TARGET || \ |
- V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64 |
WASM_SIMD_TEST(I32x4LtS) { RunI32x4CompareOpTest(kExprI32x4LtS, Less); } |
WASM_SIMD_TEST(I32x4LeS) { RunI32x4CompareOpTest(kExprI32x4LeS, LessEqual); } |
@@ -1044,11 +1042,7 @@ WASM_SIMD_TEST(I32x4GtU) { |
WASM_SIMD_TEST(I32x4GeU) { |
RunI32x4CompareOpTest(kExprI32x4GeU, UnsignedGreaterEqual); |
} |
-#endif // V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_ARM64 || SIMD_LOWERING_TARGET || |
- // V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64 |
-#if V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_ARM64 || V8_TARGET_ARCH_X64 || \ |
- SIMD_LOWERING_TARGET || V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64 |
void RunI32x4ShiftOpTest(WasmOpcode simd_op, Int32ShiftOp expected_op, |
int shift) { |
WasmRunner<int32_t, int32_t, int32_t> r(kExecuteCompiled); |
@@ -1106,7 +1100,7 @@ WASM_SIMD_TEST(I16x8ConvertI8x16) { |
// V8_TARGET_ARCH_MIPS64 |
#if SIMD_LOWERING_TARGET || V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_ARM64 || \ |
- V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64 |
+ V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64 || V8_TARGET_ARCH_X64 |
void RunI16x8UnOpTest(WasmOpcode simd_op, Int16UnOp expected_op) { |
WasmRunner<int32_t, int32_t, int32_t> r(kExecuteCompiled); |
byte a = 0; |
@@ -1121,8 +1115,7 @@ void RunI16x8UnOpTest(WasmOpcode simd_op, Int16UnOp expected_op) { |
WASM_SIMD_TEST(I16x8Neg) { RunI16x8UnOpTest(kExprI16x8Neg, Negate); } |
#endif // SIMD_LOWERING_TARGET || V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_ARM64 || |
- // V8_TARGET_ARCH_MIPS || |
- // V8_TARGET_ARCH_MIPS64 |
+ // V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64 || V8_TARGET_ARCH_X64 |
#if V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_ARM64 || V8_TARGET_ARCH_MIPS || \ |
V8_TARGET_ARCH_MIPS64 |
@@ -1187,11 +1180,7 @@ WASM_SIMD_TEST(I16x8Sub) { RunI16x8BinOpTest(kExprI16x8Sub, Sub); } |
WASM_SIMD_TEST(I16x8SubSaturateS) { |
RunI16x8BinOpTest(kExprI16x8SubSaturateS, SubSaturate); |
} |
-#endif // V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_ARM64 || V8_TARGET_ARCH_X64 || |
- // SIMD_LOWERING_TARGET || V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64 |
-#if V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_ARM64 || V8_TARGET_ARCH_X64 || \ |
- SIMD_LOWERING_TARGET || V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64 |
WASM_SIMD_TEST(I16x8Mul) { RunI16x8BinOpTest(kExprI16x8Mul, Mul); } |
WASM_SIMD_TEST(I16x8MinS) { RunI16x8BinOpTest(kExprI16x8MinS, Minimum); } |
@@ -1235,11 +1224,7 @@ void RunI16x8CompareOpTest(WasmOpcode simd_op, Int16CompareOp expected_op) { |
WASM_SIMD_TEST(I16x8Eq) { RunI16x8CompareOpTest(kExprI16x8Eq, Equal); } |
WASM_SIMD_TEST(I16x8Ne) { RunI16x8CompareOpTest(kExprI16x8Ne, NotEqual); } |
-#endif // V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_ARM64 || V8_TARGET_ARCH_X64 || |
- // SIMD_LOWERING_TARGET || V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64 |
-#if V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_ARM64 || SIMD_LOWERING_TARGET || \ |
- V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64 |
WASM_SIMD_TEST(I16x8LtS) { RunI16x8CompareOpTest(kExprI16x8LtS, Less); } |
WASM_SIMD_TEST(I16x8LeS) { RunI16x8CompareOpTest(kExprI16x8LeS, LessEqual); } |
@@ -1261,11 +1246,7 @@ WASM_SIMD_TEST(I16x8LtU) { RunI16x8CompareOpTest(kExprI16x8LtU, UnsignedLess); } |
WASM_SIMD_TEST(I16x8LeU) { |
RunI16x8CompareOpTest(kExprI16x8LeU, UnsignedLessEqual); |
} |
-#endif // V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_ARM64 || SIMD_LOWERING_TARGET || |
- // V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64 |
-#if V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_ARM64 || V8_TARGET_ARCH_X64 || \ |
- SIMD_LOWERING_TARGET || V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64 |
void RunI16x8ShiftOpTest(WasmOpcode simd_op, Int16ShiftOp expected_op, |
int shift) { |
WasmRunner<int32_t, int32_t, int32_t> r(kExecuteCompiled); |
@@ -1291,11 +1272,7 @@ WASM_SIMD_TEST(I16x8ShrS) { |
WASM_SIMD_TEST(I16x8ShrU) { |
RunI16x8ShiftOpTest(kExprI16x8ShrU, LogicalShiftRight, 1); |
} |
-#endif // V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_ARM64 || V8_TARGET_ARCH_X64 || |
- // SIMD_LOWERING_TARGET || V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64 |
-#if V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_ARM64 || V8_TARGET_ARCH_MIPS || \ |
- V8_TARGET_ARCH_MIPS64 || SIMD_LOWERING_TARGET |
void RunI8x16UnOpTest(WasmOpcode simd_op, Int8UnOp expected_op) { |
WasmRunner<int32_t, int32_t, int32_t> r(kExecuteCompiled); |
byte a = 0; |
@@ -1309,8 +1286,8 @@ void RunI8x16UnOpTest(WasmOpcode simd_op, Int8UnOp expected_op) { |
} |
WASM_SIMD_TEST(I8x16Neg) { RunI8x16UnOpTest(kExprI8x16Neg, Negate); } |
-#endif // V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_ARM64 || V8_TARGET_ARCH_MIPS || |
- // V8_TARGET_ARCH_MIPS64 || SIMD_LOWERING_TARGET |
+#endif // V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_ARM64 || V8_TARGET_ARCH_X64 || |
+ // SIMD_LOWERING_TARGET || V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64 |
#if V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_ARM64 || V8_TARGET_ARCH_MIPS || \ |
V8_TARGET_ARCH_MIPS64 |
@@ -1417,17 +1394,7 @@ void RunI8x16CompareOpTest(WasmOpcode simd_op, Int8CompareOp expected_op) { |
WASM_SIMD_TEST(I8x16Eq) { RunI8x16CompareOpTest(kExprI8x16Eq, Equal); } |
WASM_SIMD_TEST(I8x16Ne) { RunI8x16CompareOpTest(kExprI8x16Ne, NotEqual); } |
-#endif // V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_ARM64 || V8_TARGET_ARCH_X64 || |
- // SIMD_LOWERING_TARGET || V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64 |
-#if V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_ARM64 || SIMD_LOWERING_TARGET || \ |
- V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64 |
-WASM_SIMD_TEST(I8x16Mul) { RunI8x16BinOpTest(kExprI8x16Mul, Mul); } |
-#endif // V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_ARM64 || V8_TARGET_ARCH_X64 || |
- // V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64 |
- |
-#if V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_ARM64 || SIMD_LOWERING_TARGET || \ |
- V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64 |
WASM_SIMD_TEST(I8x16GtS) { RunI8x16CompareOpTest(kExprI8x16GtS, Greater); } |
WASM_SIMD_TEST(I8x16GeS) { RunI8x16CompareOpTest(kExprI8x16GeS, GreaterEqual); } |
@@ -1449,8 +1416,14 @@ WASM_SIMD_TEST(I8x16LtU) { RunI8x16CompareOpTest(kExprI8x16LtU, UnsignedLess); } |
WASM_SIMD_TEST(I8x16LeU) { |
RunI8x16CompareOpTest(kExprI8x16LeU, UnsignedLessEqual); |
} |
-#endif // V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_ARM64 || SIMD_LOWERING_TARGET |
- // || V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64 |
+#endif // V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_ARM64 || V8_TARGET_ARCH_X64 || |
+ // SIMD_LOWERING_TARGET || V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64 |
+ |
+#if V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_ARM64 || SIMD_LOWERING_TARGET || \ |
+ V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64 |
+WASM_SIMD_TEST(I8x16Mul) { RunI8x16BinOpTest(kExprI8x16Mul, Mul); } |
+#endif // V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_ARM64 || V8_TARGET_ARCH_X64 || |
+ // V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64 |
void RunI8x16ShiftOpTest(WasmOpcode simd_op, Int8ShiftOp expected_op, |
int shift) { |
@@ -1475,16 +1448,12 @@ WASM_SIMD_TEST(I8x16Shl) { |
WASM_SIMD_TEST(I8x16ShrS) { |
RunI8x16ShiftOpTest(kExprI8x16ShrS, ArithmeticShiftRight, 1); |
} |
-#endif // V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_ARM64 || V8_TARGET_ARCH_MIPS || |
- // V8_TARGET_ARCH_MIPS64 || SIMD_LOWERING_TARGET |
-#if V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_ARM64 || SIMD_LOWERING_TARGET || \ |
- V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64 |
WASM_SIMD_TEST(I8x16ShrU) { |
RunI8x16ShiftOpTest(kExprI8x16ShrU, LogicalShiftRight, 1); |
} |
-#endif // V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_ARM64 || SIMD_LOWERING_TARGET || |
- // V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64 |
+#endif // V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_ARM64 || V8_TARGET_ARCH_MIPS || |
+ // V8_TARGET_ARCH_MIPS64 || SIMD_LOWERING_TARGET |
#if V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_ARM64 || V8_TARGET_ARCH_X64 || \ |
V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64 |