| OLD | NEW |
| 1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
| 2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
| 3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
| 4 | 4 |
| 5 #ifndef V8_COMPILER_X64_INSTRUCTION_CODES_X64_H_ | 5 #ifndef V8_COMPILER_X64_INSTRUCTION_CODES_X64_H_ |
| 6 #define V8_COMPILER_X64_INSTRUCTION_CODES_X64_H_ | 6 #define V8_COMPILER_X64_INSTRUCTION_CODES_X64_H_ |
| 7 | 7 |
| 8 namespace v8 { | 8 namespace v8 { |
| 9 namespace internal { | 9 namespace internal { |
| 10 namespace compiler { | 10 namespace compiler { |
| (...skipping 129 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 140 V(X64Lea32) \ | 140 V(X64Lea32) \ |
| 141 V(X64Lea) \ | 141 V(X64Lea) \ |
| 142 V(X64Dec32) \ | 142 V(X64Dec32) \ |
| 143 V(X64Inc32) \ | 143 V(X64Inc32) \ |
| 144 V(X64Push) \ | 144 V(X64Push) \ |
| 145 V(X64Poke) \ | 145 V(X64Poke) \ |
| 146 V(X64StackCheck) \ | 146 V(X64StackCheck) \ |
| 147 V(X64I32x4Splat) \ | 147 V(X64I32x4Splat) \ |
| 148 V(X64I32x4ExtractLane) \ | 148 V(X64I32x4ExtractLane) \ |
| 149 V(X64I32x4ReplaceLane) \ | 149 V(X64I32x4ReplaceLane) \ |
| 150 V(X64I32x4Neg) \ |
| 150 V(X64I32x4Shl) \ | 151 V(X64I32x4Shl) \ |
| 151 V(X64I32x4ShrS) \ | 152 V(X64I32x4ShrS) \ |
| 152 V(X64I32x4Add) \ | 153 V(X64I32x4Add) \ |
| 153 V(X64I32x4AddHoriz) \ | 154 V(X64I32x4AddHoriz) \ |
| 154 V(X64I32x4Sub) \ | 155 V(X64I32x4Sub) \ |
| 155 V(X64I32x4Mul) \ | 156 V(X64I32x4Mul) \ |
| 156 V(X64I32x4MinS) \ | 157 V(X64I32x4MinS) \ |
| 157 V(X64I32x4MaxS) \ | 158 V(X64I32x4MaxS) \ |
| 158 V(X64I32x4Eq) \ | 159 V(X64I32x4Eq) \ |
| 159 V(X64I32x4Ne) \ | 160 V(X64I32x4Ne) \ |
| 161 V(X64I32x4GtS) \ |
| 162 V(X64I32x4GeS) \ |
| 160 V(X64I32x4ShrU) \ | 163 V(X64I32x4ShrU) \ |
| 161 V(X64I32x4MinU) \ | 164 V(X64I32x4MinU) \ |
| 162 V(X64I32x4MaxU) \ | 165 V(X64I32x4MaxU) \ |
| 166 V(X64I32x4GtU) \ |
| 167 V(X64I32x4GeU) \ |
| 163 V(X64I16x8Splat) \ | 168 V(X64I16x8Splat) \ |
| 164 V(X64I16x8ExtractLane) \ | 169 V(X64I16x8ExtractLane) \ |
| 165 V(X64I16x8ReplaceLane) \ | 170 V(X64I16x8ReplaceLane) \ |
| 171 V(X64I16x8Neg) \ |
| 166 V(X64I16x8Shl) \ | 172 V(X64I16x8Shl) \ |
| 167 V(X64I16x8ShrS) \ | 173 V(X64I16x8ShrS) \ |
| 168 V(X64I16x8Add) \ | 174 V(X64I16x8Add) \ |
| 169 V(X64I16x8AddSaturateS) \ | 175 V(X64I16x8AddSaturateS) \ |
| 170 V(X64I16x8AddHoriz) \ | 176 V(X64I16x8AddHoriz) \ |
| 171 V(X64I16x8Sub) \ | 177 V(X64I16x8Sub) \ |
| 172 V(X64I16x8SubSaturateS) \ | 178 V(X64I16x8SubSaturateS) \ |
| 173 V(X64I16x8Mul) \ | 179 V(X64I16x8Mul) \ |
| 174 V(X64I16x8MinS) \ | 180 V(X64I16x8MinS) \ |
| 175 V(X64I16x8MaxS) \ | 181 V(X64I16x8MaxS) \ |
| 176 V(X64I16x8Eq) \ | 182 V(X64I16x8Eq) \ |
| 177 V(X64I16x8Ne) \ | 183 V(X64I16x8Ne) \ |
| 184 V(X64I16x8GtS) \ |
| 185 V(X64I16x8GeS) \ |
| 178 V(X64I16x8ShrU) \ | 186 V(X64I16x8ShrU) \ |
| 179 V(X64I16x8AddSaturateU) \ | 187 V(X64I16x8AddSaturateU) \ |
| 180 V(X64I16x8SubSaturateU) \ | 188 V(X64I16x8SubSaturateU) \ |
| 181 V(X64I16x8MinU) \ | 189 V(X64I16x8MinU) \ |
| 182 V(X64I16x8MaxU) \ | 190 V(X64I16x8MaxU) \ |
| 191 V(X64I16x8GtU) \ |
| 192 V(X64I16x8GeU) \ |
| 183 V(X64I8x16Splat) \ | 193 V(X64I8x16Splat) \ |
| 184 V(X64I8x16ExtractLane) \ | 194 V(X64I8x16ExtractLane) \ |
| 185 V(X64I8x16ReplaceLane) \ | 195 V(X64I8x16ReplaceLane) \ |
| 196 V(X64I8x16Neg) \ |
| 186 V(X64I8x16Add) \ | 197 V(X64I8x16Add) \ |
| 187 V(X64I8x16AddSaturateS) \ | 198 V(X64I8x16AddSaturateS) \ |
| 188 V(X64I8x16Sub) \ | 199 V(X64I8x16Sub) \ |
| 189 V(X64I8x16SubSaturateS) \ | 200 V(X64I8x16SubSaturateS) \ |
| 190 V(X64I8x16MinS) \ | 201 V(X64I8x16MinS) \ |
| 191 V(X64I8x16MaxS) \ | 202 V(X64I8x16MaxS) \ |
| 192 V(X64I8x16Eq) \ | 203 V(X64I8x16Eq) \ |
| 193 V(X64I8x16Ne) \ | 204 V(X64I8x16Ne) \ |
| 205 V(X64I8x16GtS) \ |
| 206 V(X64I8x16GeS) \ |
| 194 V(X64I8x16AddSaturateU) \ | 207 V(X64I8x16AddSaturateU) \ |
| 195 V(X64I8x16SubSaturateU) \ | 208 V(X64I8x16SubSaturateU) \ |
| 196 V(X64I8x16MinU) \ | 209 V(X64I8x16MinU) \ |
| 197 V(X64I8x16MaxU) \ | 210 V(X64I8x16MaxU) \ |
| 211 V(X64I8x16GtU) \ |
| 212 V(X64I8x16GeU) \ |
| 198 V(X64S128And) \ | 213 V(X64S128And) \ |
| 199 V(X64S128Or) \ | 214 V(X64S128Or) \ |
| 200 V(X64S128Xor) \ | 215 V(X64S128Xor) \ |
| 201 V(X64S128Not) \ | 216 V(X64S128Not) \ |
| 202 V(X64S128Select) \ | 217 V(X64S128Select) \ |
| 203 V(X64S128Zero) | 218 V(X64S128Zero) |
| 204 | 219 |
| 205 // Addressing modes represent the "shape" of inputs to an instruction. | 220 // Addressing modes represent the "shape" of inputs to an instruction. |
| 206 // Many instructions support multiple addressing modes. Addressing modes | 221 // Many instructions support multiple addressing modes. Addressing modes |
| 207 // are encoded into the InstructionCode of the instruction and tell the | 222 // are encoded into the InstructionCode of the instruction and tell the |
| (...skipping 27 matching lines...) Expand all Loading... |
| 235 V(M8I) /* [ %r2*8 + K] */ \ | 250 V(M8I) /* [ %r2*8 + K] */ \ |
| 236 V(Root) /* [%root + K] */ | 251 V(Root) /* [%root + K] */ |
| 237 | 252 |
| 238 enum X64MemoryProtection { kUnprotected = 0, kProtected = 1 }; | 253 enum X64MemoryProtection { kUnprotected = 0, kProtected = 1 }; |
| 239 | 254 |
| 240 } // namespace compiler | 255 } // namespace compiler |
| 241 } // namespace internal | 256 } // namespace internal |
| 242 } // namespace v8 | 257 } // namespace v8 |
| 243 | 258 |
| 244 #endif // V8_COMPILER_X64_INSTRUCTION_CODES_X64_H_ | 259 #endif // V8_COMPILER_X64_INSTRUCTION_CODES_X64_H_ |
| OLD | NEW |