OLD | NEW |
1 // Copyright 2013 the V8 project authors. All rights reserved. | 1 // Copyright 2013 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #include "src/compiler/code-generator.h" | 5 #include "src/compiler/code-generator.h" |
6 | 6 |
7 #include <limits> | 7 #include <limits> |
8 | 8 |
9 #include "src/compilation-info.h" | 9 #include "src/compilation-info.h" |
10 #include "src/compiler/code-generator-impl.h" | 10 #include "src/compiler/code-generator-impl.h" |
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2181 case kX64I32x4ReplaceLane: { | 2181 case kX64I32x4ReplaceLane: { |
2182 CpuFeatureScope sse_scope(masm(), SSE4_1); | 2182 CpuFeatureScope sse_scope(masm(), SSE4_1); |
2183 if (instr->InputAt(2)->IsRegister()) { | 2183 if (instr->InputAt(2)->IsRegister()) { |
2184 __ Pinsrd(i.OutputSimd128Register(), i.InputRegister(2), | 2184 __ Pinsrd(i.OutputSimd128Register(), i.InputRegister(2), |
2185 i.InputInt8(1)); | 2185 i.InputInt8(1)); |
2186 } else { | 2186 } else { |
2187 __ Pinsrd(i.OutputSimd128Register(), i.InputOperand(2), i.InputInt8(1)); | 2187 __ Pinsrd(i.OutputSimd128Register(), i.InputOperand(2), i.InputInt8(1)); |
2188 } | 2188 } |
2189 break; | 2189 break; |
2190 } | 2190 } |
| 2191 case kX64I32x4Neg: { |
| 2192 CpuFeatureScope sse_scope(masm(), SSSE3); |
| 2193 XMMRegister dst = i.OutputSimd128Register(); |
| 2194 XMMRegister src = i.InputSimd128Register(0); |
| 2195 if (dst.is(src)) { |
| 2196 __ pcmpeqd(kScratchDoubleReg, kScratchDoubleReg); |
| 2197 __ psignd(dst, kScratchDoubleReg); |
| 2198 } else { |
| 2199 __ pxor(dst, dst); |
| 2200 __ psubd(dst, src); |
| 2201 } |
| 2202 break; |
| 2203 } |
2191 case kX64I32x4Shl: { | 2204 case kX64I32x4Shl: { |
2192 __ pslld(i.OutputSimd128Register(), i.InputInt8(1)); | 2205 __ pslld(i.OutputSimd128Register(), i.InputInt8(1)); |
2193 break; | 2206 break; |
2194 } | 2207 } |
2195 case kX64I32x4ShrS: { | 2208 case kX64I32x4ShrS: { |
2196 __ psrad(i.OutputSimd128Register(), i.InputInt8(1)); | 2209 __ psrad(i.OutputSimd128Register(), i.InputInt8(1)); |
2197 break; | 2210 break; |
2198 } | 2211 } |
2199 case kX64I32x4Add: { | 2212 case kX64I32x4Add: { |
2200 __ paddd(i.OutputSimd128Register(), i.InputSimd128Register(1)); | 2213 __ paddd(i.OutputSimd128Register(), i.InputSimd128Register(1)); |
(...skipping 26 matching lines...) Expand all Loading... |
2227 case kX64I32x4Eq: { | 2240 case kX64I32x4Eq: { |
2228 __ pcmpeqd(i.OutputSimd128Register(), i.InputSimd128Register(1)); | 2241 __ pcmpeqd(i.OutputSimd128Register(), i.InputSimd128Register(1)); |
2229 break; | 2242 break; |
2230 } | 2243 } |
2231 case kX64I32x4Ne: { | 2244 case kX64I32x4Ne: { |
2232 __ pcmpeqd(i.OutputSimd128Register(), i.InputSimd128Register(1)); | 2245 __ pcmpeqd(i.OutputSimd128Register(), i.InputSimd128Register(1)); |
2233 __ pcmpeqd(kScratchDoubleReg, kScratchDoubleReg); | 2246 __ pcmpeqd(kScratchDoubleReg, kScratchDoubleReg); |
2234 __ pxor(i.OutputSimd128Register(), kScratchDoubleReg); | 2247 __ pxor(i.OutputSimd128Register(), kScratchDoubleReg); |
2235 break; | 2248 break; |
2236 } | 2249 } |
| 2250 case kX64I32x4GtS: { |
| 2251 __ pcmpgtd(i.OutputSimd128Register(), i.InputSimd128Register(1)); |
| 2252 break; |
| 2253 } |
| 2254 case kX64I32x4GeS: { |
| 2255 CpuFeatureScope sse_scope(masm(), SSE4_1); |
| 2256 XMMRegister dst = i.OutputSimd128Register(); |
| 2257 XMMRegister src = i.InputSimd128Register(1); |
| 2258 __ pminsd(dst, src); |
| 2259 __ pcmpeqd(dst, src); |
| 2260 break; |
| 2261 } |
2237 case kX64I32x4ShrU: { | 2262 case kX64I32x4ShrU: { |
2238 __ psrld(i.OutputSimd128Register(), i.InputInt8(1)); | 2263 __ psrld(i.OutputSimd128Register(), i.InputInt8(1)); |
2239 break; | 2264 break; |
2240 } | 2265 } |
2241 case kX64I32x4MinU: { | 2266 case kX64I32x4MinU: { |
2242 CpuFeatureScope sse_scope(masm(), SSE4_1); | 2267 CpuFeatureScope sse_scope(masm(), SSE4_1); |
2243 __ pminud(i.OutputSimd128Register(), i.InputSimd128Register(1)); | 2268 __ pminud(i.OutputSimd128Register(), i.InputSimd128Register(1)); |
2244 break; | 2269 break; |
2245 } | 2270 } |
2246 case kX64I32x4MaxU: { | 2271 case kX64I32x4MaxU: { |
2247 CpuFeatureScope sse_scope(masm(), SSE4_1); | 2272 CpuFeatureScope sse_scope(masm(), SSE4_1); |
2248 __ pmaxud(i.OutputSimd128Register(), i.InputSimd128Register(1)); | 2273 __ pmaxud(i.OutputSimd128Register(), i.InputSimd128Register(1)); |
2249 break; | 2274 break; |
2250 } | 2275 } |
| 2276 case kX64I32x4GtU: { |
| 2277 CpuFeatureScope sse_scope(masm(), SSE4_1); |
| 2278 XMMRegister dst = i.OutputSimd128Register(); |
| 2279 XMMRegister src = i.InputSimd128Register(1); |
| 2280 __ pmaxud(dst, src); |
| 2281 __ pcmpeqd(dst, src); |
| 2282 __ pcmpeqd(kScratchDoubleReg, kScratchDoubleReg); |
| 2283 __ pxor(dst, kScratchDoubleReg); |
| 2284 break; |
| 2285 } |
| 2286 case kX64I32x4GeU: { |
| 2287 CpuFeatureScope sse_scope(masm(), SSE4_1); |
| 2288 XMMRegister dst = i.OutputSimd128Register(); |
| 2289 XMMRegister src = i.InputSimd128Register(1); |
| 2290 __ pminud(dst, src); |
| 2291 __ pcmpeqd(dst, src); |
| 2292 break; |
| 2293 } |
2251 case kX64S128Zero: { | 2294 case kX64S128Zero: { |
2252 XMMRegister dst = i.OutputSimd128Register(); | 2295 XMMRegister dst = i.OutputSimd128Register(); |
2253 __ xorps(dst, dst); | 2296 __ xorps(dst, dst); |
2254 break; | 2297 break; |
2255 } | 2298 } |
2256 case kX64I16x8Splat: { | 2299 case kX64I16x8Splat: { |
2257 XMMRegister dst = i.OutputSimd128Register(); | 2300 XMMRegister dst = i.OutputSimd128Register(); |
2258 __ movd(dst, i.InputRegister(0)); | 2301 __ movd(dst, i.InputRegister(0)); |
2259 __ pshuflw(dst, dst, 0x0); | 2302 __ pshuflw(dst, dst, 0x0); |
2260 __ pshufhw(dst, dst, 0x0); | 2303 __ pshufhw(dst, dst, 0x0); |
(...skipping 10 matching lines...) Expand all Loading... |
2271 case kX64I16x8ReplaceLane: { | 2314 case kX64I16x8ReplaceLane: { |
2272 CpuFeatureScope sse_scope(masm(), SSE4_1); | 2315 CpuFeatureScope sse_scope(masm(), SSE4_1); |
2273 if (instr->InputAt(2)->IsRegister()) { | 2316 if (instr->InputAt(2)->IsRegister()) { |
2274 __ pinsrw(i.OutputSimd128Register(), i.InputRegister(2), | 2317 __ pinsrw(i.OutputSimd128Register(), i.InputRegister(2), |
2275 i.InputInt8(1)); | 2318 i.InputInt8(1)); |
2276 } else { | 2319 } else { |
2277 __ pinsrw(i.OutputSimd128Register(), i.InputOperand(2), i.InputInt8(1)); | 2320 __ pinsrw(i.OutputSimd128Register(), i.InputOperand(2), i.InputInt8(1)); |
2278 } | 2321 } |
2279 break; | 2322 break; |
2280 } | 2323 } |
| 2324 case kX64I16x8Neg: { |
| 2325 CpuFeatureScope sse_scope(masm(), SSSE3); |
| 2326 XMMRegister dst = i.OutputSimd128Register(); |
| 2327 XMMRegister src = i.InputSimd128Register(0); |
| 2328 if (dst.is(src)) { |
| 2329 __ pcmpeqd(kScratchDoubleReg, kScratchDoubleReg); |
| 2330 __ psignw(dst, kScratchDoubleReg); |
| 2331 } else { |
| 2332 __ pxor(dst, dst); |
| 2333 __ psubw(dst, src); |
| 2334 } |
| 2335 break; |
| 2336 } |
2281 case kX64I16x8Shl: { | 2337 case kX64I16x8Shl: { |
2282 __ psllw(i.OutputSimd128Register(), i.InputInt8(1)); | 2338 __ psllw(i.OutputSimd128Register(), i.InputInt8(1)); |
2283 break; | 2339 break; |
2284 } | 2340 } |
2285 case kX64I16x8ShrS: { | 2341 case kX64I16x8ShrS: { |
2286 __ psraw(i.OutputSimd128Register(), i.InputInt8(1)); | 2342 __ psraw(i.OutputSimd128Register(), i.InputInt8(1)); |
2287 break; | 2343 break; |
2288 } | 2344 } |
2289 case kX64I16x8Add: { | 2345 case kX64I16x8Add: { |
2290 __ paddw(i.OutputSimd128Register(), i.InputSimd128Register(1)); | 2346 __ paddw(i.OutputSimd128Register(), i.InputSimd128Register(1)); |
(...skipping 34 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
2325 case kX64I16x8Eq: { | 2381 case kX64I16x8Eq: { |
2326 __ pcmpeqw(i.OutputSimd128Register(), i.InputSimd128Register(1)); | 2382 __ pcmpeqw(i.OutputSimd128Register(), i.InputSimd128Register(1)); |
2327 break; | 2383 break; |
2328 } | 2384 } |
2329 case kX64I16x8Ne: { | 2385 case kX64I16x8Ne: { |
2330 __ pcmpeqw(i.OutputSimd128Register(), i.InputSimd128Register(1)); | 2386 __ pcmpeqw(i.OutputSimd128Register(), i.InputSimd128Register(1)); |
2331 __ pcmpeqw(kScratchDoubleReg, kScratchDoubleReg); | 2387 __ pcmpeqw(kScratchDoubleReg, kScratchDoubleReg); |
2332 __ pxor(i.OutputSimd128Register(), kScratchDoubleReg); | 2388 __ pxor(i.OutputSimd128Register(), kScratchDoubleReg); |
2333 break; | 2389 break; |
2334 } | 2390 } |
| 2391 case kX64I16x8GtS: { |
| 2392 __ pcmpgtw(i.OutputSimd128Register(), i.InputSimd128Register(1)); |
| 2393 break; |
| 2394 } |
| 2395 case kX64I16x8GeS: { |
| 2396 CpuFeatureScope sse_scope(masm(), SSE4_1); |
| 2397 XMMRegister dst = i.OutputSimd128Register(); |
| 2398 XMMRegister src = i.InputSimd128Register(1); |
| 2399 __ pminsw(dst, src); |
| 2400 __ pcmpeqw(dst, src); |
| 2401 break; |
| 2402 } |
2335 case kX64I16x8ShrU: { | 2403 case kX64I16x8ShrU: { |
2336 __ psrlw(i.OutputSimd128Register(), i.InputInt8(1)); | 2404 __ psrlw(i.OutputSimd128Register(), i.InputInt8(1)); |
2337 break; | 2405 break; |
2338 } | 2406 } |
2339 case kX64I16x8AddSaturateU: { | 2407 case kX64I16x8AddSaturateU: { |
2340 __ paddusw(i.OutputSimd128Register(), i.InputSimd128Register(1)); | 2408 __ paddusw(i.OutputSimd128Register(), i.InputSimd128Register(1)); |
2341 break; | 2409 break; |
2342 } | 2410 } |
2343 case kX64I16x8SubSaturateU: { | 2411 case kX64I16x8SubSaturateU: { |
2344 __ psubusw(i.OutputSimd128Register(), i.InputSimd128Register(1)); | 2412 __ psubusw(i.OutputSimd128Register(), i.InputSimd128Register(1)); |
2345 break; | 2413 break; |
2346 } | 2414 } |
2347 case kX64I16x8MinU: { | 2415 case kX64I16x8MinU: { |
2348 CpuFeatureScope sse_scope(masm(), SSE4_1); | 2416 CpuFeatureScope sse_scope(masm(), SSE4_1); |
2349 __ pminuw(i.OutputSimd128Register(), i.InputSimd128Register(1)); | 2417 __ pminuw(i.OutputSimd128Register(), i.InputSimd128Register(1)); |
2350 break; | 2418 break; |
2351 } | 2419 } |
2352 case kX64I16x8MaxU: { | 2420 case kX64I16x8MaxU: { |
2353 CpuFeatureScope sse_scope(masm(), SSE4_1); | 2421 CpuFeatureScope sse_scope(masm(), SSE4_1); |
2354 __ pmaxuw(i.OutputSimd128Register(), i.InputSimd128Register(1)); | 2422 __ pmaxuw(i.OutputSimd128Register(), i.InputSimd128Register(1)); |
2355 break; | 2423 break; |
2356 } | 2424 } |
| 2425 case kX64I16x8GtU: { |
| 2426 CpuFeatureScope sse_scope(masm(), SSE4_1); |
| 2427 XMMRegister dst = i.OutputSimd128Register(); |
| 2428 XMMRegister src = i.InputSimd128Register(1); |
| 2429 __ pmaxuw(dst, src); |
| 2430 __ pcmpeqw(dst, src); |
| 2431 __ pcmpeqw(kScratchDoubleReg, kScratchDoubleReg); |
| 2432 __ pxor(dst, kScratchDoubleReg); |
| 2433 break; |
| 2434 } |
| 2435 case kX64I16x8GeU: { |
| 2436 CpuFeatureScope sse_scope(masm(), SSE4_1); |
| 2437 XMMRegister dst = i.OutputSimd128Register(); |
| 2438 XMMRegister src = i.InputSimd128Register(1); |
| 2439 __ pminuw(dst, src); |
| 2440 __ pcmpeqw(dst, src); |
| 2441 break; |
| 2442 } |
2357 case kX64I8x16Splat: { | 2443 case kX64I8x16Splat: { |
2358 CpuFeatureScope sse_scope(masm(), SSSE3); | 2444 CpuFeatureScope sse_scope(masm(), SSSE3); |
2359 XMMRegister dst = i.OutputSimd128Register(); | 2445 XMMRegister dst = i.OutputSimd128Register(); |
2360 __ movd(dst, i.InputRegister(0)); | 2446 __ movd(dst, i.InputRegister(0)); |
2361 __ xorps(kScratchDoubleReg, kScratchDoubleReg); | 2447 __ xorps(kScratchDoubleReg, kScratchDoubleReg); |
2362 __ pshufb(dst, kScratchDoubleReg); | 2448 __ pshufb(dst, kScratchDoubleReg); |
2363 break; | 2449 break; |
2364 } | 2450 } |
2365 case kX64I8x16ExtractLane: { | 2451 case kX64I8x16ExtractLane: { |
2366 CpuFeatureScope sse_scope(masm(), SSE4_1); | 2452 CpuFeatureScope sse_scope(masm(), SSE4_1); |
2367 Register dst = i.OutputRegister(); | 2453 Register dst = i.OutputRegister(); |
2368 __ pextrb(dst, i.InputSimd128Register(0), i.InputInt8(1)); | 2454 __ pextrb(dst, i.InputSimd128Register(0), i.InputInt8(1)); |
2369 __ movsxbl(dst, dst); | 2455 __ movsxbl(dst, dst); |
2370 break; | 2456 break; |
2371 } | 2457 } |
2372 case kX64I8x16ReplaceLane: { | 2458 case kX64I8x16ReplaceLane: { |
2373 CpuFeatureScope sse_scope(masm(), SSE4_1); | 2459 CpuFeatureScope sse_scope(masm(), SSE4_1); |
2374 if (instr->InputAt(2)->IsRegister()) { | 2460 if (instr->InputAt(2)->IsRegister()) { |
2375 __ pinsrb(i.OutputSimd128Register(), i.InputRegister(2), | 2461 __ pinsrb(i.OutputSimd128Register(), i.InputRegister(2), |
2376 i.InputInt8(1)); | 2462 i.InputInt8(1)); |
2377 } else { | 2463 } else { |
2378 __ pinsrb(i.OutputSimd128Register(), i.InputOperand(2), i.InputInt8(1)); | 2464 __ pinsrb(i.OutputSimd128Register(), i.InputOperand(2), i.InputInt8(1)); |
2379 } | 2465 } |
2380 break; | 2466 break; |
2381 } | 2467 } |
| 2468 case kX64I8x16Neg: { |
| 2469 CpuFeatureScope sse_scope(masm(), SSSE3); |
| 2470 XMMRegister dst = i.OutputSimd128Register(); |
| 2471 XMMRegister src = i.InputSimd128Register(0); |
| 2472 if (dst.is(src)) { |
| 2473 __ pcmpeqd(kScratchDoubleReg, kScratchDoubleReg); |
| 2474 __ psignb(dst, kScratchDoubleReg); |
| 2475 } else { |
| 2476 __ pxor(dst, dst); |
| 2477 __ psubb(dst, src); |
| 2478 } |
| 2479 break; |
| 2480 } |
2382 case kX64I8x16Add: { | 2481 case kX64I8x16Add: { |
2383 __ paddb(i.OutputSimd128Register(), i.InputSimd128Register(1)); | 2482 __ paddb(i.OutputSimd128Register(), i.InputSimd128Register(1)); |
2384 break; | 2483 break; |
2385 } | 2484 } |
2386 case kX64I8x16AddSaturateS: { | 2485 case kX64I8x16AddSaturateS: { |
2387 __ paddsb(i.OutputSimd128Register(), i.InputSimd128Register(1)); | 2486 __ paddsb(i.OutputSimd128Register(), i.InputSimd128Register(1)); |
2388 break; | 2487 break; |
2389 } | 2488 } |
2390 case kX64I8x16Sub: { | 2489 case kX64I8x16Sub: { |
2391 __ psubb(i.OutputSimd128Register(), i.InputSimd128Register(1)); | 2490 __ psubb(i.OutputSimd128Register(), i.InputSimd128Register(1)); |
(...skipping 16 matching lines...) Expand all Loading... |
2408 case kX64I8x16Eq: { | 2507 case kX64I8x16Eq: { |
2409 __ pcmpeqb(i.OutputSimd128Register(), i.InputSimd128Register(1)); | 2508 __ pcmpeqb(i.OutputSimd128Register(), i.InputSimd128Register(1)); |
2410 break; | 2509 break; |
2411 } | 2510 } |
2412 case kX64I8x16Ne: { | 2511 case kX64I8x16Ne: { |
2413 __ pcmpeqb(i.OutputSimd128Register(), i.InputSimd128Register(1)); | 2512 __ pcmpeqb(i.OutputSimd128Register(), i.InputSimd128Register(1)); |
2414 __ pcmpeqb(kScratchDoubleReg, kScratchDoubleReg); | 2513 __ pcmpeqb(kScratchDoubleReg, kScratchDoubleReg); |
2415 __ pxor(i.OutputSimd128Register(), kScratchDoubleReg); | 2514 __ pxor(i.OutputSimd128Register(), kScratchDoubleReg); |
2416 break; | 2515 break; |
2417 } | 2516 } |
| 2517 case kX64I8x16GtS: { |
| 2518 __ pcmpgtb(i.OutputSimd128Register(), i.InputSimd128Register(1)); |
| 2519 break; |
| 2520 } |
| 2521 case kX64I8x16GeS: { |
| 2522 CpuFeatureScope sse_scope(masm(), SSE4_1); |
| 2523 XMMRegister dst = i.OutputSimd128Register(); |
| 2524 XMMRegister src = i.InputSimd128Register(1); |
| 2525 __ pminsb(dst, src); |
| 2526 __ pcmpeqb(dst, src); |
| 2527 break; |
| 2528 } |
2418 case kX64I8x16AddSaturateU: { | 2529 case kX64I8x16AddSaturateU: { |
2419 __ paddusb(i.OutputSimd128Register(), i.InputSimd128Register(1)); | 2530 __ paddusb(i.OutputSimd128Register(), i.InputSimd128Register(1)); |
2420 break; | 2531 break; |
2421 } | 2532 } |
2422 case kX64I8x16SubSaturateU: { | 2533 case kX64I8x16SubSaturateU: { |
2423 __ psubusb(i.OutputSimd128Register(), i.InputSimd128Register(1)); | 2534 __ psubusb(i.OutputSimd128Register(), i.InputSimd128Register(1)); |
2424 break; | 2535 break; |
2425 } | 2536 } |
2426 case kX64I8x16MinU: { | 2537 case kX64I8x16MinU: { |
2427 CpuFeatureScope sse_scope(masm(), SSE4_1); | 2538 CpuFeatureScope sse_scope(masm(), SSE4_1); |
2428 __ pminub(i.OutputSimd128Register(), i.InputSimd128Register(1)); | 2539 __ pminub(i.OutputSimd128Register(), i.InputSimd128Register(1)); |
2429 break; | 2540 break; |
2430 } | 2541 } |
2431 case kX64I8x16MaxU: { | 2542 case kX64I8x16MaxU: { |
2432 CpuFeatureScope sse_scope(masm(), SSE4_1); | 2543 CpuFeatureScope sse_scope(masm(), SSE4_1); |
2433 __ pmaxub(i.OutputSimd128Register(), i.InputSimd128Register(1)); | 2544 __ pmaxub(i.OutputSimd128Register(), i.InputSimd128Register(1)); |
2434 break; | 2545 break; |
2435 } | 2546 } |
| 2547 case kX64I8x16GtU: { |
| 2548 CpuFeatureScope sse_scope(masm(), SSE4_1); |
| 2549 XMMRegister dst = i.OutputSimd128Register(); |
| 2550 XMMRegister src = i.InputSimd128Register(1); |
| 2551 __ pmaxub(dst, src); |
| 2552 __ pcmpeqb(dst, src); |
| 2553 __ pcmpeqb(kScratchDoubleReg, kScratchDoubleReg); |
| 2554 __ pxor(dst, kScratchDoubleReg); |
| 2555 break; |
| 2556 } |
| 2557 case kX64I8x16GeU: { |
| 2558 CpuFeatureScope sse_scope(masm(), SSE4_1); |
| 2559 XMMRegister dst = i.OutputSimd128Register(); |
| 2560 XMMRegister src = i.InputSimd128Register(1); |
| 2561 __ pminub(dst, src); |
| 2562 __ pcmpeqb(dst, src); |
| 2563 break; |
| 2564 } |
2436 case kX64S128And: { | 2565 case kX64S128And: { |
2437 __ pand(i.OutputSimd128Register(), i.InputSimd128Register(1)); | 2566 __ pand(i.OutputSimd128Register(), i.InputSimd128Register(1)); |
2438 break; | 2567 break; |
2439 } | 2568 } |
2440 case kX64S128Or: { | 2569 case kX64S128Or: { |
2441 __ por(i.OutputSimd128Register(), i.InputSimd128Register(1)); | 2570 __ por(i.OutputSimd128Register(), i.InputSimd128Register(1)); |
2442 break; | 2571 break; |
2443 } | 2572 } |
2444 case kX64S128Xor: { | 2573 case kX64S128Xor: { |
2445 __ pxor(i.OutputSimd128Register(), i.InputSimd128Register(1)); | 2574 __ pxor(i.OutputSimd128Register(), i.InputSimd128Register(1)); |
2446 break; | 2575 break; |
2447 } | 2576 } |
2448 case kX64S128Not: { | 2577 case kX64S128Not: { |
2449 XMMRegister dst = i.OutputSimd128Register(); | 2578 XMMRegister dst = i.OutputSimd128Register(); |
2450 __ pcmpeqd(dst, dst); | 2579 XMMRegister src = i.InputSimd128Register(0); |
2451 __ pxor(dst, i.InputSimd128Register(1)); | 2580 if (dst.is(src)) { |
| 2581 __ movaps(kScratchDoubleReg, dst); |
| 2582 __ pcmpeqd(dst, dst); |
| 2583 __ pxor(dst, kScratchDoubleReg); |
| 2584 } else { |
| 2585 __ pcmpeqd(dst, dst); |
| 2586 __ pxor(dst, src); |
| 2587 } |
| 2588 |
2452 break; | 2589 break; |
2453 } | 2590 } |
2454 case kX64S128Select: { | 2591 case kX64S128Select: { |
2455 // Mask used here is stored in dst. | 2592 // Mask used here is stored in dst. |
2456 XMMRegister dst = i.OutputSimd128Register(); | 2593 XMMRegister dst = i.OutputSimd128Register(); |
2457 __ movaps(kScratchDoubleReg, i.InputSimd128Register(1)); | 2594 __ movaps(kScratchDoubleReg, i.InputSimd128Register(1)); |
2458 __ xorps(kScratchDoubleReg, i.InputSimd128Register(2)); | 2595 __ xorps(kScratchDoubleReg, i.InputSimd128Register(2)); |
2459 __ andps(dst, kScratchDoubleReg); | 2596 __ andps(dst, kScratchDoubleReg); |
2460 __ xorps(dst, i.InputSimd128Register(2)); | 2597 __ xorps(dst, i.InputSimd128Register(2)); |
2461 break; | 2598 break; |
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3214 int padding_size = last_lazy_deopt_pc_ + space_needed - current_pc; | 3351 int padding_size = last_lazy_deopt_pc_ + space_needed - current_pc; |
3215 __ Nop(padding_size); | 3352 __ Nop(padding_size); |
3216 } | 3353 } |
3217 } | 3354 } |
3218 | 3355 |
3219 #undef __ | 3356 #undef __ |
3220 | 3357 |
3221 } // namespace compiler | 3358 } // namespace compiler |
3222 } // namespace internal | 3359 } // namespace internal |
3223 } // namespace v8 | 3360 } // namespace v8 |
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