[arm, arm64] Implemented unaligned scalar float access.

[arm, arm64] Implemented unaligned scalar float access.

[arm64] Fix unaligned (u)int64 stores.

Fix unaligned access test to use host endianness.

Issue #22151

R=zra@google.com

Committed: https://github.com/dart-lang/sdk/commit/72e1775fd1805778f7f2ca4f7242dcfb0afdc8a2

[rmacnak, 2017-06-16 22:12:50]

Description was changed from

==========
Unaligned float access.
==========

to

==========
[arm, arm64] Implemented unaligned scalar float access.

[arm64] Fix unaligned (u)int64 stores.

Fix unaligned access test to use host endianness.
==========

[rmacnak, 2017-06-16 22:13:12]

Description was changed from

==========
[arm, arm64] Implemented unaligned scalar float access.

[arm64] Fix unaligned (u)int64 stores.

Fix unaligned access test to use host endianness.
==========

to

==========
[arm, arm64] Implemented unaligned scalar float access.

[arm64] Fix unaligned (u)int64 stores.

Fix unaligned access test to use host endianness.

Issue #22151
==========

[rmacnak, 2017-06-16 22:19:27]

rmacnak@google.com changed reviewers:
+ zra@google.com

[zra, 2017-06-19 15:02:49]

https://codereview.chromium.org/2940883008/diff/100001/runtime/vm/intermediat...
File runtime/vm/intermediate_language_arm.cc (right):

https://codereview.chromium.org/2940883008/diff/100001/runtime/vm/intermediat...
runtime/vm/intermediate_language_arm.cc:1350: const Register value1 =
locs()->temp(1).reg();
You can save a temporary register here by using vmovsr to load the upper and
lower halves of the double separately:

__ LoadWordUnaligned(value1, address, TMP);
__ vmovsr(sresult0, value1);
__ AddImmediate(address, address, 4);
__ LoadWordUnaligned(value1, address, TMP);
__ vmovsr(sresult1, value1);

https://codereview.chromium.org/2940883008/diff/100001/runtime/vm/intermediat...
runtime/vm/intermediate_language_arm.cc:1676: const Register& address = temp;
Is & needed?

https://codereview.chromium.org/2940883008/diff/100001/runtime/vm/intermediat...
runtime/vm/intermediate_language_arm.cc:1691: __ vmovrrd(value1, value2,
value_reg);
Same idea here for saving a temporary by using vmovrs twice.

[zra, 2017-06-19 17:16:04]

lgtm

[rmacnak, 2017-06-19 17:18:32]

https://codereview.chromium.org/2940883008/diff/100001/runtime/vm/intermediat...
File runtime/vm/intermediate_language_arm.cc (right):

https://codereview.chromium.org/2940883008/diff/100001/runtime/vm/intermediat...
runtime/vm/intermediate_language_arm.cc:1350: const Register value1 =
locs()->temp(1).reg();
On 2017/06/19 15:02:48, zra wrote:
> You can save a temporary register here by using vmovsr to load the upper and
> lower halves of the double separately:
> 
> __ LoadWordUnaligned(value1, address, TMP);
> __ vmovsr(sresult0, value1);
> __ AddImmediate(address, address, 4);
> __ LoadWordUnaligned(value1, address, TMP);
> __ vmovsr(sresult1, value1);

Done.

https://codereview.chromium.org/2940883008/diff/100001/runtime/vm/intermediat...
runtime/vm/intermediate_language_arm.cc:1676: const Register& address = temp;
On 2017/06/19 15:02:48, zra wrote:
> Is & needed?

No, removed.

[rmacnak, 2017-06-19 17:28:42]

Description was changed from

==========
[arm, arm64] Implemented unaligned scalar float access.

[arm64] Fix unaligned (u)int64 stores.

Fix unaligned access test to use host endianness.

Issue #22151
==========

to

==========
[arm, arm64] Implemented unaligned scalar float access.

[arm64] Fix unaligned (u)int64 stores.

Fix unaligned access test to use host endianness.

Issue #22151

R=zra@google.com

Committed:
https://github.com/dart-lang/sdk/commit/72e1775fd1805778f7f2ca4f7242dcfb0afdc8a2
==========

[rmacnak, 2017-06-19 17:28:44]

Committed patchset #7 (id:120001) manually as
72e1775fd1805778f7f2ca4f7242dcfb0afdc8a2.