| Index: src/x87/assembler-x87.h
|
| diff --git a/src/ia32/assembler-ia32.h b/src/x87/assembler-x87.h
|
| similarity index 84%
|
| copy from src/ia32/assembler-ia32.h
|
| copy to src/x87/assembler-x87.h
|
| index 55ab81452a602414a942b18ceef6ff05bf1747e9..34acdb2f3492c1df6d9d75a4c3568550e7b044af 100644
|
| --- a/src/ia32/assembler-ia32.h
|
| +++ b/src/x87/assembler-x87.h
|
| @@ -34,8 +34,8 @@
|
|
|
| // A light-weight IA32 Assembler.
|
|
|
| -#ifndef V8_IA32_ASSEMBLER_IA32_H_
|
| -#define V8_IA32_ASSEMBLER_IA32_H_
|
| +#ifndef V8_X87_ASSEMBLER_X87_H_
|
| +#define V8_X87_ASSEMBLER_X87_H_
|
|
|
| #include "isolate.h"
|
| #include "serialize.h"
|
| @@ -141,25 +141,30 @@ inline Register Register::FromAllocationIndex(int index) {
|
| }
|
|
|
|
|
| -struct XMMRegister {
|
| - static const int kMaxNumAllocatableRegisters = 7;
|
| +struct X87Register {
|
| + static const int kMaxNumAllocatableRegisters = 8;
|
| static const int kMaxNumRegisters = 8;
|
| static int NumAllocatableRegisters() {
|
| return kMaxNumAllocatableRegisters;
|
| }
|
|
|
| - static int ToAllocationIndex(XMMRegister reg) {
|
| - ASSERT(reg.code() != 0);
|
| - return reg.code() - 1;
|
| + static int ToAllocationIndex(X87Register reg) {
|
| + return reg.code_;
|
| }
|
|
|
| - static XMMRegister FromAllocationIndex(int index) {
|
| + static const char* AllocationIndexToString(int index) {
|
| ASSERT(index >= 0 && index < kMaxNumAllocatableRegisters);
|
| - return from_code(index + 1);
|
| + const char* const names[] = {
|
| + "stX_0", "stX_1", "stX_2", "stX_3", "stX_4",
|
| + "stX_5", "stX_6", "stX_7"
|
| + };
|
| + return names[index];
|
| }
|
|
|
| - static XMMRegister from_code(int code) {
|
| - XMMRegister result = { code };
|
| + static X87Register FromAllocationIndex(int index) {
|
| + ASSERT(index >= 0 && index < kMaxNumAllocatableRegisters);
|
| + X87Register result;
|
| + result.code_ = index;
|
| return result;
|
| }
|
|
|
| @@ -172,38 +177,25 @@ struct XMMRegister {
|
| return code_;
|
| }
|
|
|
| - bool is(XMMRegister reg) const { return code_ == reg.code_; }
|
| -
|
| - static const char* AllocationIndexToString(int index) {
|
| - ASSERT(index >= 0 && index < kMaxNumAllocatableRegisters);
|
| - const char* const names[] = {
|
| - "xmm1",
|
| - "xmm2",
|
| - "xmm3",
|
| - "xmm4",
|
| - "xmm5",
|
| - "xmm6",
|
| - "xmm7"
|
| - };
|
| - return names[index];
|
| + bool is(X87Register reg) const {
|
| + return code_ == reg.code_;
|
| }
|
|
|
| int code_;
|
| };
|
|
|
|
|
| -typedef XMMRegister DoubleRegister;
|
| +typedef X87Register DoubleRegister;
|
|
|
|
|
| -const XMMRegister xmm0 = { 0 };
|
| -const XMMRegister xmm1 = { 1 };
|
| -const XMMRegister xmm2 = { 2 };
|
| -const XMMRegister xmm3 = { 3 };
|
| -const XMMRegister xmm4 = { 4 };
|
| -const XMMRegister xmm5 = { 5 };
|
| -const XMMRegister xmm6 = { 6 };
|
| -const XMMRegister xmm7 = { 7 };
|
| -const XMMRegister no_xmm_reg = { -1 };
|
| +const X87Register stX_0 = { 0 };
|
| +const X87Register stX_1 = { 1 };
|
| +const X87Register stX_2 = { 2 };
|
| +const X87Register stX_3 = { 3 };
|
| +const X87Register stX_4 = { 4 };
|
| +const X87Register stX_5 = { 5 };
|
| +const X87Register stX_6 = { 6 };
|
| +const X87Register stX_7 = { 7 };
|
|
|
|
|
| enum Condition {
|
| @@ -322,9 +314,6 @@ enum ScaleFactor {
|
|
|
| class Operand BASE_EMBEDDED {
|
| public:
|
| - // XMM reg
|
| - INLINE(explicit Operand(XMMRegister xmm_reg));
|
| -
|
| // [disp/r]
|
| INLINE(explicit Operand(int32_t disp, RelocInfo::Mode rmode));
|
| // disp only must always be relocated
|
| @@ -633,12 +622,6 @@ class Assembler : public AssemblerBase {
|
| void movzx_w(Register dst, Register src) { movzx_w(dst, Operand(src)); }
|
| void movzx_w(Register dst, const Operand& src);
|
|
|
| - // Conditional moves
|
| - void cmov(Condition cc, Register dst, Register src) {
|
| - cmov(cc, dst, Operand(src));
|
| - }
|
| - void cmov(Condition cc, Register dst, const Operand& src);
|
| -
|
| // Flag management.
|
| void cld();
|
|
|
| @@ -895,121 +878,6 @@ class Assembler : public AssemblerBase {
|
|
|
| void cpuid();
|
|
|
| - // SSE instructions
|
| - void movaps(XMMRegister dst, XMMRegister src);
|
| - void shufps(XMMRegister dst, XMMRegister src, byte imm8);
|
| -
|
| - void andps(XMMRegister dst, const Operand& src);
|
| - void andps(XMMRegister dst, XMMRegister src) { andps(dst, Operand(src)); }
|
| - void xorps(XMMRegister dst, const Operand& src);
|
| - void xorps(XMMRegister dst, XMMRegister src) { xorps(dst, Operand(src)); }
|
| - void orps(XMMRegister dst, const Operand& src);
|
| - void orps(XMMRegister dst, XMMRegister src) { orps(dst, Operand(src)); }
|
| -
|
| - void addps(XMMRegister dst, const Operand& src);
|
| - void addps(XMMRegister dst, XMMRegister src) { addps(dst, Operand(src)); }
|
| - void subps(XMMRegister dst, const Operand& src);
|
| - void subps(XMMRegister dst, XMMRegister src) { subps(dst, Operand(src)); }
|
| - void mulps(XMMRegister dst, const Operand& src);
|
| - void mulps(XMMRegister dst, XMMRegister src) { mulps(dst, Operand(src)); }
|
| - void divps(XMMRegister dst, const Operand& src);
|
| - void divps(XMMRegister dst, XMMRegister src) { divps(dst, Operand(src)); }
|
| -
|
| - // SSE2 instructions
|
| - void cvttss2si(Register dst, const Operand& src);
|
| - void cvttss2si(Register dst, XMMRegister src) {
|
| - cvttss2si(dst, Operand(src));
|
| - }
|
| - void cvttsd2si(Register dst, const Operand& src);
|
| - void cvtsd2si(Register dst, XMMRegister src);
|
| -
|
| - void cvtsi2sd(XMMRegister dst, Register src) { cvtsi2sd(dst, Operand(src)); }
|
| - void cvtsi2sd(XMMRegister dst, const Operand& src);
|
| - void cvtss2sd(XMMRegister dst, XMMRegister src);
|
| - void cvtsd2ss(XMMRegister dst, XMMRegister src);
|
| -
|
| - void addsd(XMMRegister dst, XMMRegister src);
|
| - void addsd(XMMRegister dst, const Operand& src);
|
| - void subsd(XMMRegister dst, XMMRegister src);
|
| - void mulsd(XMMRegister dst, XMMRegister src);
|
| - void mulsd(XMMRegister dst, const Operand& src);
|
| - void divsd(XMMRegister dst, XMMRegister src);
|
| - void xorpd(XMMRegister dst, XMMRegister src);
|
| - void sqrtsd(XMMRegister dst, XMMRegister src);
|
| -
|
| - void andpd(XMMRegister dst, XMMRegister src);
|
| - void orpd(XMMRegister dst, XMMRegister src);
|
| -
|
| - void ucomisd(XMMRegister dst, XMMRegister src) { ucomisd(dst, Operand(src)); }
|
| - void ucomisd(XMMRegister dst, const Operand& src);
|
| -
|
| - enum RoundingMode {
|
| - kRoundToNearest = 0x0,
|
| - kRoundDown = 0x1,
|
| - kRoundUp = 0x2,
|
| - kRoundToZero = 0x3
|
| - };
|
| -
|
| - void roundsd(XMMRegister dst, XMMRegister src, RoundingMode mode);
|
| -
|
| - void movmskpd(Register dst, XMMRegister src);
|
| - void movmskps(Register dst, XMMRegister src);
|
| -
|
| - void cmpltsd(XMMRegister dst, XMMRegister src);
|
| - void pcmpeqd(XMMRegister dst, XMMRegister src);
|
| -
|
| - void movdqa(XMMRegister dst, const Operand& src);
|
| - void movdqa(const Operand& dst, XMMRegister src);
|
| - void movdqu(XMMRegister dst, const Operand& src);
|
| - void movdqu(const Operand& dst, XMMRegister src);
|
| - void movdq(bool aligned, XMMRegister dst, const Operand& src) {
|
| - if (aligned) {
|
| - movdqa(dst, src);
|
| - } else {
|
| - movdqu(dst, src);
|
| - }
|
| - }
|
| -
|
| - void movd(XMMRegister dst, Register src) { movd(dst, Operand(src)); }
|
| - void movd(XMMRegister dst, const Operand& src);
|
| - void movd(Register dst, XMMRegister src) { movd(Operand(dst), src); }
|
| - void movd(const Operand& dst, XMMRegister src);
|
| - void movsd(XMMRegister dst, XMMRegister src) { movsd(dst, Operand(src)); }
|
| - void movsd(XMMRegister dst, const Operand& src);
|
| - void movsd(const Operand& dst, XMMRegister src);
|
| -
|
| -
|
| - void movss(XMMRegister dst, const Operand& src);
|
| - void movss(const Operand& dst, XMMRegister src);
|
| - void movss(XMMRegister dst, XMMRegister src) { movss(dst, Operand(src)); }
|
| - void extractps(Register dst, XMMRegister src, byte imm8);
|
| -
|
| - void pand(XMMRegister dst, XMMRegister src);
|
| - void pxor(XMMRegister dst, XMMRegister src);
|
| - void por(XMMRegister dst, XMMRegister src);
|
| - void ptest(XMMRegister dst, XMMRegister src);
|
| -
|
| - void psllq(XMMRegister reg, int8_t shift);
|
| - void psllq(XMMRegister dst, XMMRegister src);
|
| - void psrlq(XMMRegister reg, int8_t shift);
|
| - void psrlq(XMMRegister dst, XMMRegister src);
|
| - void pshufd(XMMRegister dst, XMMRegister src, uint8_t shuffle);
|
| - void pextrd(Register dst, XMMRegister src, int8_t offset) {
|
| - pextrd(Operand(dst), src, offset);
|
| - }
|
| - void pextrd(const Operand& dst, XMMRegister src, int8_t offset);
|
| - void pinsrd(XMMRegister dst, Register src, int8_t offset) {
|
| - pinsrd(dst, Operand(src), offset);
|
| - }
|
| - void pinsrd(XMMRegister dst, const Operand& src, int8_t offset);
|
| -
|
| - // Parallel XMM operations.
|
| - void movntdqa(XMMRegister dst, const Operand& src);
|
| - void movntdq(const Operand& dst, XMMRegister src);
|
| - // Prefetch src position into cache level.
|
| - // Level 1, 2 or 3 specifies CPU cache level. Level 0 specifies a
|
| - // non-temporal
|
| - void prefetch(const Operand& src, int level);
|
| // TODO(lrn): Need SFENCE for movnt?
|
|
|
| // Debugging
|
| @@ -1067,11 +935,6 @@ class Assembler : public AssemblerBase {
|
| void PopulateConstantPool(ConstantPoolArray* constant_pool);
|
|
|
| protected:
|
| - void emit_sse_operand(XMMRegister reg, const Operand& adr);
|
| - void emit_sse_operand(XMMRegister dst, XMMRegister src);
|
| - void emit_sse_operand(Register dst, XMMRegister src);
|
| - void emit_sse_operand(XMMRegister dst, Register src);
|
| -
|
| byte* addr_at(int pos) { return buffer_ + pos; }
|
|
|
|
|
| @@ -1165,4 +1028,4 @@ class EnsureSpace BASE_EMBEDDED {
|
|
|
| } } // namespace v8::internal
|
|
|
| -#endif // V8_IA32_ASSEMBLER_IA32_H_
|
| +#endif // V8_X87_ASSEMBLER_X87_H_
|
|
|