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Unified Diff: src/x87/assembler-x87.cc

Issue 293743005: Introduce x87 port (Closed) Base URL: git://github.com/v8/v8.git@master
Patch Set: rebase Created 6 years, 7 months ago
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Index: src/x87/assembler-x87.cc
diff --git a/src/ia32/assembler-ia32.cc b/src/x87/assembler-x87.cc
similarity index 78%
copy from src/ia32/assembler-ia32.cc
copy to src/x87/assembler-x87.cc
index cee926ffb04e12ab2fc9bac1e9cbf879ca0a0f1c..0d2c0a3821c5db2d0f421a7ba64ec2274e1eaa87 100644
--- a/src/ia32/assembler-ia32.cc
+++ b/src/x87/assembler-x87.cc
@@ -36,7 +36,7 @@
#include "v8.h"
-#if V8_TARGET_ARCH_IA32
+#if V8_TARGET_ARCH_X87
#include "disassembler.h"
#include "macro-assembler.h"
@@ -50,15 +50,13 @@ namespace internal {
void CpuFeatures::ProbeImpl(bool cross_compile) {
CPU cpu;
- CHECK(cpu.has_sse2()); // SSE2 support is mandatory.
- CHECK(cpu.has_cmov()); // CMOV support is mandatory.
+ // SAHF must be available in compat/legacy mode.
+ CHECK(cpu.has_sahf());
+ supported_ |= 1u << SAHF;
supported_ |= OS::CpuFeaturesImpliedByPlatform();
// Only use statically determined features for cross compile (snapshot).
if (cross_compile) return;
-
- if (cpu.has_sse41() && FLAG_enable_sse4_1) supported_ |= 1u << SSE4_1;
- if (cpu.has_sse3() && FLAG_enable_sse3) supported_ |= 1u << SSE3;
}
@@ -290,65 +288,12 @@ bool Assembler::IsNop(Address addr) {
void Assembler::Nop(int bytes) {
EnsureSpace ensure_space(this);
- // Multi byte nops from http://support.amd.com/us/Processor_TechDocs/40546.pdf
- while (bytes > 0) {
- switch (bytes) {
- case 2:
- EMIT(0x66);
- case 1:
- EMIT(0x90);
- return;
- case 3:
- EMIT(0xf);
- EMIT(0x1f);
- EMIT(0);
- return;
- case 4:
- EMIT(0xf);
- EMIT(0x1f);
- EMIT(0x40);
- EMIT(0);
- return;
- case 6:
- EMIT(0x66);
- case 5:
- EMIT(0xf);
- EMIT(0x1f);
- EMIT(0x44);
- EMIT(0);
- EMIT(0);
- return;
- case 7:
- EMIT(0xf);
- EMIT(0x1f);
- EMIT(0x80);
- EMIT(0);
- EMIT(0);
- EMIT(0);
- EMIT(0);
- return;
- default:
- case 11:
- EMIT(0x66);
- bytes--;
- case 10:
- EMIT(0x66);
- bytes--;
- case 9:
- EMIT(0x66);
- bytes--;
- case 8:
- EMIT(0xf);
- EMIT(0x1f);
- EMIT(0x84);
- EMIT(0);
- EMIT(0);
- EMIT(0);
- EMIT(0);
- EMIT(0);
- bytes -= 8;
- }
+ // Older CPUs that do not support SSE2 may not support multibyte NOP
+ // instructions.
+ for (; bytes > 0; bytes--) {
+ EMIT(0x90);
}
+ return;
}
@@ -588,15 +533,6 @@ void Assembler::movzx_w(Register dst, const Operand& src) {
}
-void Assembler::cmov(Condition cc, Register dst, const Operand& src) {
- EnsureSpace ensure_space(this);
- // Opcode: 0f 40 + cc /r.
- EMIT(0x0F);
- EMIT(0x40 + cc);
- emit_operand(dst, src);
-}
-
-
void Assembler::cld() {
EnsureSpace ensure_space(this);
EMIT(0xFC);
@@ -1881,547 +1817,6 @@ void Assembler::setcc(Condition cc, Register reg) {
}
-void Assembler::cvttss2si(Register dst, const Operand& src) {
- EnsureSpace ensure_space(this);
- EMIT(0xF3);
- EMIT(0x0F);
- EMIT(0x2C);
- emit_operand(dst, src);
-}
-
-
-void Assembler::cvttsd2si(Register dst, const Operand& src) {
- EnsureSpace ensure_space(this);
- EMIT(0xF2);
- EMIT(0x0F);
- EMIT(0x2C);
- emit_operand(dst, src);
-}
-
-
-void Assembler::cvtsd2si(Register dst, XMMRegister src) {
- EnsureSpace ensure_space(this);
- EMIT(0xF2);
- EMIT(0x0F);
- EMIT(0x2D);
- emit_sse_operand(dst, src);
-}
-
-
-void Assembler::cvtsi2sd(XMMRegister dst, const Operand& src) {
- EnsureSpace ensure_space(this);
- EMIT(0xF2);
- EMIT(0x0F);
- EMIT(0x2A);
- emit_sse_operand(dst, src);
-}
-
-
-void Assembler::cvtss2sd(XMMRegister dst, XMMRegister src) {
- EnsureSpace ensure_space(this);
- EMIT(0xF3);
- EMIT(0x0F);
- EMIT(0x5A);
- emit_sse_operand(dst, src);
-}
-
-
-void Assembler::cvtsd2ss(XMMRegister dst, XMMRegister src) {
- EnsureSpace ensure_space(this);
- EMIT(0xF2);
- EMIT(0x0F);
- EMIT(0x5A);
- emit_sse_operand(dst, src);
-}
-
-
-void Assembler::addsd(XMMRegister dst, XMMRegister src) {
- EnsureSpace ensure_space(this);
- EMIT(0xF2);
- EMIT(0x0F);
- EMIT(0x58);
- emit_sse_operand(dst, src);
-}
-
-
-void Assembler::addsd(XMMRegister dst, const Operand& src) {
- EnsureSpace ensure_space(this);
- EMIT(0xF2);
- EMIT(0x0F);
- EMIT(0x58);
- emit_sse_operand(dst, src);
-}
-
-
-void Assembler::mulsd(XMMRegister dst, XMMRegister src) {
- EnsureSpace ensure_space(this);
- EMIT(0xF2);
- EMIT(0x0F);
- EMIT(0x59);
- emit_sse_operand(dst, src);
-}
-
-
-void Assembler::mulsd(XMMRegister dst, const Operand& src) {
- EnsureSpace ensure_space(this);
- EMIT(0xF2);
- EMIT(0x0F);
- EMIT(0x59);
- emit_sse_operand(dst, src);
-}
-
-
-void Assembler::subsd(XMMRegister dst, XMMRegister src) {
- EnsureSpace ensure_space(this);
- EMIT(0xF2);
- EMIT(0x0F);
- EMIT(0x5C);
- emit_sse_operand(dst, src);
-}
-
-
-void Assembler::divsd(XMMRegister dst, XMMRegister src) {
- EnsureSpace ensure_space(this);
- EMIT(0xF2);
- EMIT(0x0F);
- EMIT(0x5E);
- emit_sse_operand(dst, src);
-}
-
-
-void Assembler::xorpd(XMMRegister dst, XMMRegister src) {
- EnsureSpace ensure_space(this);
- EMIT(0x66);
- EMIT(0x0F);
- EMIT(0x57);
- emit_sse_operand(dst, src);
-}
-
-
-void Assembler::andps(XMMRegister dst, const Operand& src) {
- EnsureSpace ensure_space(this);
- EMIT(0x0F);
- EMIT(0x54);
- emit_sse_operand(dst, src);
-}
-
-
-void Assembler::orps(XMMRegister dst, const Operand& src) {
- EnsureSpace ensure_space(this);
- EMIT(0x0F);
- EMIT(0x56);
- emit_sse_operand(dst, src);
-}
-
-
-void Assembler::xorps(XMMRegister dst, const Operand& src) {
- EnsureSpace ensure_space(this);
- EMIT(0x0F);
- EMIT(0x57);
- emit_sse_operand(dst, src);
-}
-
-
-void Assembler::addps(XMMRegister dst, const Operand& src) {
- EnsureSpace ensure_space(this);
- EMIT(0x0F);
- EMIT(0x58);
- emit_sse_operand(dst, src);
-}
-
-
-void Assembler::subps(XMMRegister dst, const Operand& src) {
- EnsureSpace ensure_space(this);
- EMIT(0x0F);
- EMIT(0x5C);
- emit_sse_operand(dst, src);
-}
-
-
-void Assembler::mulps(XMMRegister dst, const Operand& src) {
- EnsureSpace ensure_space(this);
- EMIT(0x0F);
- EMIT(0x59);
- emit_sse_operand(dst, src);
-}
-
-
-void Assembler::divps(XMMRegister dst, const Operand& src) {
- EnsureSpace ensure_space(this);
- EMIT(0x0F);
- EMIT(0x5E);
- emit_sse_operand(dst, src);
-}
-
-
-void Assembler::sqrtsd(XMMRegister dst, XMMRegister src) {
- EnsureSpace ensure_space(this);
- EMIT(0xF2);
- EMIT(0x0F);
- EMIT(0x51);
- emit_sse_operand(dst, src);
-}
-
-
-void Assembler::andpd(XMMRegister dst, XMMRegister src) {
- EnsureSpace ensure_space(this);
- EMIT(0x66);
- EMIT(0x0F);
- EMIT(0x54);
- emit_sse_operand(dst, src);
-}
-
-
-void Assembler::orpd(XMMRegister dst, XMMRegister src) {
- EnsureSpace ensure_space(this);
- EMIT(0x66);
- EMIT(0x0F);
- EMIT(0x56);
- emit_sse_operand(dst, src);
-}
-
-
-void Assembler::ucomisd(XMMRegister dst, const Operand& src) {
- EnsureSpace ensure_space(this);
- EMIT(0x66);
- EMIT(0x0F);
- EMIT(0x2E);
- emit_sse_operand(dst, src);
-}
-
-
-void Assembler::roundsd(XMMRegister dst, XMMRegister src, RoundingMode mode) {
- ASSERT(IsEnabled(SSE4_1));
- EnsureSpace ensure_space(this);
- EMIT(0x66);
- EMIT(0x0F);
- EMIT(0x3A);
- EMIT(0x0B);
- emit_sse_operand(dst, src);
- // Mask precision exeption.
- EMIT(static_cast<byte>(mode) | 0x8);
-}
-
-
-void Assembler::movmskpd(Register dst, XMMRegister src) {
- EnsureSpace ensure_space(this);
- EMIT(0x66);
- EMIT(0x0F);
- EMIT(0x50);
- emit_sse_operand(dst, src);
-}
-
-
-void Assembler::movmskps(Register dst, XMMRegister src) {
- EnsureSpace ensure_space(this);
- EMIT(0x0F);
- EMIT(0x50);
- emit_sse_operand(dst, src);
-}
-
-
-void Assembler::pcmpeqd(XMMRegister dst, XMMRegister src) {
- EnsureSpace ensure_space(this);
- EMIT(0x66);
- EMIT(0x0F);
- EMIT(0x76);
- emit_sse_operand(dst, src);
-}
-
-
-void Assembler::cmpltsd(XMMRegister dst, XMMRegister src) {
- EnsureSpace ensure_space(this);
- EMIT(0xF2);
- EMIT(0x0F);
- EMIT(0xC2);
- emit_sse_operand(dst, src);
- EMIT(1); // LT == 1
-}
-
-
-void Assembler::movaps(XMMRegister dst, XMMRegister src) {
- EnsureSpace ensure_space(this);
- EMIT(0x0F);
- EMIT(0x28);
- emit_sse_operand(dst, src);
-}
-
-
-void Assembler::shufps(XMMRegister dst, XMMRegister src, byte imm8) {
- ASSERT(is_uint8(imm8));
- EnsureSpace ensure_space(this);
- EMIT(0x0F);
- EMIT(0xC6);
- emit_sse_operand(dst, src);
- EMIT(imm8);
-}
-
-
-void Assembler::movdqa(const Operand& dst, XMMRegister src) {
- EnsureSpace ensure_space(this);
- EMIT(0x66);
- EMIT(0x0F);
- EMIT(0x7F);
- emit_sse_operand(src, dst);
-}
-
-
-void Assembler::movdqa(XMMRegister dst, const Operand& src) {
- EnsureSpace ensure_space(this);
- EMIT(0x66);
- EMIT(0x0F);
- EMIT(0x6F);
- emit_sse_operand(dst, src);
-}
-
-
-void Assembler::movdqu(const Operand& dst, XMMRegister src ) {
- EnsureSpace ensure_space(this);
- EMIT(0xF3);
- EMIT(0x0F);
- EMIT(0x7F);
- emit_sse_operand(src, dst);
-}
-
-
-void Assembler::movdqu(XMMRegister dst, const Operand& src) {
- EnsureSpace ensure_space(this);
- EMIT(0xF3);
- EMIT(0x0F);
- EMIT(0x6F);
- emit_sse_operand(dst, src);
-}
-
-
-void Assembler::movntdqa(XMMRegister dst, const Operand& src) {
- ASSERT(IsEnabled(SSE4_1));
- EnsureSpace ensure_space(this);
- EMIT(0x66);
- EMIT(0x0F);
- EMIT(0x38);
- EMIT(0x2A);
- emit_sse_operand(dst, src);
-}
-
-
-void Assembler::movntdq(const Operand& dst, XMMRegister src) {
- EnsureSpace ensure_space(this);
- EMIT(0x66);
- EMIT(0x0F);
- EMIT(0xE7);
- emit_sse_operand(src, dst);
-}
-
-
-void Assembler::prefetch(const Operand& src, int level) {
- ASSERT(is_uint2(level));
- EnsureSpace ensure_space(this);
- EMIT(0x0F);
- EMIT(0x18);
- // Emit hint number in Reg position of RegR/M.
- XMMRegister code = XMMRegister::from_code(level);
- emit_sse_operand(code, src);
-}
-
-
-void Assembler::movsd(const Operand& dst, XMMRegister src ) {
- EnsureSpace ensure_space(this);
- EMIT(0xF2); // double
- EMIT(0x0F);
- EMIT(0x11); // store
- emit_sse_operand(src, dst);
-}
-
-
-void Assembler::movsd(XMMRegister dst, const Operand& src) {
- EnsureSpace ensure_space(this);
- EMIT(0xF2); // double
- EMIT(0x0F);
- EMIT(0x10); // load
- emit_sse_operand(dst, src);
-}
-
-
-void Assembler::movss(const Operand& dst, XMMRegister src ) {
- EnsureSpace ensure_space(this);
- EMIT(0xF3); // float
- EMIT(0x0F);
- EMIT(0x11); // store
- emit_sse_operand(src, dst);
-}
-
-
-void Assembler::movss(XMMRegister dst, const Operand& src) {
- EnsureSpace ensure_space(this);
- EMIT(0xF3); // float
- EMIT(0x0F);
- EMIT(0x10); // load
- emit_sse_operand(dst, src);
-}
-
-
-void Assembler::movd(XMMRegister dst, const Operand& src) {
- EnsureSpace ensure_space(this);
- EMIT(0x66);
- EMIT(0x0F);
- EMIT(0x6E);
- emit_sse_operand(dst, src);
-}
-
-
-void Assembler::movd(const Operand& dst, XMMRegister src) {
- EnsureSpace ensure_space(this);
- EMIT(0x66);
- EMIT(0x0F);
- EMIT(0x7E);
- emit_sse_operand(src, dst);
-}
-
-
-void Assembler::extractps(Register dst, XMMRegister src, byte imm8) {
- ASSERT(IsEnabled(SSE4_1));
- ASSERT(is_uint8(imm8));
- EnsureSpace ensure_space(this);
- EMIT(0x66);
- EMIT(0x0F);
- EMIT(0x3A);
- EMIT(0x17);
- emit_sse_operand(src, dst);
- EMIT(imm8);
-}
-
-
-void Assembler::pand(XMMRegister dst, XMMRegister src) {
- EnsureSpace ensure_space(this);
- EMIT(0x66);
- EMIT(0x0F);
- EMIT(0xDB);
- emit_sse_operand(dst, src);
-}
-
-
-void Assembler::pxor(XMMRegister dst, XMMRegister src) {
- EnsureSpace ensure_space(this);
- EMIT(0x66);
- EMIT(0x0F);
- EMIT(0xEF);
- emit_sse_operand(dst, src);
-}
-
-
-void Assembler::por(XMMRegister dst, XMMRegister src) {
- EnsureSpace ensure_space(this);
- EMIT(0x66);
- EMIT(0x0F);
- EMIT(0xEB);
- emit_sse_operand(dst, src);
-}
-
-
-void Assembler::ptest(XMMRegister dst, XMMRegister src) {
- ASSERT(IsEnabled(SSE4_1));
- EnsureSpace ensure_space(this);
- EMIT(0x66);
- EMIT(0x0F);
- EMIT(0x38);
- EMIT(0x17);
- emit_sse_operand(dst, src);
-}
-
-
-void Assembler::psllq(XMMRegister reg, int8_t shift) {
- EnsureSpace ensure_space(this);
- EMIT(0x66);
- EMIT(0x0F);
- EMIT(0x73);
- emit_sse_operand(esi, reg); // esi == 6
- EMIT(shift);
-}
-
-
-void Assembler::psllq(XMMRegister dst, XMMRegister src) {
- EnsureSpace ensure_space(this);
- EMIT(0x66);
- EMIT(0x0F);
- EMIT(0xF3);
- emit_sse_operand(dst, src);
-}
-
-
-void Assembler::psrlq(XMMRegister reg, int8_t shift) {
- EnsureSpace ensure_space(this);
- EMIT(0x66);
- EMIT(0x0F);
- EMIT(0x73);
- emit_sse_operand(edx, reg); // edx == 2
- EMIT(shift);
-}
-
-
-void Assembler::psrlq(XMMRegister dst, XMMRegister src) {
- EnsureSpace ensure_space(this);
- EMIT(0x66);
- EMIT(0x0F);
- EMIT(0xD3);
- emit_sse_operand(dst, src);
-}
-
-
-void Assembler::pshufd(XMMRegister dst, XMMRegister src, uint8_t shuffle) {
- EnsureSpace ensure_space(this);
- EMIT(0x66);
- EMIT(0x0F);
- EMIT(0x70);
- emit_sse_operand(dst, src);
- EMIT(shuffle);
-}
-
-
-void Assembler::pextrd(const Operand& dst, XMMRegister src, int8_t offset) {
- ASSERT(IsEnabled(SSE4_1));
- EnsureSpace ensure_space(this);
- EMIT(0x66);
- EMIT(0x0F);
- EMIT(0x3A);
- EMIT(0x16);
- emit_sse_operand(src, dst);
- EMIT(offset);
-}
-
-
-void Assembler::pinsrd(XMMRegister dst, const Operand& src, int8_t offset) {
- ASSERT(IsEnabled(SSE4_1));
- EnsureSpace ensure_space(this);
- EMIT(0x66);
- EMIT(0x0F);
- EMIT(0x3A);
- EMIT(0x22);
- emit_sse_operand(dst, src);
- EMIT(offset);
-}
-
-
-void Assembler::emit_sse_operand(XMMRegister reg, const Operand& adr) {
- Register ireg = { reg.code() };
- emit_operand(ireg, adr);
-}
-
-
-void Assembler::emit_sse_operand(XMMRegister dst, XMMRegister src) {
- EMIT(0xC0 | dst.code() << 3 | src.code());
-}
-
-
-void Assembler::emit_sse_operand(Register dst, XMMRegister src) {
- EMIT(0xC0 | dst.code() << 3 | src.code());
-}
-
-
-void Assembler::emit_sse_operand(XMMRegister dst, Register src) {
- EMIT(0xC0 | (dst.code() << 3) | src.code());
-}
-
-
void Assembler::Print() {
Disassembler::Decode(isolate(), stdout, buffer_, pc_);
}
@@ -2586,7 +1981,7 @@ void Assembler::RecordRelocInfo(RelocInfo::Mode rmode, intptr_t data) {
// Don't record external references unless the heap will be serialized.
if (rmode == RelocInfo::EXTERNAL_REFERENCE &&
!serializer_enabled() && !emit_debug_code()) {
- return;
+ return;
}
RelocInfo rinfo(pc_, rmode, data, NULL);
reloc_info_writer.Write(&rinfo);
@@ -2634,4 +2029,4 @@ void LogGeneratedCodeCoverage(const char* file_line) {
} } // namespace v8::internal
-#endif // V8_TARGET_ARCH_IA32
+#endif // V8_TARGET_ARCH_X87
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