| Index: src/ia32/disasm-ia32.cc
|
| diff --git a/src/ia32/disasm-ia32.cc b/src/ia32/disasm-ia32.cc
|
| index 22eca9f4fe8042ecd2d1373a797db903a954d885..d4f84786c0f830d292c0189118537833d6dab906 100644
|
| --- a/src/ia32/disasm-ia32.cc
|
| +++ b/src/ia32/disasm-ia32.cc
|
| @@ -738,6 +738,11 @@ int DisassemblerIA32::AVXInstruction(byte* data) {
|
| int mod, regop, rm, vvvv = vex_vreg();
|
| get_modrm(*current, &mod, ®op, &rm);
|
| switch (opcode) {
|
| + case 0x00:
|
| + AppendToBuffer("vpshufb %s,%s,", NameOfXMMRegister(regop),
|
| + NameOfXMMRegister(vvvv));
|
| + current += PrintRightXMMOperand(current);
|
| + break;
|
| case 0x99:
|
| AppendToBuffer("vfmadd132s%c %s,%s,", float_size_code(),
|
| NameOfXMMRegister(regop), NameOfXMMRegister(vvvv));
|
| @@ -821,6 +826,20 @@ int DisassemblerIA32::AVXInstruction(byte* data) {
|
| int mod, regop, rm, vvvv = vex_vreg();
|
| get_modrm(*current, &mod, ®op, &rm);
|
| switch (opcode) {
|
| + case 0x14:
|
| + AppendToBuffer("vpextrb ");
|
| + current += PrintRightOperand(current);
|
| + AppendToBuffer(",%s,%d", NameOfXMMRegister(regop),
|
| + *reinterpret_cast<int8_t*>(current));
|
| + current++;
|
| + break;
|
| + case 0x15:
|
| + AppendToBuffer("vpextrw ");
|
| + current += PrintRightOperand(current);
|
| + AppendToBuffer(",%s,%d", NameOfXMMRegister(regop),
|
| + *reinterpret_cast<int8_t*>(current));
|
| + current++;
|
| + break;
|
| case 0x16:
|
| AppendToBuffer("vpextrd ");
|
| current += PrintRightOperand(current);
|
| @@ -828,6 +847,13 @@ int DisassemblerIA32::AVXInstruction(byte* data) {
|
| *reinterpret_cast<int8_t*>(current));
|
| current++;
|
| break;
|
| + case 0x20:
|
| + AppendToBuffer("vpinsrb %s,%s,", NameOfXMMRegister(regop),
|
| + NameOfXMMRegister(vvvv));
|
| + current += PrintRightOperand(current);
|
| + AppendToBuffer(",%d", *reinterpret_cast<int8_t*>(current));
|
| + current++;
|
| + break;
|
| case 0x22:
|
| AppendToBuffer("vpinsrd %s,%s,", NameOfXMMRegister(regop),
|
| NameOfXMMRegister(vvvv));
|
| @@ -872,6 +898,12 @@ int DisassemblerIA32::AVXInstruction(byte* data) {
|
| NameOfXMMRegister(vvvv));
|
| current += PrintRightXMMOperand(current);
|
| break;
|
| + case 0x70:
|
| + AppendToBuffer("vpshuflw %s,", NameOfXMMRegister(regop));
|
| + current += PrintRightXMMOperand(current);
|
| + AppendToBuffer(",%d", *reinterpret_cast<int8_t*>(current));
|
| + current++;
|
| + break;
|
| default:
|
| UnimplementedInstruction();
|
| }
|
| @@ -1149,6 +1181,13 @@ int DisassemblerIA32::AVXInstruction(byte* data) {
|
| current += PrintRightOperand(current);
|
| AppendToBuffer(",%s", NameOfXMMRegister(regop));
|
| break;
|
| + case 0xC4:
|
| + AppendToBuffer("vpinsrw %s,%s,", NameOfXMMRegister(regop),
|
| + NameOfXMMRegister(vvvv));
|
| + current += PrintRightOperand(current);
|
| + AppendToBuffer(",%d", *reinterpret_cast<int8_t*>(current));
|
| + current++;
|
| + break;
|
| #define DECLARE_SSE_AVX_DIS_CASE(instruction, notUsed1, notUsed2, opcode) \
|
| case 0x##opcode: { \
|
| AppendToBuffer("v" #instruction " %s,%s,", NameOfXMMRegister(regop), \
|
| @@ -1846,6 +1885,10 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer,
|
| int mod, regop, rm;
|
| get_modrm(*data, &mod, ®op, &rm);
|
| switch (op) {
|
| + case 0x00:
|
| + AppendToBuffer("pshufb %s,", NameOfXMMRegister(regop));
|
| + data += PrintRightXMMOperand(data);
|
| + break;
|
| case 0x17:
|
| AppendToBuffer("ptest %s,%s", NameOfXMMRegister(regop),
|
| NameOfXMMRegister(rm));
|
| @@ -1883,6 +1926,24 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer,
|
| NameOfXMMRegister(rm),
|
| static_cast<int>(imm8));
|
| data += 2;
|
| + } else if (*data == 0x14) {
|
| + data++;
|
| + int mod, regop, rm;
|
| + get_modrm(*data, &mod, ®op, &rm);
|
| + AppendToBuffer("pextrb ");
|
| + data += PrintRightOperand(data);
|
| + AppendToBuffer(",%s,%d", NameOfXMMRegister(regop),
|
| + *reinterpret_cast<int8_t*>(data));
|
| + data++;
|
| + } else if (*data == 0x15) {
|
| + data++;
|
| + int mod, regop, rm;
|
| + get_modrm(*data, &mod, ®op, &rm);
|
| + AppendToBuffer("pextrw ");
|
| + data += PrintRightOperand(data);
|
| + AppendToBuffer(",%s,%d", NameOfXMMRegister(regop),
|
| + *reinterpret_cast<int8_t*>(data));
|
| + data++;
|
| } else if (*data == 0x16) {
|
| data++;
|
| int mod, regop, rm;
|
| @@ -1902,6 +1963,14 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer,
|
| NameOfXMMRegister(regop),
|
| static_cast<int>(imm8));
|
| data += 2;
|
| + } else if (*data == 0x20) {
|
| + data++;
|
| + int mod, regop, rm;
|
| + get_modrm(*data, &mod, ®op, &rm);
|
| + AppendToBuffer("pinsrb %s,", NameOfXMMRegister(regop));
|
| + data += PrintRightOperand(data);
|
| + AppendToBuffer(",%d", *reinterpret_cast<int8_t*>(data));
|
| + data++;
|
| } else if (*data == 0x22) {
|
| data++;
|
| int mod, regop, rm;
|
| @@ -2158,6 +2227,14 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer,
|
| get_modrm(*data, &mod, ®op, &rm);
|
| AppendToBuffer("cvtsd2ss %s,", NameOfXMMRegister(regop));
|
| data += PrintRightXMMOperand(data);
|
| + } else if (b2 == 0x70) {
|
| + data += 3;
|
| + int mod, regop, rm;
|
| + get_modrm(*data, &mod, ®op, &rm);
|
| + AppendToBuffer("pshuflw %s,", NameOfXMMRegister(regop));
|
| + data += PrintRightXMMOperand(data);
|
| + AppendToBuffer(",%d", *reinterpret_cast<int8_t*>(data));
|
| + data++;
|
| } else {
|
| const char* mnem = "?";
|
| switch (b2) {
|
|
|