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| 1 // Copyright 2011 the V8 project authors. All rights reserved. | 1 // Copyright 2011 the V8 project authors. All rights reserved. |
| 2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
| 3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
| 4 | 4 |
| 5 #include <assert.h> | 5 #include <assert.h> |
| 6 #include <stdarg.h> | 6 #include <stdarg.h> |
| 7 #include <stdio.h> | 7 #include <stdio.h> |
| 8 | 8 |
| 9 #if V8_TARGET_ARCH_IA32 | 9 #if V8_TARGET_ARCH_IA32 |
| 10 | 10 |
| (...skipping 720 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 731 | 731 |
| 732 const char* sf_str[4] = {"", "rl", "ra", "ll"}; | 732 const char* sf_str[4] = {"", "rl", "ra", "ll"}; |
| 733 | 733 |
| 734 int DisassemblerIA32::AVXInstruction(byte* data) { | 734 int DisassemblerIA32::AVXInstruction(byte* data) { |
| 735 byte opcode = *data; | 735 byte opcode = *data; |
| 736 byte* current = data + 1; | 736 byte* current = data + 1; |
| 737 if (vex_66() && vex_0f38()) { | 737 if (vex_66() && vex_0f38()) { |
| 738 int mod, regop, rm, vvvv = vex_vreg(); | 738 int mod, regop, rm, vvvv = vex_vreg(); |
| 739 get_modrm(*current, &mod, ®op, &rm); | 739 get_modrm(*current, &mod, ®op, &rm); |
| 740 switch (opcode) { | 740 switch (opcode) { |
| 741 case 0x00: |
| 742 AppendToBuffer("vpshufb %s,%s,", NameOfXMMRegister(regop), |
| 743 NameOfXMMRegister(vvvv)); |
| 744 current += PrintRightXMMOperand(current); |
| 745 break; |
| 741 case 0x99: | 746 case 0x99: |
| 742 AppendToBuffer("vfmadd132s%c %s,%s,", float_size_code(), | 747 AppendToBuffer("vfmadd132s%c %s,%s,", float_size_code(), |
| 743 NameOfXMMRegister(regop), NameOfXMMRegister(vvvv)); | 748 NameOfXMMRegister(regop), NameOfXMMRegister(vvvv)); |
| 744 current += PrintRightXMMOperand(current); | 749 current += PrintRightXMMOperand(current); |
| 745 break; | 750 break; |
| 746 case 0xa9: | 751 case 0xa9: |
| 747 AppendToBuffer("vfmadd213s%c %s,%s,", float_size_code(), | 752 AppendToBuffer("vfmadd213s%c %s,%s,", float_size_code(), |
| 748 NameOfXMMRegister(regop), NameOfXMMRegister(vvvv)); | 753 NameOfXMMRegister(regop), NameOfXMMRegister(vvvv)); |
| 749 current += PrintRightXMMOperand(current); | 754 current += PrintRightXMMOperand(current); |
| 750 break; | 755 break; |
| (...skipping 63 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 814 | 819 |
| 815 SSE4_INSTRUCTION_LIST(DECLARE_SSE_AVX_DIS_CASE) | 820 SSE4_INSTRUCTION_LIST(DECLARE_SSE_AVX_DIS_CASE) |
| 816 #undef DECLARE_SSE_AVX_DIS_CASE | 821 #undef DECLARE_SSE_AVX_DIS_CASE |
| 817 default: | 822 default: |
| 818 UnimplementedInstruction(); | 823 UnimplementedInstruction(); |
| 819 } | 824 } |
| 820 } else if (vex_66() && vex_0f3a()) { | 825 } else if (vex_66() && vex_0f3a()) { |
| 821 int mod, regop, rm, vvvv = vex_vreg(); | 826 int mod, regop, rm, vvvv = vex_vreg(); |
| 822 get_modrm(*current, &mod, ®op, &rm); | 827 get_modrm(*current, &mod, ®op, &rm); |
| 823 switch (opcode) { | 828 switch (opcode) { |
| 829 case 0x14: |
| 830 AppendToBuffer("vpextrb "); |
| 831 current += PrintRightOperand(current); |
| 832 AppendToBuffer(",%s,%d", NameOfXMMRegister(regop), |
| 833 *reinterpret_cast<int8_t*>(current)); |
| 834 current++; |
| 835 break; |
| 836 case 0x15: |
| 837 AppendToBuffer("vpextrw "); |
| 838 current += PrintRightOperand(current); |
| 839 AppendToBuffer(",%s,%d", NameOfXMMRegister(regop), |
| 840 *reinterpret_cast<int8_t*>(current)); |
| 841 current++; |
| 842 break; |
| 824 case 0x16: | 843 case 0x16: |
| 825 AppendToBuffer("vpextrd "); | 844 AppendToBuffer("vpextrd "); |
| 826 current += PrintRightOperand(current); | 845 current += PrintRightOperand(current); |
| 827 AppendToBuffer(",%s,%d", NameOfXMMRegister(regop), | 846 AppendToBuffer(",%s,%d", NameOfXMMRegister(regop), |
| 828 *reinterpret_cast<int8_t*>(current)); | 847 *reinterpret_cast<int8_t*>(current)); |
| 829 current++; | 848 current++; |
| 830 break; | 849 break; |
| 850 case 0x20: |
| 851 AppendToBuffer("vpinsrb %s,%s,", NameOfXMMRegister(regop), |
| 852 NameOfXMMRegister(vvvv)); |
| 853 current += PrintRightOperand(current); |
| 854 AppendToBuffer(",%d", *reinterpret_cast<int8_t*>(current)); |
| 855 current++; |
| 856 break; |
| 831 case 0x22: | 857 case 0x22: |
| 832 AppendToBuffer("vpinsrd %s,%s,", NameOfXMMRegister(regop), | 858 AppendToBuffer("vpinsrd %s,%s,", NameOfXMMRegister(regop), |
| 833 NameOfXMMRegister(vvvv)); | 859 NameOfXMMRegister(vvvv)); |
| 834 current += PrintRightOperand(current); | 860 current += PrintRightOperand(current); |
| 835 AppendToBuffer(",%d", *reinterpret_cast<int8_t*>(current)); | 861 AppendToBuffer(",%d", *reinterpret_cast<int8_t*>(current)); |
| 836 current++; | 862 current++; |
| 837 break; | 863 break; |
| 838 default: | 864 default: |
| 839 UnimplementedInstruction(); | 865 UnimplementedInstruction(); |
| 840 } | 866 } |
| (...skipping 24 matching lines...) Expand all Loading... |
| 865 case 0x5e: | 891 case 0x5e: |
| 866 AppendToBuffer("vdivsd %s,%s,", NameOfXMMRegister(regop), | 892 AppendToBuffer("vdivsd %s,%s,", NameOfXMMRegister(regop), |
| 867 NameOfXMMRegister(vvvv)); | 893 NameOfXMMRegister(vvvv)); |
| 868 current += PrintRightXMMOperand(current); | 894 current += PrintRightXMMOperand(current); |
| 869 break; | 895 break; |
| 870 case 0x5f: | 896 case 0x5f: |
| 871 AppendToBuffer("vmaxsd %s,%s,", NameOfXMMRegister(regop), | 897 AppendToBuffer("vmaxsd %s,%s,", NameOfXMMRegister(regop), |
| 872 NameOfXMMRegister(vvvv)); | 898 NameOfXMMRegister(vvvv)); |
| 873 current += PrintRightXMMOperand(current); | 899 current += PrintRightXMMOperand(current); |
| 874 break; | 900 break; |
| 901 case 0x70: |
| 902 AppendToBuffer("vpshuflw %s,", NameOfXMMRegister(regop)); |
| 903 current += PrintRightXMMOperand(current); |
| 904 AppendToBuffer(",%d", *reinterpret_cast<int8_t*>(current)); |
| 905 current++; |
| 906 break; |
| 875 default: | 907 default: |
| 876 UnimplementedInstruction(); | 908 UnimplementedInstruction(); |
| 877 } | 909 } |
| 878 } else if (vex_f3() && vex_0f()) { | 910 } else if (vex_f3() && vex_0f()) { |
| 879 int mod, regop, rm, vvvv = vex_vreg(); | 911 int mod, regop, rm, vvvv = vex_vreg(); |
| 880 get_modrm(*current, &mod, ®op, &rm); | 912 get_modrm(*current, &mod, ®op, &rm); |
| 881 switch (opcode) { | 913 switch (opcode) { |
| 882 case 0x58: | 914 case 0x58: |
| 883 AppendToBuffer("vaddss %s,%s,", NameOfXMMRegister(regop), | 915 AppendToBuffer("vaddss %s,%s,", NameOfXMMRegister(regop), |
| 884 NameOfXMMRegister(vvvv)); | 916 NameOfXMMRegister(vvvv)); |
| (...skipping 257 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 1142 AppendToBuffer("vps%sd %s,%s", sf_str[regop / 2], | 1174 AppendToBuffer("vps%sd %s,%s", sf_str[regop / 2], |
| 1143 NameOfXMMRegister(vvvv), NameOfXMMRegister(rm)); | 1175 NameOfXMMRegister(vvvv), NameOfXMMRegister(rm)); |
| 1144 current++; | 1176 current++; |
| 1145 AppendToBuffer(",%u", *current++); | 1177 AppendToBuffer(",%u", *current++); |
| 1146 break; | 1178 break; |
| 1147 case 0x7E: | 1179 case 0x7E: |
| 1148 AppendToBuffer("vmovd "); | 1180 AppendToBuffer("vmovd "); |
| 1149 current += PrintRightOperand(current); | 1181 current += PrintRightOperand(current); |
| 1150 AppendToBuffer(",%s", NameOfXMMRegister(regop)); | 1182 AppendToBuffer(",%s", NameOfXMMRegister(regop)); |
| 1151 break; | 1183 break; |
| 1184 case 0xC4: |
| 1185 AppendToBuffer("vpinsrw %s,%s,", NameOfXMMRegister(regop), |
| 1186 NameOfXMMRegister(vvvv)); |
| 1187 current += PrintRightOperand(current); |
| 1188 AppendToBuffer(",%d", *reinterpret_cast<int8_t*>(current)); |
| 1189 current++; |
| 1190 break; |
| 1152 #define DECLARE_SSE_AVX_DIS_CASE(instruction, notUsed1, notUsed2, opcode) \ | 1191 #define DECLARE_SSE_AVX_DIS_CASE(instruction, notUsed1, notUsed2, opcode) \ |
| 1153 case 0x##opcode: { \ | 1192 case 0x##opcode: { \ |
| 1154 AppendToBuffer("v" #instruction " %s,%s,", NameOfXMMRegister(regop), \ | 1193 AppendToBuffer("v" #instruction " %s,%s,", NameOfXMMRegister(regop), \ |
| 1155 NameOfXMMRegister(vvvv)); \ | 1194 NameOfXMMRegister(vvvv)); \ |
| 1156 current += PrintRightXMMOperand(current); \ | 1195 current += PrintRightXMMOperand(current); \ |
| 1157 break; \ | 1196 break; \ |
| 1158 } | 1197 } |
| 1159 | 1198 |
| 1160 SSE2_INSTRUCTION_LIST(DECLARE_SSE_AVX_DIS_CASE) | 1199 SSE2_INSTRUCTION_LIST(DECLARE_SSE_AVX_DIS_CASE) |
| 1161 #undef DECLARE_SSE_AVX_DIS_CASE | 1200 #undef DECLARE_SSE_AVX_DIS_CASE |
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| 1839 data += 2; | 1878 data += 2; |
| 1840 } else if (*data == 0x0F) { | 1879 } else if (*data == 0x0F) { |
| 1841 data++; | 1880 data++; |
| 1842 if (*data == 0x38) { | 1881 if (*data == 0x38) { |
| 1843 data++; | 1882 data++; |
| 1844 byte op = *data; | 1883 byte op = *data; |
| 1845 data++; | 1884 data++; |
| 1846 int mod, regop, rm; | 1885 int mod, regop, rm; |
| 1847 get_modrm(*data, &mod, ®op, &rm); | 1886 get_modrm(*data, &mod, ®op, &rm); |
| 1848 switch (op) { | 1887 switch (op) { |
| 1888 case 0x00: |
| 1889 AppendToBuffer("pshufb %s,", NameOfXMMRegister(regop)); |
| 1890 data += PrintRightXMMOperand(data); |
| 1891 break; |
| 1849 case 0x17: | 1892 case 0x17: |
| 1850 AppendToBuffer("ptest %s,%s", NameOfXMMRegister(regop), | 1893 AppendToBuffer("ptest %s,%s", NameOfXMMRegister(regop), |
| 1851 NameOfXMMRegister(rm)); | 1894 NameOfXMMRegister(rm)); |
| 1852 data++; | 1895 data++; |
| 1853 break; | 1896 break; |
| 1854 #define SSE4_DIS_CASE(instruction, notUsed1, notUsed2, notUsed3, opcode) \ | 1897 #define SSE4_DIS_CASE(instruction, notUsed1, notUsed2, notUsed3, opcode) \ |
| 1855 case 0x##opcode: { \ | 1898 case 0x##opcode: { \ |
| 1856 AppendToBuffer(#instruction " %s,", NameOfXMMRegister(regop)); \ | 1899 AppendToBuffer(#instruction " %s,", NameOfXMMRegister(regop)); \ |
| 1857 data += PrintRightXMMOperand(data); \ | 1900 data += PrintRightXMMOperand(data); \ |
| 1858 break; \ | 1901 break; \ |
| (...skipping 17 matching lines...) Expand all Loading... |
| 1876 } else if (*data == 0x0B) { | 1919 } else if (*data == 0x0B) { |
| 1877 data++; | 1920 data++; |
| 1878 int mod, regop, rm; | 1921 int mod, regop, rm; |
| 1879 get_modrm(*data, &mod, ®op, &rm); | 1922 get_modrm(*data, &mod, ®op, &rm); |
| 1880 int8_t imm8 = static_cast<int8_t>(data[1]); | 1923 int8_t imm8 = static_cast<int8_t>(data[1]); |
| 1881 AppendToBuffer("roundsd %s,%s,%d", | 1924 AppendToBuffer("roundsd %s,%s,%d", |
| 1882 NameOfXMMRegister(regop), | 1925 NameOfXMMRegister(regop), |
| 1883 NameOfXMMRegister(rm), | 1926 NameOfXMMRegister(rm), |
| 1884 static_cast<int>(imm8)); | 1927 static_cast<int>(imm8)); |
| 1885 data += 2; | 1928 data += 2; |
| 1929 } else if (*data == 0x14) { |
| 1930 data++; |
| 1931 int mod, regop, rm; |
| 1932 get_modrm(*data, &mod, ®op, &rm); |
| 1933 AppendToBuffer("pextrb "); |
| 1934 data += PrintRightOperand(data); |
| 1935 AppendToBuffer(",%s,%d", NameOfXMMRegister(regop), |
| 1936 *reinterpret_cast<int8_t*>(data)); |
| 1937 data++; |
| 1938 } else if (*data == 0x15) { |
| 1939 data++; |
| 1940 int mod, regop, rm; |
| 1941 get_modrm(*data, &mod, ®op, &rm); |
| 1942 AppendToBuffer("pextrw "); |
| 1943 data += PrintRightOperand(data); |
| 1944 AppendToBuffer(",%s,%d", NameOfXMMRegister(regop), |
| 1945 *reinterpret_cast<int8_t*>(data)); |
| 1946 data++; |
| 1886 } else if (*data == 0x16) { | 1947 } else if (*data == 0x16) { |
| 1887 data++; | 1948 data++; |
| 1888 int mod, regop, rm; | 1949 int mod, regop, rm; |
| 1889 get_modrm(*data, &mod, ®op, &rm); | 1950 get_modrm(*data, &mod, ®op, &rm); |
| 1890 AppendToBuffer("pextrd "); | 1951 AppendToBuffer("pextrd "); |
| 1891 data += PrintRightOperand(data); | 1952 data += PrintRightOperand(data); |
| 1892 AppendToBuffer(",%s,%d", NameOfXMMRegister(regop), | 1953 AppendToBuffer(",%s,%d", NameOfXMMRegister(regop), |
| 1893 *reinterpret_cast<int8_t*>(data)); | 1954 *reinterpret_cast<int8_t*>(data)); |
| 1894 data++; | 1955 data++; |
| 1895 } else if (*data == 0x17) { | 1956 } else if (*data == 0x17) { |
| 1896 data++; | 1957 data++; |
| 1897 int mod, regop, rm; | 1958 int mod, regop, rm; |
| 1898 get_modrm(*data, &mod, ®op, &rm); | 1959 get_modrm(*data, &mod, ®op, &rm); |
| 1899 int8_t imm8 = static_cast<int8_t>(data[1]); | 1960 int8_t imm8 = static_cast<int8_t>(data[1]); |
| 1900 AppendToBuffer("extractps %s,%s,%d", | 1961 AppendToBuffer("extractps %s,%s,%d", |
| 1901 NameOfCPURegister(rm), | 1962 NameOfCPURegister(rm), |
| 1902 NameOfXMMRegister(regop), | 1963 NameOfXMMRegister(regop), |
| 1903 static_cast<int>(imm8)); | 1964 static_cast<int>(imm8)); |
| 1904 data += 2; | 1965 data += 2; |
| 1966 } else if (*data == 0x20) { |
| 1967 data++; |
| 1968 int mod, regop, rm; |
| 1969 get_modrm(*data, &mod, ®op, &rm); |
| 1970 AppendToBuffer("pinsrb %s,", NameOfXMMRegister(regop)); |
| 1971 data += PrintRightOperand(data); |
| 1972 AppendToBuffer(",%d", *reinterpret_cast<int8_t*>(data)); |
| 1973 data++; |
| 1905 } else if (*data == 0x22) { | 1974 } else if (*data == 0x22) { |
| 1906 data++; | 1975 data++; |
| 1907 int mod, regop, rm; | 1976 int mod, regop, rm; |
| 1908 get_modrm(*data, &mod, ®op, &rm); | 1977 get_modrm(*data, &mod, ®op, &rm); |
| 1909 AppendToBuffer("pinsrd %s,", NameOfXMMRegister(regop)); | 1978 AppendToBuffer("pinsrd %s,", NameOfXMMRegister(regop)); |
| 1910 data += PrintRightOperand(data); | 1979 data += PrintRightOperand(data); |
| 1911 AppendToBuffer(",%d", *reinterpret_cast<int8_t*>(data)); | 1980 AppendToBuffer(",%d", *reinterpret_cast<int8_t*>(data)); |
| 1912 data++; | 1981 data++; |
| 1913 } else { | 1982 } else { |
| 1914 UnimplementedInstruction(); | 1983 UnimplementedInstruction(); |
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| 2151 int mod, regop, rm; | 2220 int mod, regop, rm; |
| 2152 get_modrm(*data, &mod, ®op, &rm); | 2221 get_modrm(*data, &mod, ®op, &rm); |
| 2153 AppendToBuffer("movsd %s,", NameOfXMMRegister(regop)); | 2222 AppendToBuffer("movsd %s,", NameOfXMMRegister(regop)); |
| 2154 data += PrintRightXMMOperand(data); | 2223 data += PrintRightXMMOperand(data); |
| 2155 } else if (b2 == 0x5A) { | 2224 } else if (b2 == 0x5A) { |
| 2156 data += 3; | 2225 data += 3; |
| 2157 int mod, regop, rm; | 2226 int mod, regop, rm; |
| 2158 get_modrm(*data, &mod, ®op, &rm); | 2227 get_modrm(*data, &mod, ®op, &rm); |
| 2159 AppendToBuffer("cvtsd2ss %s,", NameOfXMMRegister(regop)); | 2228 AppendToBuffer("cvtsd2ss %s,", NameOfXMMRegister(regop)); |
| 2160 data += PrintRightXMMOperand(data); | 2229 data += PrintRightXMMOperand(data); |
| 2230 } else if (b2 == 0x70) { |
| 2231 data += 3; |
| 2232 int mod, regop, rm; |
| 2233 get_modrm(*data, &mod, ®op, &rm); |
| 2234 AppendToBuffer("pshuflw %s,", NameOfXMMRegister(regop)); |
| 2235 data += PrintRightXMMOperand(data); |
| 2236 AppendToBuffer(",%d", *reinterpret_cast<int8_t*>(data)); |
| 2237 data++; |
| 2161 } else { | 2238 } else { |
| 2162 const char* mnem = "?"; | 2239 const char* mnem = "?"; |
| 2163 switch (b2) { | 2240 switch (b2) { |
| 2164 case 0x2A: | 2241 case 0x2A: |
| 2165 mnem = "cvtsi2sd"; | 2242 mnem = "cvtsi2sd"; |
| 2166 break; | 2243 break; |
| 2167 case 0x2C: | 2244 case 0x2C: |
| 2168 mnem = "cvttsd2si"; | 2245 mnem = "cvttsd2si"; |
| 2169 break; | 2246 break; |
| 2170 case 0x2D: | 2247 case 0x2D: |
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| 2479 fprintf(f, " "); | 2556 fprintf(f, " "); |
| 2480 } | 2557 } |
| 2481 fprintf(f, " %s\n", buffer.start()); | 2558 fprintf(f, " %s\n", buffer.start()); |
| 2482 } | 2559 } |
| 2483 } | 2560 } |
| 2484 | 2561 |
| 2485 | 2562 |
| 2486 } // namespace disasm | 2563 } // namespace disasm |
| 2487 | 2564 |
| 2488 #endif // V8_TARGET_ARCH_IA32 | 2565 #endif // V8_TARGET_ARCH_IA32 |
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