Inline instance object hash code into object header on 64 bit.

runtime/vm/assembler_arm64.h

Index: runtime/vm/assembler_arm64.h
diff --git a/runtime/vm/assembler_arm64.h b/runtime/vm/assembler_arm64.h
index cde10dac4e529ea577cac9b1a6445a1bed009b64..9f1ac2b178c25cff5cd915ee217b08311053a93b 100644
--- a/runtime/vm/assembler_arm64.h
+++ b/runtime/vm/assembler_arm64.h
@@ -742,16 +742,19 @@ class Assembler : public ValueObject {
     EmitLoadStoreRegPair(STP, rt, rt2, a, sz);
   }
 
-  void ldxr(Register rt, Register rn) {
+  void ldxr(Register rt, Register rn, OperandSize size = kDoubleWord) {

[rmacnak, 2017/06/19 18:12:21]

Please copy the ldxr/stxr tests in assembler_arm64_test.cc to try both access
sizes.

[erikcorry, 2017/06/21 12:12:12]

Done.

     // rt = value
     // rn = address
-    EmitLoadStoreExclusive(LDXR, R31, rn, rt, kDoubleWord);
+    EmitLoadStoreExclusive(LDXR, R31, rn, rt, size);
   }
-  void stxr(Register rs, Register rt, Register rn) {
+  void stxr(Register rs,
+            Register rt,
+            Register rn,
+            OperandSize size = kDoubleWord) {
     // rs = status (1 = failure, 0 = success)
     // rt = value
     // rn = address
-    EmitLoadStoreExclusive(STXR, rs, rn, rt, kDoubleWord);
+    EmitLoadStoreExclusive(STXR, rs, rn, rt, size);
   }
   void clrex() {
     const int32_t encoding = static_cast<int32_t>(CLREX);
@@ -1689,8 +1692,8 @@ class Assembler : public ValueObject {
                               Register rn,
                               Register rt,
                               OperandSize sz = kDoubleWord) {
-    ASSERT(sz == kDoubleWord);
-    const int32_t size = B31 | B30;
+    ASSERT(sz == kDoubleWord || sz == kWord);
+    const int32_t size = B31 | (sz == kDoubleWord ? B30 : 0);
 
     ASSERT((rs != kNoRegister) && (rs != ZR));
     ASSERT((rn != kNoRegister) && (rn != ZR));