[WASM SIMD] Remove opcodes that are slow on some platforms.

src/compiler/mips64/code-generator-mips64.cc

Index: src/compiler/mips64/code-generator-mips64.cc
diff --git a/src/compiler/mips64/code-generator-mips64.cc b/src/compiler/mips64/code-generator-mips64.cc
index 8359d6fb20779c7554929fc4785dbf714de48bf8..802724b29603b4f1ce44bc3f6a1f5f3ba770cf7d 100644
--- a/src/compiler/mips64/code-generator-mips64.cc
+++ b/src/compiler/mips64/code-generator-mips64.cc
@@ -2112,34 +2112,11 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
       __ frcp_w(i.OutputSimd128Register(), i.InputSimd128Register(0));
       break;
     }
-    case kMips64F32x4RecipRefine: {
-      CpuFeatureScope msa_scope(masm(), MIPS_SIMD);
-      Simd128Register dst = i.OutputSimd128Register();
-      // Emulate with 2.0f - a * b
-      __ ldi_w(kSimd128ScratchReg, 2);
-      __ ffint_u_w(kSimd128ScratchReg, kSimd128ScratchReg);
-      __ fmul_w(dst, i.InputSimd128Register(0), i.InputSimd128Register(1));
-      __ fsub_w(dst, kSimd128ScratchReg, dst);
-      break;
-    }
     case kMips64F32x4RecipSqrtApprox: {
       CpuFeatureScope msa_scope(masm(), MIPS_SIMD);
       __ frsqrt_w(i.OutputSimd128Register(), i.InputSimd128Register(0));
       break;
     }
-    case kMips64F32x4RecipSqrtRefine: {
-      CpuFeatureScope msa_scope(masm(), MIPS_SIMD);
-      Simd128Register dst = i.OutputSimd128Register();
-      // Emulate with (3.0f - a * b) * 0.5f;
-      __ ldi_w(kSimd128ScratchReg, 3);
-      __ ffint_u_w(kSimd128ScratchReg, kSimd128ScratchReg);
-      __ fmul_w(dst, i.InputSimd128Register(0), i.InputSimd128Register(1));
-      __ fsub_w(dst, kSimd128ScratchReg, dst);
-      __ ldi_w(kSimd128ScratchReg, 0x3f);
-      __ slli_w(kSimd128ScratchReg, kSimd128ScratchReg, 24);
-      __ fmul_w(dst, dst, kSimd128ScratchReg);
-      break;
-    }
     case kMips64F32x4Add: {
       CpuFeatureScope msa_scope(masm(), MIPS_SIMD);
       __ fadd_w(i.OutputSimd128Register(), i.InputSimd128Register(0),