[WASM SIMD] Remove opcodes that are slow on some platforms.

src/compiler/mips64/code-generator-mips64.cc

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "src/compiler/code-generator.h"
 #include "src/compilation-info.h"
 #include "src/compiler/code-generator-impl.h"
 #include "src/compiler/gap-resolver.h"
 #include "src/compiler/node-matchers.h"
 #include "src/compiler/osr.h"
@@ skipping 2094 matching lines @@
     case kMips64F32x4Neg: {
       CpuFeatureScope msa_scope(masm(), MIPS_SIMD);
       __ bnegi_w(i.OutputSimd128Register(), i.InputSimd128Register(0), 31);
       break;
     }
     case kMips64F32x4RecipApprox: {
       CpuFeatureScope msa_scope(masm(), MIPS_SIMD);
       __ frcp_w(i.OutputSimd128Register(), i.InputSimd128Register(0));
       break;
     }
-    case kMips64F32x4RecipRefine: {
-      CpuFeatureScope msa_scope(masm(), MIPS_SIMD);
-      Simd128Register dst = i.OutputSimd128Register();
-      // Emulate with 2.0f - a * b
-      __ ldi_w(kSimd128ScratchReg, 2);
-      __ ffint_u_w(kSimd128ScratchReg, kSimd128ScratchReg);
-      __ fmul_w(dst, i.InputSimd128Register(0), i.InputSimd128Register(1));
-      __ fsub_w(dst, kSimd128ScratchReg, dst);
-      break;
-    }
     case kMips64F32x4RecipSqrtApprox: {
       CpuFeatureScope msa_scope(masm(), MIPS_SIMD);
       __ frsqrt_w(i.OutputSimd128Register(), i.InputSimd128Register(0));
       break;
     }
-    case kMips64F32x4RecipSqrtRefine: {
-      CpuFeatureScope msa_scope(masm(), MIPS_SIMD);
-      Simd128Register dst = i.OutputSimd128Register();
-      // Emulate with (3.0f - a * b) * 0.5f;
-      __ ldi_w(kSimd128ScratchReg, 3);
-      __ ffint_u_w(kSimd128ScratchReg, kSimd128ScratchReg);
-      __ fmul_w(dst, i.InputSimd128Register(0), i.InputSimd128Register(1));
-      __ fsub_w(dst, kSimd128ScratchReg, dst);
-      __ ldi_w(kSimd128ScratchReg, 0x3f);
-      __ slli_w(kSimd128ScratchReg, kSimd128ScratchReg, 24);
-      __ fmul_w(dst, dst, kSimd128ScratchReg);
-      break;
-    }
     case kMips64F32x4Add: {
       CpuFeatureScope msa_scope(masm(), MIPS_SIMD);
       __ fadd_w(i.OutputSimd128Register(), i.InputSimd128Register(0),
                 i.InputSimd128Register(1));
       break;
     }
     case kMips64F32x4Sub: {
       CpuFeatureScope msa_scope(masm(), MIPS_SIMD);
       __ fsub_w(i.OutputSimd128Register(), i.InputSimd128Register(0),
                 i.InputSimd128Register(1));
@@ skipping 810 matching lines @@
       padding_size -= v8::internal::Assembler::kInstrSize;
     }
   }
 }
 
 #undef __
 
 }  // namespace compiler
 }  // namespace internal
 }  // namespace v8