Chromium Code Reviews| Index: src/compiler/arm/code-generator-arm.cc |
| diff --git a/src/compiler/arm/code-generator-arm.cc b/src/compiler/arm/code-generator-arm.cc |
| index bd2a942bcc249df170989cde9bdde65cfc771ae8..850d0129ae365e2f2dc849ffefd79b12c13e8c2f 100644 |
| --- a/src/compiler/arm/code-generator-arm.cc |
| +++ b/src/compiler/arm/code-generator-arm.cc |
| @@ -1668,6 +1668,16 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction( |
| __ vcvt_s32_f32(i.OutputSimd128Register(), i.InputSimd128Register(0)); |
| break; |
| } |
| + case kArmI32x4SConvertI16x8Low: { |
| + __ vmovl(NeonS16, i.OutputSimd128Register(), |
| + i.InputSimd128Register(0).low()); |
| + break; |
| + } |
| + case kArmI32x4SConvertI16x8High: { |
| + __ vmovl(NeonS16, i.OutputSimd128Register(), |
| + i.InputSimd128Register(0).high()); |
| + break; |
| + } |
| case kArmI32x4Neg: { |
| __ vneg(Neon32, i.OutputSimd128Register(), i.InputSimd128Register(0)); |
| break; |
| @@ -1733,6 +1743,16 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction( |
| __ vcvt_u32_f32(i.OutputSimd128Register(), i.InputSimd128Register(0)); |
| break; |
| } |
| + case kArmI32x4UConvertI16x8Low: { |
| + __ vmovl(NeonU16, i.OutputSimd128Register(), |
| + i.InputSimd128Register(0).low()); |
| + break; |
| + } |
| + case kArmI32x4UConvertI16x8High: { |
| + __ vmovl(NeonU16, i.OutputSimd128Register(), |
| + i.InputSimd128Register(0).high()); |
| + break; |
| + } |
| case kArmI32x4ShrU: { |
| __ vshr(NeonU32, i.OutputSimd128Register(), i.InputSimd128Register(0), |
| i.InputInt5(1)); |
| @@ -1772,6 +1792,16 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction( |
| i.InputRegister(2), NeonS16, i.InputInt8(1)); |
| break; |
| } |
| + case kArmI16x8SConvertI8x16Low: { |
| + __ vmovl(NeonS8, i.OutputSimd128Register(), |
| + i.InputSimd128Register(0).low()); |
| + break; |
| + } |
| + case kArmI16x8SConvertI8x16High: { |
| + __ vmovl(NeonS8, i.OutputSimd128Register(), |
| + i.InputSimd128Register(0).high()); |
| + break; |
| + } |
| case kArmI16x8Neg: { |
| __ vneg(Neon16, i.OutputSimd128Register(), i.InputSimd128Register(0)); |
| break; |
| @@ -1786,6 +1816,21 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction( |
| i.InputInt4(1)); |
| break; |
| } |
| + case kArmI16x8SConvertI32x4: { |
| + Simd128Register dst = i.OutputSimd128Register(), |
| + src1 = i.InputSimd128Register(0), |
|
martyn.capewell
2017/04/06 14:37:43
Name these src0 and src1 to match the input index.
bbudge
2017/04/06 18:19:31
Done.
|
| + src2 = i.InputSimd128Register(1); |
| + // Take care not to overwrite a source register before it's used. |
| + if (dst.is(src1) || dst.is(src2)) { |
|
martyn.capewell
2017/04/06 14:37:43
By changing the operation order, I think you can a
bbudge
2017/04/06 18:19:31
Nice. Done.
|
| + __ vqmovn(NeonS16, kScratchDoubleReg, i.InputSimd128Register(0)); |
| + __ vqmovn(NeonS16, dst.high(), i.InputSimd128Register(1)); |
| + __ vmov(dst.low(), kScratchDoubleReg); |
| + } else { |
| + __ vqmovn(NeonS16, dst.low(), i.InputSimd128Register(0)); |
| + __ vqmovn(NeonS16, dst.high(), i.InputSimd128Register(1)); |
| + } |
| + break; |
| + } |
| case kArmI16x8Add: { |
| __ vadd(Neon16, i.OutputSimd128Register(), i.InputSimd128Register(0), |
| i.InputSimd128Register(1)); |
| @@ -1843,11 +1888,36 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction( |
| i.InputSimd128Register(0)); |
| break; |
| } |
| + case kArmI16x8UConvertI8x16Low: { |
| + __ vmovl(NeonU8, i.OutputSimd128Register(), |
| + i.InputSimd128Register(0).low()); |
| + break; |
| + } |
| + case kArmI16x8UConvertI8x16High: { |
| + __ vmovl(NeonU8, i.OutputSimd128Register(), |
| + i.InputSimd128Register(0).high()); |
| + break; |
| + } |
| case kArmI16x8ShrU: { |
| __ vshr(NeonU16, i.OutputSimd128Register(), i.InputSimd128Register(0), |
| i.InputInt4(1)); |
| break; |
| } |
| + case kArmI16x8UConvertI32x4: { |
| + Simd128Register dst = i.OutputSimd128Register(), |
| + src1 = i.InputSimd128Register(0), |
| + src2 = i.InputSimd128Register(1); |
| + // Take care not to overwrite a source register before it's used. |
| + if (dst.is(src1) || dst.is(src2)) { |
| + __ vqmovn(NeonU16, kScratchDoubleReg, i.InputSimd128Register(0)); |
| + __ vqmovn(NeonU16, dst.high(), i.InputSimd128Register(1)); |
| + __ vmov(dst.low(), kScratchDoubleReg); |
| + } else { |
| + __ vqmovn(NeonU16, dst.low(), i.InputSimd128Register(0)); |
| + __ vqmovn(NeonU16, dst.high(), i.InputSimd128Register(1)); |
| + } |
| + break; |
| + } |
| case kArmI16x8AddSaturateU: { |
| __ vqadd(NeonU16, i.OutputSimd128Register(), i.InputSimd128Register(0), |
| i.InputSimd128Register(1)); |
| @@ -1906,6 +1976,21 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction( |
| i.InputInt3(1)); |
| break; |
| } |
| + case kArmI8x16SConvertI16x8: { |
| + Simd128Register dst = i.OutputSimd128Register(), |
| + src1 = i.InputSimd128Register(0), |
| + src2 = i.InputSimd128Register(1); |
| + // Take care not to overwrite a source register before it's used. |
| + if (dst.is(src1) || dst.is(src2)) { |
| + __ vqmovn(NeonS8, kScratchDoubleReg, i.InputSimd128Register(0)); |
| + __ vqmovn(NeonS8, dst.high(), i.InputSimd128Register(1)); |
| + __ vmov(dst.low(), kScratchDoubleReg); |
| + } else { |
| + __ vqmovn(NeonS8, dst.low(), i.InputSimd128Register(0)); |
| + __ vqmovn(NeonS8, dst.high(), i.InputSimd128Register(1)); |
| + } |
| + break; |
| + } |
| case kArmI8x16Add: { |
| __ vadd(Neon8, i.OutputSimd128Register(), i.InputSimd128Register(0), |
| i.InputSimd128Register(1)); |
| @@ -1967,6 +2052,21 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction( |
| i.InputInt3(1)); |
| break; |
| } |
| + case kArmI8x16UConvertI16x8: { |
| + Simd128Register dst = i.OutputSimd128Register(), |
| + src1 = i.InputSimd128Register(0), |
| + src2 = i.InputSimd128Register(1); |
| + // Take care not to overwrite a source register before it's used. |
| + if (dst.is(src1) || dst.is(src2)) { |
| + __ vqmovn(NeonU8, kScratchDoubleReg, i.InputSimd128Register(0)); |
| + __ vqmovn(NeonU8, dst.high(), i.InputSimd128Register(1)); |
| + __ vmov(dst.low(), kScratchDoubleReg); |
| + } else { |
| + __ vqmovn(NeonU8, dst.low(), i.InputSimd128Register(0)); |
| + __ vqmovn(NeonU8, dst.high(), i.InputSimd128Register(1)); |
| + } |
| + break; |
| + } |
| case kArmI8x16AddSaturateU: { |
| __ vqadd(NeonU8, i.OutputSimd128Register(), i.InputSimd128Register(0), |
| i.InputSimd128Register(1)); |