[WASM SIMD] Implement packing and unpacking integer conversions.

src/compiler/arm/code-generator-arm.cc

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "src/compiler/code-generator.h"
 
 #include "src/arm/macro-assembler-arm.h"
 #include "src/assembler-inl.h"
 #include "src/compilation-info.h"
 #include "src/compiler/code-generator-impl.h"
@@ skipping 1650 matching lines @@
     }
     case kArmI32x4ReplaceLane: {
       __ ReplaceLane(i.OutputSimd128Register(), i.InputSimd128Register(0),
                      i.InputRegister(2), NeonS32, i.InputInt8(1));
       break;
     }
     case kArmI32x4SConvertF32x4: {
       __ vcvt_s32_f32(i.OutputSimd128Register(), i.InputSimd128Register(0));
       break;
     }
+    case kArmI32x4SConvertI16x8Low: {
+      __ vmovl(NeonS16, i.OutputSimd128Register(),
+               i.InputSimd128Register(0).low());
+      break;
+    }
+    case kArmI32x4SConvertI16x8High: {
+      __ vmovl(NeonS16, i.OutputSimd128Register(),
+               i.InputSimd128Register(0).high());
+      break;
+    }
     case kArmI32x4Neg: {
       __ vneg(Neon32, i.OutputSimd128Register(), i.InputSimd128Register(0));
       break;
     }
     case kArmI32x4Shl: {
       __ vshl(NeonS32, i.OutputSimd128Register(), i.InputSimd128Register(0),
               i.InputInt5(1));
       break;
     }
     case kArmI32x4ShrS: {
@@ skipping 45 matching lines @@
     }
     case kArmI32x4LeS: {
       __ vcge(NeonS32, i.OutputSimd128Register(), i.InputSimd128Register(1),
               i.InputSimd128Register(0));
       break;
     }
     case kArmI32x4UConvertF32x4: {
       __ vcvt_u32_f32(i.OutputSimd128Register(), i.InputSimd128Register(0));
       break;
     }
+    case kArmI32x4UConvertI16x8Low: {
+      __ vmovl(NeonU16, i.OutputSimd128Register(),
+               i.InputSimd128Register(0).low());
+      break;
+    }
+    case kArmI32x4UConvertI16x8High: {
+      __ vmovl(NeonU16, i.OutputSimd128Register(),
+               i.InputSimd128Register(0).high());
+      break;
+    }
     case kArmI32x4ShrU: {
       __ vshr(NeonU32, i.OutputSimd128Register(), i.InputSimd128Register(0),
               i.InputInt5(1));
       break;
     }
     case kArmI32x4MinU: {
       __ vmin(NeonU32, i.OutputSimd128Register(), i.InputSimd128Register(0),
               i.InputSimd128Register(1));
       break;
     }
@@ skipping 19 matching lines @@
     case kArmI16x8ExtractLane: {
       __ ExtractLane(i.OutputRegister(), i.InputSimd128Register(0), NeonS16,
                      i.InputInt8(1));
       break;
     }
     case kArmI16x8ReplaceLane: {
       __ ReplaceLane(i.OutputSimd128Register(), i.InputSimd128Register(0),
                      i.InputRegister(2), NeonS16, i.InputInt8(1));
       break;
     }
+    case kArmI16x8SConvertI8x16Low: {
+      __ vmovl(NeonS8, i.OutputSimd128Register(),
+               i.InputSimd128Register(0).low());
+      break;
+    }
+    case kArmI16x8SConvertI8x16High: {
+      __ vmovl(NeonS8, i.OutputSimd128Register(),
+               i.InputSimd128Register(0).high());
+      break;
+    }
     case kArmI16x8Neg: {
       __ vneg(Neon16, i.OutputSimd128Register(), i.InputSimd128Register(0));
       break;
     }
     case kArmI16x8Shl: {
       __ vshl(NeonS16, i.OutputSimd128Register(), i.InputSimd128Register(0),
               i.InputInt4(1));
       break;
     }
     case kArmI16x8ShrS: {
       __ vshr(NeonS16, i.OutputSimd128Register(), i.InputSimd128Register(0),
               i.InputInt4(1));
       break;
     }
+    case kArmI16x8SConvertI32x4: {
+      Simd128Register dst = i.OutputSimd128Register(),
+                      src1 = i.InputSimd128Register(0),

[martyn.capewell, 2017/04/06 14:37:43]

Name these src0 and src1 to match the input index.

[bbudge, 2017/04/06 18:19:31]

Done.

+                      src2 = i.InputSimd128Register(1);
+      // Take care not to overwrite a source register before it's used.
+      if (dst.is(src1) || dst.is(src2)) {

[martyn.capewell, 2017/04/06 14:37:43]

By changing the operation order, I think you can avoid the scratch register and
extra move. Roughly, untested:

if (dst.is(src1) && dst.is(src2)) {
  vqmovn(dst.low(), src1);
  vmov(dst.high(), dst.low());
} else if (dst.is(src1)) {
  DCHECK(!dst.is(src2));
  vqmovn(dst.low(), src1);
  vqmovn(dst.high(), src2);
} else {
  DCHECK(!dst.is(src1));
  // dst may alias src2, so handle src2 first.
  vqmovn(dst.high(), src2);
  vqmovn(dst.low(), src1);
}

[bbudge, 2017/04/06 18:19:31]

Nice. Done.

+        __ vqmovn(NeonS16, kScratchDoubleReg, i.InputSimd128Register(0));
+        __ vqmovn(NeonS16, dst.high(), i.InputSimd128Register(1));
+        __ vmov(dst.low(), kScratchDoubleReg);
+      } else {
+        __ vqmovn(NeonS16, dst.low(), i.InputSimd128Register(0));
+        __ vqmovn(NeonS16, dst.high(), i.InputSimd128Register(1));
+      }
+      break;
+    }
     case kArmI16x8Add: {
       __ vadd(Neon16, i.OutputSimd128Register(), i.InputSimd128Register(0),
               i.InputSimd128Register(1));
       break;
     }
     case kArmI16x8AddSaturateS: {
       __ vqadd(NeonS16, i.OutputSimd128Register(), i.InputSimd128Register(0),
                i.InputSimd128Register(1));
       break;
     }
@@ skipping 37 matching lines @@
     case kArmI16x8LtS: {
       __ vcgt(NeonS16, i.OutputSimd128Register(), i.InputSimd128Register(1),
               i.InputSimd128Register(0));
       break;
     }
     case kArmI16x8LeS: {
       __ vcge(NeonS16, i.OutputSimd128Register(), i.InputSimd128Register(1),
               i.InputSimd128Register(0));
       break;
     }
+    case kArmI16x8UConvertI8x16Low: {
+      __ vmovl(NeonU8, i.OutputSimd128Register(),
+               i.InputSimd128Register(0).low());
+      break;
+    }
+    case kArmI16x8UConvertI8x16High: {
+      __ vmovl(NeonU8, i.OutputSimd128Register(),
+               i.InputSimd128Register(0).high());
+      break;
+    }
     case kArmI16x8ShrU: {
       __ vshr(NeonU16, i.OutputSimd128Register(), i.InputSimd128Register(0),
               i.InputInt4(1));
       break;
     }
+    case kArmI16x8UConvertI32x4: {
+      Simd128Register dst = i.OutputSimd128Register(),
+                      src1 = i.InputSimd128Register(0),
+                      src2 = i.InputSimd128Register(1);
+      // Take care not to overwrite a source register before it's used.
+      if (dst.is(src1) || dst.is(src2)) {
+        __ vqmovn(NeonU16, kScratchDoubleReg, i.InputSimd128Register(0));
+        __ vqmovn(NeonU16, dst.high(), i.InputSimd128Register(1));
+        __ vmov(dst.low(), kScratchDoubleReg);
+      } else {
+        __ vqmovn(NeonU16, dst.low(), i.InputSimd128Register(0));
+        __ vqmovn(NeonU16, dst.high(), i.InputSimd128Register(1));
+      }
+      break;
+    }
     case kArmI16x8AddSaturateU: {
       __ vqadd(NeonU16, i.OutputSimd128Register(), i.InputSimd128Register(0),
                i.InputSimd128Register(1));
       break;
     }
     case kArmI16x8SubSaturateU: {
       __ vqsub(NeonU16, i.OutputSimd128Register(), i.InputSimd128Register(0),
                i.InputSimd128Register(1));
       break;
     }
@@ skipping 38 matching lines @@
     case kArmI8x16Shl: {
       __ vshl(NeonS8, i.OutputSimd128Register(), i.InputSimd128Register(0),
               i.InputInt3(1));
       break;
     }
     case kArmI8x16ShrS: {
       __ vshr(NeonS8, i.OutputSimd128Register(), i.InputSimd128Register(0),
               i.InputInt3(1));
       break;
     }
+    case kArmI8x16SConvertI16x8: {
+      Simd128Register dst = i.OutputSimd128Register(),
+                      src1 = i.InputSimd128Register(0),
+                      src2 = i.InputSimd128Register(1);
+      // Take care not to overwrite a source register before it's used.
+      if (dst.is(src1) || dst.is(src2)) {
+        __ vqmovn(NeonS8, kScratchDoubleReg, i.InputSimd128Register(0));
+        __ vqmovn(NeonS8, dst.high(), i.InputSimd128Register(1));
+        __ vmov(dst.low(), kScratchDoubleReg);
+      } else {
+        __ vqmovn(NeonS8, dst.low(), i.InputSimd128Register(0));
+        __ vqmovn(NeonS8, dst.high(), i.InputSimd128Register(1));
+      }
+      break;
+    }
     case kArmI8x16Add: {
       __ vadd(Neon8, i.OutputSimd128Register(), i.InputSimd128Register(0),
               i.InputSimd128Register(1));
       break;
     }
     case kArmI8x16AddSaturateS: {
       __ vqadd(NeonS8, i.OutputSimd128Register(), i.InputSimd128Register(0),
                i.InputSimd128Register(1));
       break;
     }
@@ skipping 41 matching lines @@
     case kArmI8x16LeS: {
       __ vcge(NeonS8, i.OutputSimd128Register(), i.InputSimd128Register(1),
               i.InputSimd128Register(0));
       break;
     }
     case kArmI8x16ShrU: {
       __ vshr(NeonU8, i.OutputSimd128Register(), i.InputSimd128Register(0),
               i.InputInt3(1));
       break;
     }
+    case kArmI8x16UConvertI16x8: {
+      Simd128Register dst = i.OutputSimd128Register(),
+                      src1 = i.InputSimd128Register(0),
+                      src2 = i.InputSimd128Register(1);
+      // Take care not to overwrite a source register before it's used.
+      if (dst.is(src1) || dst.is(src2)) {
+        __ vqmovn(NeonU8, kScratchDoubleReg, i.InputSimd128Register(0));
+        __ vqmovn(NeonU8, dst.high(), i.InputSimd128Register(1));
+        __ vmov(dst.low(), kScratchDoubleReg);
+      } else {
+        __ vqmovn(NeonU8, dst.low(), i.InputSimd128Register(0));
+        __ vqmovn(NeonU8, dst.high(), i.InputSimd128Register(1));
+      }
+      break;
+    }
     case kArmI8x16AddSaturateU: {
       __ vqadd(NeonU8, i.OutputSimd128Register(), i.InputSimd128Register(0),
                i.InputSimd128Register(1));
       break;
     }
     case kArmI8x16SubSaturateU: {
       __ vqsub(NeonU8, i.OutputSimd128Register(), i.InputSimd128Register(0),
                i.InputSimd128Register(1));
       break;
     }
@@ skipping 851 matching lines @@
       padding_size -= v8::internal::Assembler::kInstrSize;
     }
   }
 }
 
 #undef __
 
 }  // namespace compiler
 }  // namespace internal
 }  // namespace v8