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Unified Diff: src/compiler/mips64/instruction-codes-mips64.h

Issue 2780713003: MIPS[64]: Support for some SIMD operations (3) (Closed)
Patch Set: rebased Created 3 years, 9 months ago
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« src/compiler/instruction-selector.cc ('K') | « src/compiler/mips64/code-generator-mips64.cc ('k') | src/compiler/mips64/instruction-selector-mips64.cc » ('j') | no next file with comments »
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Index: src/compiler/mips64/instruction-codes-mips64.h
diff --git a/src/compiler/mips64/instruction-codes-mips64.h b/src/compiler/mips64/instruction-codes-mips64.h
index 50f9a61fa5c791c1600ccaba85828c781b108fb2..3978eb3c7d8dc274de6d57f89a0981eb2c185578 100644
--- a/src/compiler/mips64/instruction-codes-mips64.h
+++ b/src/compiler/mips64/instruction-codes-mips64.h
@@ -172,7 +172,18 @@ namespace compiler {
V(Mips64I32x4ExtractLane) \
V(Mips64I32x4ReplaceLane) \
V(Mips64I32x4Add) \
- V(Mips64I32x4Sub)
+ V(Mips64I32x4Sub) \
+ V(Mips64I32x4Mul) \
+ V(Mips64I32x4MaxS) \
+ V(Mips64I32x4MinS) \
+ V(Mips64I32x4Eq) \
+ V(Mips64I32x4Ne) \
+ V(Mips64I32x4Shl) \
+ V(Mips64I32x4ShrS) \
+ V(Mips64I32x4ShrU) \
+ V(Mips64I32x4MaxU) \
+ V(Mips64I32x4MinU) \
+ V(Mips64S32x4Select)
// Addressing modes represent the "shape" of inputs to an instruction.
// Many instructions support multiple addressing modes. Addressing modes
« src/compiler/instruction-selector.cc ('K') | « src/compiler/mips64/code-generator-mips64.cc ('k') | src/compiler/mips64/instruction-selector-mips64.cc » ('j') | no next file with comments »

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