[arm][turbofan] Use NEON for unaligned float64 memory accesses

[arm][turbofan] Use NEON for unaligned float64 memory accesses

When available, we use the NEON instructions vld1.8 and vst1.8 to
implement unaligned loads and stores of float64 values.

R=bmeurer@chromium.org, v8-arm-ports@googlegroups.com

Review-Url: https://codereview.chromium.org/2769723003
Cr-Commit-Position: refs/heads/master@{#44063}
Committed: https://chromium.googlesource.com/v8/v8/+/ae8bc6ed2afa81946c5b1747eb5d795300cf524f

[ahaas, 2017-03-23 09:38:37]

The CQ bit was checked by ahaas@chromium.org to run a CQ dry run

[commit-bot: I haz the power, 2017-03-23 09:38:40]

Dry run: CQ is trying da patch. Follow status at
 
https://chromium-cq-status.appspot.com/v2/patch-status/codereview.chromium.or...

[ahaas, 2017-03-23 09:39:08]

ahaas@chromium.org changed reviewers:
+ bbudge@chromium.org

[ahaas, 2017-03-23 09:39:08]

ahaas@chromium.org changed reviewers:
+ bbudge@chromium.org

[Benedikt Meurer, 2017-03-23 10:08:53]

LGTM, but please get an LGTM from ARM folks as well.

[commit-bot: I haz the power, 2017-03-23 10:19:20]

The CQ bit was unchecked by commit-bot@chromium.org

[commit-bot: I haz the power, 2017-03-23 10:19:21]

Dry run: Try jobs failed on following builders:
  v8_linux_arm_rel_ng on master.tryserver.v8 (JOB_FAILED,
http://build.chromium.org/p/tryserver.v8/builders/v8_linux_arm_rel_ng/builds/...)
  v8_linux_arm_rel_ng_triggered on master.tryserver.v8 (JOB_FAILED,
http://build.chromium.org/p/tryserver.v8/builders/v8_linux_arm_rel_ng_trigger...)

[martyn.capewell, 2017-03-23 11:11:53]

martyn.capewell@arm.com changed reviewers:
+ martyn.capewell@arm.com

[martyn.capewell, 2017-03-23 11:11:53]

https://codereview.chromium.org/2769723003/diff/1/src/compiler/arm/code-gener...
File src/compiler/arm/code-generator-arm.cc (right):

https://codereview.chromium.org/2769723003/diff/1/src/compiler/arm/code-gener...
src/compiler/arm/code-generator-arm.cc:1449: NeonMemOperand(src.rn(),
src.rm()));
I don't think this works, as the addressing mode that accepts two registers uses
the second register as a post index (ie. *rn; rn += rm) not an offset (ie. *(rn
+ rm)).

It will need either an address calculation in a scratch here, or emitting an
extra addition in the selector. Store will be similar.

[ahaas, 2017-03-23 12:48:24]

The CQ bit was checked by ahaas@chromium.org to run a CQ dry run

[commit-bot: I haz the power, 2017-03-23 12:48:32]

Dry run: CQ is trying da patch. Follow status at
 
https://chromium-cq-status.appspot.com/v2/patch-status/codereview.chromium.or...

[ahaas, 2017-03-23 13:01:49]

On 2017/03/23 at 11:11:53, martyn.capewell wrote:
>
https://codereview.chromium.org/2769723003/diff/1/src/compiler/arm/code-gener...
> File src/compiler/arm/code-generator-arm.cc (right):
> 
>
https://codereview.chromium.org/2769723003/diff/1/src/compiler/arm/code-gener...
> src/compiler/arm/code-generator-arm.cc:1449: NeonMemOperand(src.rn(),
src.rm()));
> I don't think this works, as the addressing mode that accepts two registers
uses the second register as a post index (ie. *rn; rn += rm) not an offset (ie.
*(rn + rm)).
> 
> It will need either an address calculation in a scratch here, or emitting an
extra addition in the selector. Store will be similar.

Ah, thanks for explaining the problem. I use the existing address calculation in
the instruction selector now and just exchange the load instruction. For store I
use the same address calculation as for loads.

PTAL

[commit-bot: I haz the power, 2017-03-23 13:08:31]

The CQ bit was unchecked by commit-bot@chromium.org

[commit-bot: I haz the power, 2017-03-23 13:08:32]

Dry run: This issue passed the CQ dry run.

[martyn.capewell, 2017-03-23 14:18:23]

lgtm

[ahaas, 2017-03-23 14:24:13]

The CQ bit was checked by ahaas@chromium.org

[ahaas, 2017-03-23 14:24:14]

The patchset sent to the CQ was uploaded after l-g-t-m from bmeurer@chromium.org
Link to the patchset: https://codereview.chromium.org/2769723003/#ps20001
(title: "Calculate the address separately")

[commit-bot: I haz the power, 2017-03-23 14:24:19]

CQ is trying da patch. Follow status at
 
https://chromium-cq-status.appspot.com/v2/patch-status/codereview.chromium.or...

[ahaas, 2017-03-23 14:24:28]

On 2017/03/23 at 14:18:23, martyn.capewell wrote:
> lgtm

Thanks!

[commit-bot: I haz the power, 2017-03-23 14:25:35]

CQ is committing da patch.

Bot data: {"patchset_id": 20001, "attempt_start_ts": 1490279053751160,
"parent_rev": "ac5d006aad0ceeed59ce2fb1a9586bf2eb5c26ae", "commit_rev":
"0b76d584d22be31b2eab82bdecfda91d8c07448f"}

[commit-bot: I haz the power, 2017-03-23 14:25:44]

CQ is committing da patch.

Bot data: {"patchset_id": 20001, "attempt_start_ts": 1490279053751160,
"parent_rev": "118f09f1217c5b58117b9e56ededc56dd21a2026", "commit_rev":
"ae8bc6ed2afa81946c5b1747eb5d795300cf524f"}

[commit-bot: I haz the power, 2017-03-23 14:25:49]

Description was changed from

==========
[arm][turbofan] Use NEON for unaligned float64 memory accesses

When available, we use the NEON instructions vld1.8 and vst1.8 to
implement unaligned loads and stores of float64 values.

R=bmeurer@chromium.org, v8-arm-ports@googlegroups.com
==========

to

==========
[arm][turbofan] Use NEON for unaligned float64 memory accesses

When available, we use the NEON instructions vld1.8 and vst1.8 to
implement unaligned loads and stores of float64 values.

R=bmeurer@chromium.org, v8-arm-ports@googlegroups.com

Review-Url: https://codereview.chromium.org/2769723003
Cr-Commit-Position: refs/heads/master@{#44063}
Committed:
https://chromium.googlesource.com/v8/v8/+/ae8bc6ed2afa81946c5b1747eb5d795300c...
==========

[commit-bot: I haz the power, 2017-03-23 14:25:51]

Committed patchset #2 (id:20001) as
https://chromium.googlesource.com/v8/v8/+/ae8bc6ed2afa81946c5b1747eb5d795300c...