PPC: [Atomics] Make Atomics.exchange a builtin using TF

src/ppc/disasm-ppc.cc

Index: src/ppc/disasm-ppc.cc
diff --git a/src/ppc/disasm-ppc.cc b/src/ppc/disasm-ppc.cc
index 6baf3d0c7fa188c71805f60919d75df0a4fed23b..3651f4c7ef05d241e1a6121e4e803f4956bae352 100644
--- a/src/ppc/disasm-ppc.cc
+++ b/src/ppc/disasm-ppc.cc
@@ -562,6 +562,10 @@ void Decoder::DecodeExt2(Instruction* instr) {
       return;
     }
 #endif
+    case SYNC: {
+      Format(instr, "sync");
+      return;
+    }
     case MODSW: {
       Format(instr, "modsw  'rt, 'ra, 'rb");
       return;
@@ -649,6 +653,21 @@ void Decoder::DecodeExt2(Instruction* instr) {
     }
   }
 
+  switch (EXT2 | (instr->BitField(10, 0))) {
+    case STBCX: {
+      Format(instr, "stbcx   'rs, 'ra, 'rb");
+      return;
+    }
+    case STHCX: {
+      Format(instr, "sthcx   'rs, 'ra, 'rb");
+      return;
+    }
+    case STWCX: {
+      Format(instr, "stwcx   'rs, 'ra, 'rb");
+      return;
+    }
+  }
+
   // ?? are all of these xo_form?
   switch (EXT2 | (instr->BitField(9, 1))) {
     case CMP: {
@@ -859,6 +878,18 @@ void Decoder::DecodeExt2(Instruction* instr) {
       Format(instr, "lhax    'rt, 'ra, 'rb");
       return;
     }
+    case LBARX: {
+      Format(instr, "lbarx   'rt, 'ra, 'rb");
+      return;
+    }
+    case LHARX: {
+      Format(instr, "lharx   'rt, 'ra, 'rb");
+      return;
+    }
+    case LWARX: {
+      Format(instr, "lwarx   'rt, 'ra, 'rb");
+      return;
+    }
 #if V8_TARGET_ARCH_PPC64
     case LDX: {
       Format(instr, "ldx     'rt, 'ra, 'rb");