PPC: [Atomics] Make Atomics.exchange a builtin using TF

src/ppc/disasm-ppc.cc

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 // A Disassembler object is used to disassemble a block of code instruction by
 // instruction. The default implementation of the NameConverter object can be
 // overriden to modify register names or to do symbol lookup on addresses.
 //
 // The example below will disassemble a block of code and print it to stdout.
 //
@@ skipping 544 matching lines @@
     case SRAW: {
       Format(instr, "sraw'.   'ra, 'rs, 'rb");
       return;
     }
 #if V8_TARGET_ARCH_PPC64
     case SRAD: {
       Format(instr, "srad'.   'ra, 'rs, 'rb");
       return;
     }
 #endif
+    case SYNC: {
+      Format(instr, "sync");
+      return;
+    }
     case MODSW: {
       Format(instr, "modsw  'rt, 'ra, 'rb");
       return;
     }
     case MODUW: {
       Format(instr, "moduw  'rt, 'ra, 'rb");
       return;
     }
 #if V8_TARGET_ARCH_PPC64
     case MODSD: {
@@ skipping 67 matching lines @@
 #endif
   }
 
   switch (EXT2 | (instr->BitField(10, 2))) {
     case SRADIX: {
       Format(instr, "sradi'.  'ra,'rs,'sh");
       return;
     }
   }
 
+  switch (EXT2 | (instr->BitField(10, 0))) {
+    case STBCX: {
+      Format(instr, "stbcx   'rs, 'ra, 'rb");
+      return;
+    }
+    case STHCX: {
+      Format(instr, "sthcx   'rs, 'ra, 'rb");
+      return;
+    }
+    case STWCX: {
+      Format(instr, "stwcx   'rs, 'ra, 'rb");
+      return;
+    }
+  }
+
   // ?? are all of these xo_form?
   switch (EXT2 | (instr->BitField(9, 1))) {
     case CMP: {
 #if V8_TARGET_ARCH_PPC64
       if (instr->Bit(21)) {
 #endif
         Format(instr, "cmp     'ra, 'rb");
 #if V8_TARGET_ARCH_PPC64
       } else {
         Format(instr, "cmpw    'ra, 'rb");
@@ skipping 190 matching lines @@
       return;
     }
     case LHZUX: {
       Format(instr, "lhzux   'rt, 'ra, 'rb");
       return;
     }
     case LHAX: {
       Format(instr, "lhax    'rt, 'ra, 'rb");
       return;
     }
+    case LBARX: {
+      Format(instr, "lbarx   'rt, 'ra, 'rb");
+      return;
+    }
+    case LHARX: {
+      Format(instr, "lharx   'rt, 'ra, 'rb");
+      return;
+    }
+    case LWARX: {
+      Format(instr, "lwarx   'rt, 'ra, 'rb");
+      return;
+    }
 #if V8_TARGET_ARCH_PPC64
     case LDX: {
       Format(instr, "ldx     'rt, 'ra, 'rb");
       return;
     }
     case LDUX: {
       Format(instr, "ldux    'rt, 'ra, 'rb");
       return;
     }
     case STDX: {
@@ skipping 638 matching lines @@
     pc += d.InstructionDecode(buffer, pc);
     v8::internal::PrintF(f, "%p    %08x      %s\n", static_cast<void*>(prev_pc),
                          *reinterpret_cast<int32_t*>(prev_pc), buffer.start());
   }
 }
 
 
 }  // namespace disasm
 
 #endif  // V8_TARGET_ARCH_PPC