Index: src/ia32/assembler-ia32.h |
diff --git a/src/ia32/assembler-ia32.h b/src/ia32/assembler-ia32.h |
index 6fd334723fcf97d4ccd3ea2ed7f314d076c7418a..d405a91a7d609ac42f53c3cd1d40a24132f9ddd2 100644 |
--- a/src/ia32/assembler-ia32.h |
+++ b/src/ia32/assembler-ia32.h |
@@ -979,6 +979,11 @@ class Assembler : public AssemblerBase { |
void divps(XMMRegister dst, const Operand& src); |
void divps(XMMRegister dst, XMMRegister src) { divps(dst, Operand(src)); } |
+ void minps(XMMRegister dst, const Operand& src); |
+ void minps(XMMRegister dst, XMMRegister src) { minps(dst, Operand(src)); } |
+ void maxps(XMMRegister dst, const Operand& src); |
+ void maxps(XMMRegister dst, XMMRegister src) { maxps(dst, Operand(src)); } |
+ |
// SSE2 instructions |
void cvttss2si(Register dst, const Operand& src); |
void cvttss2si(Register dst, XMMRegister src) { |
@@ -1403,7 +1408,13 @@ class Assembler : public AssemblerBase { |
#define PACKED_OP_LIST(V) \ |
V(and, 0x54) \ |
- V(xor, 0x57) |
+ V(xor, 0x57) \ |
+ V(add, 0x58) \ |
+ V(mul, 0x59) \ |
+ V(sub, 0x5c) \ |
+ V(min, 0x5d) \ |
+ V(div, 0x5e) \ |
+ V(max, 0x5f) |
#define AVX_PACKED_OP_DECLARE(name, opcode) \ |
void v##name##ps(XMMRegister dst, XMMRegister src1, XMMRegister src2) { \ |