[ia32] Add minps/maxps and AVX v_ps/v_pd for add/sub/mul/div/min/max

src/ia32/assembler-ia32.h

 // Copyright (c) 1994-2006 Sun Microsystems Inc.
 // All Rights Reserved.
 //
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 // - Redistributions of source code must retain the above copyright notice,
 // this list of conditions and the following disclaimer.
 //
@@ skipping 961 matching lines @@
 
   void addps(XMMRegister dst, const Operand& src);
   void addps(XMMRegister dst, XMMRegister src) { addps(dst, Operand(src)); }
   void subps(XMMRegister dst, const Operand& src);
   void subps(XMMRegister dst, XMMRegister src) { subps(dst, Operand(src)); }
   void mulps(XMMRegister dst, const Operand& src);
   void mulps(XMMRegister dst, XMMRegister src) { mulps(dst, Operand(src)); }
   void divps(XMMRegister dst, const Operand& src);
   void divps(XMMRegister dst, XMMRegister src) { divps(dst, Operand(src)); }
 
+  void minps(XMMRegister dst, const Operand& src);
+  void minps(XMMRegister dst, XMMRegister src) { minps(dst, Operand(src)); }
+  void maxps(XMMRegister dst, const Operand& src);
+  void maxps(XMMRegister dst, XMMRegister src) { maxps(dst, Operand(src)); }
+
   // SSE2 instructions
   void cvttss2si(Register dst, const Operand& src);
   void cvttss2si(Register dst, XMMRegister src) {
     cvttss2si(dst, Operand(src));
   }
   void cvttsd2si(Register dst, const Operand& src);
   void cvttsd2si(Register dst, XMMRegister src) {
     cvttsd2si(dst, Operand(src));
   }
   void cvtsd2si(Register dst, XMMRegister src);
@@ skipping 404 matching lines @@
   void shrx(Register dst, const Operand& src1, Register src2) {
     bmi2(kF2, 0xf7, dst, src2, src1);
   }
   void rorx(Register dst, Register src, byte imm8) {
     rorx(dst, Operand(src), imm8);
   }
   void rorx(Register dst, const Operand& src, byte imm8);
 
 #define PACKED_OP_LIST(V) \
   V(and, 0x54)            \
-  V(xor, 0x57)
+  V(xor, 0x57)            \
+  V(add, 0x58)            \
+  V(mul, 0x59)            \
+  V(sub, 0x5c)            \
+  V(min, 0x5d)            \
+  V(div, 0x5e)            \
+  V(max, 0x5f)
 
 #define AVX_PACKED_OP_DECLARE(name, opcode)                                  \
   void v##name##ps(XMMRegister dst, XMMRegister src1, XMMRegister src2) {    \
     vps(opcode, dst, src1, Operand(src2));                                   \
   }                                                                          \
   void v##name##ps(XMMRegister dst, XMMRegister src1, const Operand& src2) { \
     vps(opcode, dst, src1, src2);                                            \
   }                                                                          \
   void v##name##pd(XMMRegister dst, XMMRegister src1, XMMRegister src2) {    \
     vpd(opcode, dst, src1, Operand(src2));                                   \
@@ skipping 238 matching lines @@
   Assembler* assembler_;
 #ifdef DEBUG
   int space_before_;
 #endif
 };
 
 }  // namespace internal
 }  // namespace v8
 
 #endif  // V8_IA32_ASSEMBLER_IA32_H_