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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
2 // All Rights Reserved. | 2 // All Rights Reserved. |
3 // | 3 // |
4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
5 // modification, are permitted provided that the following conditions are | 5 // modification, are permitted provided that the following conditions are |
6 // met: | 6 // met: |
7 // | 7 // |
8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
10 // | 10 // |
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57 V(v0) V(v1) V(a0) V(a1) V(a2) V(a3) \ | 57 V(v0) V(v1) V(a0) V(a1) V(a2) V(a3) \ |
58 V(t0) V(t1) V(t2) V(t3) V(t4) V(t5) V(t6) V(s7) | 58 V(t0) V(t1) V(t2) V(t3) V(t4) V(t5) V(t6) V(s7) |
59 | 59 |
60 #define DOUBLE_REGISTERS(V) \ | 60 #define DOUBLE_REGISTERS(V) \ |
61 V(f0) V(f1) V(f2) V(f3) V(f4) V(f5) V(f6) V(f7) \ | 61 V(f0) V(f1) V(f2) V(f3) V(f4) V(f5) V(f6) V(f7) \ |
62 V(f8) V(f9) V(f10) V(f11) V(f12) V(f13) V(f14) V(f15) \ | 62 V(f8) V(f9) V(f10) V(f11) V(f12) V(f13) V(f14) V(f15) \ |
63 V(f16) V(f17) V(f18) V(f19) V(f20) V(f21) V(f22) V(f23) \ | 63 V(f16) V(f17) V(f18) V(f19) V(f20) V(f21) V(f22) V(f23) \ |
64 V(f24) V(f25) V(f26) V(f27) V(f28) V(f29) V(f30) V(f31) | 64 V(f24) V(f25) V(f26) V(f27) V(f28) V(f29) V(f30) V(f31) |
65 | 65 |
66 #define FLOAT_REGISTERS DOUBLE_REGISTERS | 66 #define FLOAT_REGISTERS DOUBLE_REGISTERS |
67 #define SIMD128_REGISTERS DOUBLE_REGISTERS | 67 #define SIMD128_REGISTERS(V) \ |
| 68 V(w0) V(w1) V(w2) V(w3) V(w4) V(w5) V(w6) V(w7) \ |
| 69 V(w8) V(w9) V(w10) V(w11) V(w12) V(w13) V(w14) V(w15) \ |
| 70 V(w16) V(w17) V(w18) V(w19) V(w20) V(w21) V(w22) V(w23) \ |
| 71 V(w24) V(w25) V(w26) V(w27) V(w28) V(w29) V(w30) V(w31) |
68 | 72 |
69 #define ALLOCATABLE_DOUBLE_REGISTERS(V) \ | 73 #define ALLOCATABLE_DOUBLE_REGISTERS(V) \ |
70 V(f0) V(f2) V(f4) V(f6) V(f8) V(f10) V(f12) V(f14) \ | 74 V(f0) V(f2) V(f4) V(f6) V(f8) V(f10) V(f12) V(f14) \ |
71 V(f16) V(f18) V(f20) V(f22) V(f24) | 75 V(f16) V(f18) V(f20) V(f22) V(f24) |
72 // clang-format on | 76 // clang-format on |
73 | 77 |
74 // CPU Registers. | 78 // CPU Registers. |
75 // | 79 // |
76 // 1) We would prefer to use an enum, but enum values are assignment- | 80 // 1) We would prefer to use an enum, but enum values are assignment- |
77 // compatible with int, which has caused code-generation bugs. | 81 // compatible with int, which has caused code-generation bugs. |
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155 constexpr bool kSimpleFPAliasing = true; | 159 constexpr bool kSimpleFPAliasing = true; |
156 constexpr bool kSimdMaskRegisters = false; | 160 constexpr bool kSimdMaskRegisters = false; |
157 | 161 |
158 // Coprocessor register. | 162 // Coprocessor register. |
159 struct FPURegister { | 163 struct FPURegister { |
160 enum Code { | 164 enum Code { |
161 #define REGISTER_CODE(R) kCode_##R, | 165 #define REGISTER_CODE(R) kCode_##R, |
162 DOUBLE_REGISTERS(REGISTER_CODE) | 166 DOUBLE_REGISTERS(REGISTER_CODE) |
163 #undef REGISTER_CODE | 167 #undef REGISTER_CODE |
164 kAfterLast, | 168 kAfterLast, |
165 kCode_no_reg = -1 | 169 kCode_no_reg = kInvalidFPURegister |
166 }; | 170 }; |
167 | 171 |
168 static constexpr int kMaxNumRegisters = Code::kAfterLast; | 172 static constexpr int kMaxNumRegisters = Code::kAfterLast; |
169 | 173 |
170 inline static int NumRegisters(); | 174 inline static int NumRegisters(); |
171 | 175 |
172 // TODO(plind): Warning, inconsistent numbering here. kNumFPURegisters refers | 176 // TODO(plind): Warning, inconsistent numbering here. kNumFPURegisters refers |
173 // to number of 32-bit FPU regs, but kNumAllocatableRegisters refers to | 177 // to number of 32-bit FPU regs, but kNumAllocatableRegisters refers to |
174 // number of Double regs (64-bit regs, or FPU-reg-pairs). | 178 // number of Double regs (64-bit regs, or FPU-reg-pairs). |
175 | 179 |
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206 return r; | 210 return r; |
207 } | 211 } |
208 void setcode(int f) { | 212 void setcode(int f) { |
209 reg_code = f; | 213 reg_code = f; |
210 DCHECK(is_valid()); | 214 DCHECK(is_valid()); |
211 } | 215 } |
212 // Unfortunately we can't make this private in a struct. | 216 // Unfortunately we can't make this private in a struct. |
213 int reg_code; | 217 int reg_code; |
214 }; | 218 }; |
215 | 219 |
| 220 // MIPS SIMD (MSA) register |
| 221 struct MSARegister { |
| 222 enum Code { |
| 223 #define REGISTER_CODE(R) kCode_##R, |
| 224 SIMD128_REGISTERS(REGISTER_CODE) |
| 225 #undef REGISTER_CODE |
| 226 kAfterLast, |
| 227 kCode_no_reg = kInvalidMSARegister |
| 228 }; |
| 229 |
| 230 static const int kMaxNumRegisters = Code::kAfterLast; |
| 231 |
| 232 inline static int NumRegisters(); |
| 233 |
| 234 bool is_valid() const { return 0 <= reg_code && reg_code < kMaxNumRegisters; } |
| 235 bool is(MSARegister reg) const { return reg_code == reg.reg_code; } |
| 236 |
| 237 int code() const { |
| 238 DCHECK(is_valid()); |
| 239 return reg_code; |
| 240 } |
| 241 int bit() const { |
| 242 DCHECK(is_valid()); |
| 243 return 1 << reg_code; |
| 244 } |
| 245 |
| 246 static MSARegister from_code(int code) { |
| 247 MSARegister r = {code}; |
| 248 return r; |
| 249 } |
| 250 void setcode(int f) { |
| 251 reg_code = f; |
| 252 DCHECK(is_valid()); |
| 253 } |
| 254 // Unfortunately we can't make this private in a struct. |
| 255 int reg_code; |
| 256 }; |
| 257 |
216 // A few double registers are reserved: one as a scratch register and one to | 258 // A few double registers are reserved: one as a scratch register and one to |
217 // hold 0.0. | 259 // hold 0.0. |
218 // f28: 0.0 | 260 // f28: 0.0 |
219 // f30: scratch register. | 261 // f30: scratch register. |
220 | 262 |
221 // V8 now supports the O32 ABI, and the FPU Registers are organized as 32 | 263 // V8 now supports the O32 ABI, and the FPU Registers are organized as 32 |
222 // 32-bit registers, f0 through f31. When used as 'double' they are used | 264 // 32-bit registers, f0 through f31. When used as 'double' they are used |
223 // in pairs, starting with the even numbered register. So a double operation | 265 // in pairs, starting with the even numbered register. So a double operation |
224 // on f0 really uses f0 and f1. | 266 // on f0 really uses f0 and f1. |
225 // (Modern mips hardware also supports 32 64-bit registers, via setting | 267 // (Modern mips hardware also supports 32 64-bit registers, via setting |
226 // (priviledged) Status Register FR bit to 1. This is used by the N32 ABI, | 268 // (priviledged) Status Register FR bit to 1. This is used by the N32 ABI, |
227 // but it is not in common use. Someday we will want to support this in v8.) | 269 // but it is not in common use. Someday we will want to support this in v8.) |
228 | 270 |
229 // For O32 ABI, Floats and Doubles refer to same set of 32 32-bit registers. | 271 // For O32 ABI, Floats and Doubles refer to same set of 32 32-bit registers. |
230 typedef FPURegister FloatRegister; | 272 typedef FPURegister FloatRegister; |
231 | 273 |
232 typedef FPURegister DoubleRegister; | 274 typedef FPURegister DoubleRegister; |
233 | 275 |
234 // TODO(mips) Define SIMD registers. | 276 constexpr DoubleRegister no_freg = {kInvalidFPURegister}; |
235 typedef FPURegister Simd128Register; | |
236 | |
237 constexpr DoubleRegister no_freg = {-1}; | |
238 | 277 |
239 constexpr DoubleRegister f0 = {0}; // Return value in hard float mode. | 278 constexpr DoubleRegister f0 = {0}; // Return value in hard float mode. |
240 constexpr DoubleRegister f1 = {1}; | 279 constexpr DoubleRegister f1 = {1}; |
241 constexpr DoubleRegister f2 = {2}; | 280 constexpr DoubleRegister f2 = {2}; |
242 constexpr DoubleRegister f3 = {3}; | 281 constexpr DoubleRegister f3 = {3}; |
243 constexpr DoubleRegister f4 = {4}; | 282 constexpr DoubleRegister f4 = {4}; |
244 constexpr DoubleRegister f5 = {5}; | 283 constexpr DoubleRegister f5 = {5}; |
245 constexpr DoubleRegister f6 = {6}; | 284 constexpr DoubleRegister f6 = {6}; |
246 constexpr DoubleRegister f7 = {7}; | 285 constexpr DoubleRegister f7 = {7}; |
247 constexpr DoubleRegister f8 = {8}; | 286 constexpr DoubleRegister f8 = {8}; |
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262 constexpr DoubleRegister f23 = {23}; | 301 constexpr DoubleRegister f23 = {23}; |
263 constexpr DoubleRegister f24 = {24}; | 302 constexpr DoubleRegister f24 = {24}; |
264 constexpr DoubleRegister f25 = {25}; | 303 constexpr DoubleRegister f25 = {25}; |
265 constexpr DoubleRegister f26 = {26}; | 304 constexpr DoubleRegister f26 = {26}; |
266 constexpr DoubleRegister f27 = {27}; | 305 constexpr DoubleRegister f27 = {27}; |
267 constexpr DoubleRegister f28 = {28}; | 306 constexpr DoubleRegister f28 = {28}; |
268 constexpr DoubleRegister f29 = {29}; | 307 constexpr DoubleRegister f29 = {29}; |
269 constexpr DoubleRegister f30 = {30}; | 308 constexpr DoubleRegister f30 = {30}; |
270 constexpr DoubleRegister f31 = {31}; | 309 constexpr DoubleRegister f31 = {31}; |
271 | 310 |
| 311 // SIMD registers. |
| 312 typedef MSARegister Simd128Register; |
| 313 |
| 314 const Simd128Register no_msareg = {kInvalidMSARegister}; |
| 315 |
| 316 constexpr Simd128Register w0 = {0}; |
| 317 constexpr Simd128Register w1 = {1}; |
| 318 constexpr Simd128Register w2 = {2}; |
| 319 constexpr Simd128Register w3 = {3}; |
| 320 constexpr Simd128Register w4 = {4}; |
| 321 constexpr Simd128Register w5 = {5}; |
| 322 constexpr Simd128Register w6 = {6}; |
| 323 constexpr Simd128Register w7 = {7}; |
| 324 constexpr Simd128Register w8 = {8}; |
| 325 constexpr Simd128Register w9 = {9}; |
| 326 constexpr Simd128Register w10 = {10}; |
| 327 constexpr Simd128Register w11 = {11}; |
| 328 constexpr Simd128Register w12 = {12}; |
| 329 constexpr Simd128Register w13 = {13}; |
| 330 constexpr Simd128Register w14 = {14}; |
| 331 constexpr Simd128Register w15 = {15}; |
| 332 constexpr Simd128Register w16 = {16}; |
| 333 constexpr Simd128Register w17 = {17}; |
| 334 constexpr Simd128Register w18 = {18}; |
| 335 constexpr Simd128Register w19 = {19}; |
| 336 constexpr Simd128Register w20 = {20}; |
| 337 constexpr Simd128Register w21 = {21}; |
| 338 constexpr Simd128Register w22 = {22}; |
| 339 constexpr Simd128Register w23 = {23}; |
| 340 constexpr Simd128Register w24 = {24}; |
| 341 constexpr Simd128Register w25 = {25}; |
| 342 constexpr Simd128Register w26 = {26}; |
| 343 constexpr Simd128Register w27 = {27}; |
| 344 constexpr Simd128Register w28 = {28}; |
| 345 constexpr Simd128Register w29 = {29}; |
| 346 constexpr Simd128Register w30 = {30}; |
| 347 constexpr Simd128Register w31 = {31}; |
| 348 |
272 // Register aliases. | 349 // Register aliases. |
273 // cp is assumed to be a callee saved register. | 350 // cp is assumed to be a callee saved register. |
274 constexpr Register kRootRegister = s6; | 351 constexpr Register kRootRegister = s6; |
275 constexpr Register cp = s7; | 352 constexpr Register cp = s7; |
276 constexpr Register kLithiumScratchReg = s3; | 353 constexpr Register kLithiumScratchReg = s3; |
277 constexpr Register kLithiumScratchReg2 = s4; | 354 constexpr Register kLithiumScratchReg2 = s4; |
278 constexpr DoubleRegister kLithiumScratchDouble = f30; | 355 constexpr DoubleRegister kLithiumScratchDouble = f30; |
279 constexpr DoubleRegister kDoubleRegZero = f28; | 356 constexpr DoubleRegister kDoubleRegZero = f28; |
280 // Used on mips32r6 for compare operations. | 357 // Used on mips32r6 for compare operations. |
281 constexpr DoubleRegister kDoubleCompareReg = f26; | 358 constexpr DoubleRegister kDoubleCompareReg = f26; |
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297 reg_code = f; | 374 reg_code = f; |
298 DCHECK(is_valid()); | 375 DCHECK(is_valid()); |
299 } | 376 } |
300 // Unfortunately we can't make this private in a struct. | 377 // Unfortunately we can't make this private in a struct. |
301 int reg_code; | 378 int reg_code; |
302 }; | 379 }; |
303 | 380 |
304 constexpr FPUControlRegister no_fpucreg = {kInvalidFPUControlRegister}; | 381 constexpr FPUControlRegister no_fpucreg = {kInvalidFPUControlRegister}; |
305 constexpr FPUControlRegister FCSR = {kFCSRRegister}; | 382 constexpr FPUControlRegister FCSR = {kFCSRRegister}; |
306 | 383 |
| 384 // MSA control registers |
| 385 struct MSAControlRegister { |
| 386 bool is_valid() const { |
| 387 return (reg_code == kMSAIRRegister) || (reg_code == kMSACSRRegister); |
| 388 } |
| 389 bool is(MSAControlRegister creg) const { return reg_code == creg.reg_code; } |
| 390 int code() const { |
| 391 DCHECK(is_valid()); |
| 392 return reg_code; |
| 393 } |
| 394 int bit() const { |
| 395 DCHECK(is_valid()); |
| 396 return 1 << reg_code; |
| 397 } |
| 398 void setcode(int f) { |
| 399 reg_code = f; |
| 400 DCHECK(is_valid()); |
| 401 } |
| 402 // Unfortunately we can't make this private in a struct. |
| 403 int reg_code; |
| 404 }; |
| 405 |
| 406 constexpr MSAControlRegister no_msacreg = {kInvalidMSAControlRegister}; |
| 407 constexpr MSAControlRegister MSAIR = {kMSAIRRegister}; |
| 408 constexpr MSAControlRegister MSACSR = {kMSACSRRegister}; |
| 409 |
307 // ----------------------------------------------------------------------------- | 410 // ----------------------------------------------------------------------------- |
308 // Machine instruction Operands. | 411 // Machine instruction Operands. |
309 | 412 |
310 // Class Operand represents a shifter operand in data processing instructions. | 413 // Class Operand represents a shifter operand in data processing instructions. |
311 class Operand BASE_EMBEDDED { | 414 class Operand BASE_EMBEDDED { |
312 public: | 415 public: |
313 // Immediate. | 416 // Immediate. |
314 INLINE(explicit Operand(int32_t immediate, | 417 INLINE(explicit Operand(int32_t immediate, |
315 RelocInfo::Mode rmode = RelocInfo::NONE32)); | 418 RelocInfo::Mode rmode = RelocInfo::NONE32)); |
316 INLINE(explicit Operand(const ExternalReference& f)); | 419 INLINE(explicit Operand(const ExternalReference& f)); |
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974 void bc1f(int16_t offset, uint16_t cc = 0); | 1077 void bc1f(int16_t offset, uint16_t cc = 0); |
975 inline void bc1f(Label* L, uint16_t cc = 0) { | 1078 inline void bc1f(Label* L, uint16_t cc = 0) { |
976 bc1f(shifted_branch_offset(L), cc); | 1079 bc1f(shifted_branch_offset(L), cc); |
977 } | 1080 } |
978 void bc1t(int16_t offset, uint16_t cc = 0); | 1081 void bc1t(int16_t offset, uint16_t cc = 0); |
979 inline void bc1t(Label* L, uint16_t cc = 0) { | 1082 inline void bc1t(Label* L, uint16_t cc = 0) { |
980 bc1t(shifted_branch_offset(L), cc); | 1083 bc1t(shifted_branch_offset(L), cc); |
981 } | 1084 } |
982 void fcmp(FPURegister src1, const double src2, FPUCondition cond); | 1085 void fcmp(FPURegister src1, const double src2, FPUCondition cond); |
983 | 1086 |
| 1087 // MSA instructions |
| 1088 void bz_v(MSARegister wt, int16_t offset); |
| 1089 void bz_b(MSARegister wt, int16_t offset); |
| 1090 void bz_h(MSARegister wt, int16_t offset); |
| 1091 void bz_w(MSARegister wt, int16_t offset); |
| 1092 void bz_d(MSARegister wt, int16_t offset); |
| 1093 void bnz_v(MSARegister wt, int16_t offset); |
| 1094 void bnz_b(MSARegister wt, int16_t offset); |
| 1095 void bnz_h(MSARegister wt, int16_t offset); |
| 1096 void bnz_w(MSARegister wt, int16_t offset); |
| 1097 void bnz_d(MSARegister wt, int16_t offset); |
| 1098 |
| 1099 void ld_b(MSARegister wd, const MemOperand& rs); |
| 1100 void ld_h(MSARegister wd, const MemOperand& rs); |
| 1101 void ld_w(MSARegister wd, const MemOperand& rs); |
| 1102 void ld_d(MSARegister wd, const MemOperand& rs); |
| 1103 void st_b(MSARegister wd, const MemOperand& rs); |
| 1104 void st_h(MSARegister wd, const MemOperand& rs); |
| 1105 void st_w(MSARegister wd, const MemOperand& rs); |
| 1106 void st_d(MSARegister wd, const MemOperand& rs); |
| 1107 |
| 1108 void ldi_b(MSARegister wd, int32_t imm10); |
| 1109 void ldi_h(MSARegister wd, int32_t imm10); |
| 1110 void ldi_w(MSARegister wd, int32_t imm10); |
| 1111 void ldi_d(MSARegister wd, int32_t imm10); |
| 1112 |
| 1113 void addvi_b(MSARegister wd, MSARegister ws, uint32_t imm5); |
| 1114 void addvi_h(MSARegister wd, MSARegister ws, uint32_t imm5); |
| 1115 void addvi_w(MSARegister wd, MSARegister ws, uint32_t imm5); |
| 1116 void addvi_d(MSARegister wd, MSARegister ws, uint32_t imm5); |
| 1117 void subvi_b(MSARegister wd, MSARegister ws, uint32_t imm5); |
| 1118 void subvi_h(MSARegister wd, MSARegister ws, uint32_t imm5); |
| 1119 void subvi_w(MSARegister wd, MSARegister ws, uint32_t imm5); |
| 1120 void subvi_d(MSARegister wd, MSARegister ws, uint32_t imm5); |
| 1121 void maxi_s_b(MSARegister wd, MSARegister ws, uint32_t imm5); |
| 1122 void maxi_s_h(MSARegister wd, MSARegister ws, uint32_t imm5); |
| 1123 void maxi_s_w(MSARegister wd, MSARegister ws, uint32_t imm5); |
| 1124 void maxi_s_d(MSARegister wd, MSARegister ws, uint32_t imm5); |
| 1125 void maxi_u_b(MSARegister wd, MSARegister ws, uint32_t imm5); |
| 1126 void maxi_u_h(MSARegister wd, MSARegister ws, uint32_t imm5); |
| 1127 void maxi_u_w(MSARegister wd, MSARegister ws, uint32_t imm5); |
| 1128 void maxi_u_d(MSARegister wd, MSARegister ws, uint32_t imm5); |
| 1129 void mini_s_b(MSARegister wd, MSARegister ws, uint32_t imm5); |
| 1130 void mini_s_h(MSARegister wd, MSARegister ws, uint32_t imm5); |
| 1131 void mini_s_w(MSARegister wd, MSARegister ws, uint32_t imm5); |
| 1132 void mini_s_d(MSARegister wd, MSARegister ws, uint32_t imm5); |
| 1133 void mini_u_b(MSARegister wd, MSARegister ws, uint32_t imm5); |
| 1134 void mini_u_h(MSARegister wd, MSARegister ws, uint32_t imm5); |
| 1135 void mini_u_w(MSARegister wd, MSARegister ws, uint32_t imm5); |
| 1136 void mini_u_d(MSARegister wd, MSARegister ws, uint32_t imm5); |
| 1137 void ceqi_b(MSARegister wd, MSARegister ws, uint32_t imm5); |
| 1138 void ceqi_h(MSARegister wd, MSARegister ws, uint32_t imm5); |
| 1139 void ceqi_w(MSARegister wd, MSARegister ws, uint32_t imm5); |
| 1140 void ceqi_d(MSARegister wd, MSARegister ws, uint32_t imm5); |
| 1141 void clti_s_b(MSARegister wd, MSARegister ws, uint32_t imm5); |
| 1142 void clti_s_h(MSARegister wd, MSARegister ws, uint32_t imm5); |
| 1143 void clti_s_w(MSARegister wd, MSARegister ws, uint32_t imm5); |
| 1144 void clti_s_d(MSARegister wd, MSARegister ws, uint32_t imm5); |
| 1145 void clti_u_b(MSARegister wd, MSARegister ws, uint32_t imm5); |
| 1146 void clti_u_h(MSARegister wd, MSARegister ws, uint32_t imm5); |
| 1147 void clti_u_w(MSARegister wd, MSARegister ws, uint32_t imm5); |
| 1148 void clti_u_d(MSARegister wd, MSARegister ws, uint32_t imm5); |
| 1149 void clei_s_b(MSARegister wd, MSARegister ws, uint32_t imm5); |
| 1150 void clei_s_h(MSARegister wd, MSARegister ws, uint32_t imm5); |
| 1151 void clei_s_w(MSARegister wd, MSARegister ws, uint32_t imm5); |
| 1152 void clei_s_d(MSARegister wd, MSARegister ws, uint32_t imm5); |
| 1153 void clei_u_b(MSARegister wd, MSARegister ws, uint32_t imm5); |
| 1154 void clei_u_h(MSARegister wd, MSARegister ws, uint32_t imm5); |
| 1155 void clei_u_w(MSARegister wd, MSARegister ws, uint32_t imm5); |
| 1156 void clei_u_d(MSARegister wd, MSARegister ws, uint32_t imm5); |
| 1157 |
| 1158 void andi_b(MSARegister wd, MSARegister ws, uint32_t imm8); |
| 1159 void ori_b(MSARegister wd, MSARegister ws, uint32_t imm8); |
| 1160 void nori_b(MSARegister wd, MSARegister ws, uint32_t imm8); |
| 1161 void xori_b(MSARegister wd, MSARegister ws, uint32_t imm8); |
| 1162 void bmnzi_b(MSARegister wd, MSARegister ws, uint32_t imm8); |
| 1163 void bmzi_b(MSARegister wd, MSARegister ws, uint32_t imm8); |
| 1164 void bseli_b(MSARegister wd, MSARegister ws, uint32_t imm8); |
| 1165 void shf_b(MSARegister wd, MSARegister ws, uint32_t imm8); |
| 1166 void shf_h(MSARegister wd, MSARegister ws, uint32_t imm8); |
| 1167 void shf_w(MSARegister wd, MSARegister ws, uint32_t imm8); |
| 1168 |
| 1169 void and_v(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1170 void or_v(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1171 void nor_v(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1172 void xor_v(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1173 void bmnz_v(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1174 void bmz_v(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1175 void bsel_v(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1176 |
| 1177 void fill_b(MSARegister wd, Register rs); |
| 1178 void fill_h(MSARegister wd, Register rs); |
| 1179 void fill_w(MSARegister wd, Register rs); |
| 1180 void pcnt_b(MSARegister wd, MSARegister ws); |
| 1181 void pcnt_h(MSARegister wd, MSARegister ws); |
| 1182 void pcnt_w(MSARegister wd, MSARegister ws); |
| 1183 void pcnt_d(MSARegister wd, MSARegister ws); |
| 1184 void nloc_b(MSARegister wd, MSARegister ws); |
| 1185 void nloc_h(MSARegister wd, MSARegister ws); |
| 1186 void nloc_w(MSARegister wd, MSARegister ws); |
| 1187 void nloc_d(MSARegister wd, MSARegister ws); |
| 1188 void nlzc_b(MSARegister wd, MSARegister ws); |
| 1189 void nlzc_h(MSARegister wd, MSARegister ws); |
| 1190 void nlzc_w(MSARegister wd, MSARegister ws); |
| 1191 void nlzc_d(MSARegister wd, MSARegister ws); |
| 1192 |
| 1193 void fclass_w(MSARegister wd, MSARegister ws); |
| 1194 void fclass_d(MSARegister wd, MSARegister ws); |
| 1195 void ftrunc_s_w(MSARegister wd, MSARegister ws); |
| 1196 void ftrunc_s_d(MSARegister wd, MSARegister ws); |
| 1197 void ftrunc_u_w(MSARegister wd, MSARegister ws); |
| 1198 void ftrunc_u_d(MSARegister wd, MSARegister ws); |
| 1199 void fsqrt_w(MSARegister wd, MSARegister ws); |
| 1200 void fsqrt_d(MSARegister wd, MSARegister ws); |
| 1201 void frsqrt_w(MSARegister wd, MSARegister ws); |
| 1202 void frsqrt_d(MSARegister wd, MSARegister ws); |
| 1203 void frcp_w(MSARegister wd, MSARegister ws); |
| 1204 void frcp_d(MSARegister wd, MSARegister ws); |
| 1205 void frint_w(MSARegister wd, MSARegister ws); |
| 1206 void frint_d(MSARegister wd, MSARegister ws); |
| 1207 void flog2_w(MSARegister wd, MSARegister ws); |
| 1208 void flog2_d(MSARegister wd, MSARegister ws); |
| 1209 void fexupl_w(MSARegister wd, MSARegister ws); |
| 1210 void fexupl_d(MSARegister wd, MSARegister ws); |
| 1211 void fexupr_w(MSARegister wd, MSARegister ws); |
| 1212 void fexupr_d(MSARegister wd, MSARegister ws); |
| 1213 void ffql_w(MSARegister wd, MSARegister ws); |
| 1214 void ffql_d(MSARegister wd, MSARegister ws); |
| 1215 void ffqr_w(MSARegister wd, MSARegister ws); |
| 1216 void ffqr_d(MSARegister wd, MSARegister ws); |
| 1217 void ftint_s_w(MSARegister wd, MSARegister ws); |
| 1218 void ftint_s_d(MSARegister wd, MSARegister ws); |
| 1219 void ftint_u_w(MSARegister wd, MSARegister ws); |
| 1220 void ftint_u_d(MSARegister wd, MSARegister ws); |
| 1221 void ffint_s_w(MSARegister wd, MSARegister ws); |
| 1222 void ffint_s_d(MSARegister wd, MSARegister ws); |
| 1223 void ffint_u_w(MSARegister wd, MSARegister ws); |
| 1224 void ffint_u_d(MSARegister wd, MSARegister ws); |
| 1225 |
| 1226 void sll_b(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1227 void sll_h(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1228 void sll_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1229 void sll_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1230 void sra_b(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1231 void sra_h(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1232 void sra_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1233 void sra_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1234 void srl_b(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1235 void srl_h(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1236 void srl_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1237 void srl_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1238 void bclr_b(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1239 void bclr_h(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1240 void bclr_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1241 void bclr_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1242 void bset_b(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1243 void bset_h(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1244 void bset_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1245 void bset_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1246 void bneg_b(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1247 void bneg_h(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1248 void bneg_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1249 void bneg_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1250 void binsl_b(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1251 void binsl_h(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1252 void binsl_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1253 void binsl_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1254 void binsr_b(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1255 void binsr_h(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1256 void binsr_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1257 void binsr_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1258 void addv_b(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1259 void addv_h(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1260 void addv_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1261 void addv_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1262 void subv_b(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1263 void subv_h(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1264 void subv_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1265 void subv_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1266 void max_s_b(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1267 void max_s_h(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1268 void max_s_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1269 void max_s_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1270 void max_u_b(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1271 void max_u_h(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1272 void max_u_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1273 void max_u_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1274 void min_s_b(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1275 void min_s_h(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1276 void min_s_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1277 void min_s_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1278 void min_u_b(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1279 void min_u_h(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1280 void min_u_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1281 void min_u_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1282 void max_a_b(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1283 void max_a_h(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1284 void max_a_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1285 void max_a_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1286 void min_a_b(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1287 void min_a_h(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1288 void min_a_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1289 void min_a_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1290 void ceq_b(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1291 void ceq_h(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1292 void ceq_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1293 void ceq_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1294 void clt_s_b(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1295 void clt_s_h(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1296 void clt_s_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1297 void clt_s_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1298 void clt_u_b(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1299 void clt_u_h(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1300 void clt_u_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1301 void clt_u_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1302 void cle_s_b(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1303 void cle_s_h(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1304 void cle_s_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1305 void cle_s_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1306 void cle_u_b(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1307 void cle_u_h(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1308 void cle_u_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1309 void cle_u_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1310 void add_a_b(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1311 void add_a_h(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1312 void add_a_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1313 void add_a_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1314 void adds_a_b(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1315 void adds_a_h(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1316 void adds_a_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1317 void adds_a_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1318 void adds_s_b(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1319 void adds_s_h(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1320 void adds_s_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1321 void adds_s_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1322 void adds_u_b(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1323 void adds_u_h(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1324 void adds_u_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1325 void adds_u_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1326 void ave_s_b(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1327 void ave_s_h(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1328 void ave_s_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1329 void ave_s_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1330 void ave_u_b(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1331 void ave_u_h(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1332 void ave_u_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1333 void ave_u_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1334 void aver_s_b(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1335 void aver_s_h(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1336 void aver_s_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1337 void aver_s_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1338 void aver_u_b(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1339 void aver_u_h(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1340 void aver_u_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1341 void aver_u_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1342 void subs_s_b(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1343 void subs_s_h(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1344 void subs_s_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1345 void subs_s_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1346 void subs_u_b(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1347 void subs_u_h(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1348 void subs_u_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1349 void subs_u_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1350 void subsus_u_b(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1351 void subsus_u_h(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1352 void subsus_u_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1353 void subsus_u_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1354 void subsus_s_b(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1355 void subsus_s_h(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1356 void subsus_s_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1357 void subsus_s_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1358 void subsuu_u_b(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1359 void subsuu_u_h(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1360 void subsuu_u_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1361 void subsuu_u_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1362 void subsuu_s_b(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1363 void subsuu_s_h(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1364 void subsuu_s_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1365 void subsuu_s_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1366 void asub_s_b(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1367 void asub_s_h(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1368 void asub_s_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1369 void asub_s_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1370 void asub_u_b(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1371 void asub_u_h(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1372 void asub_u_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1373 void asub_u_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1374 void mulv_b(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1375 void mulv_h(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1376 void mulv_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1377 void mulv_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1378 void maddv_b(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1379 void maddv_h(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1380 void maddv_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1381 void maddv_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1382 void msubv_b(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1383 void msubv_h(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1384 void msubv_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1385 void msubv_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1386 void div_s_b(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1387 void div_s_h(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1388 void div_s_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1389 void div_s_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1390 void div_u_b(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1391 void div_u_h(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1392 void div_u_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1393 void div_u_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1394 void mod_s_b(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1395 void mod_s_h(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1396 void mod_s_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1397 void mod_s_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1398 void mod_u_b(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1399 void mod_u_h(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1400 void mod_u_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1401 void mod_u_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1402 void dotp_s_b(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1403 void dotp_s_h(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1404 void dotp_s_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1405 void dotp_s_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1406 void dotp_u_b(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1407 void dotp_u_h(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1408 void dotp_u_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1409 void dotp_u_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1410 void dpadd_s_b(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1411 void dpadd_s_h(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1412 void dpadd_s_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1413 void dpadd_s_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1414 void dpadd_u_b(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1415 void dpadd_u_h(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1416 void dpadd_u_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1417 void dpadd_u_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1418 void dpsub_s_b(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1419 void dpsub_s_h(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1420 void dpsub_s_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1421 void dpsub_s_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1422 void dpsub_u_b(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1423 void dpsub_u_h(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1424 void dpsub_u_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1425 void dpsub_u_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1426 void sld_b(MSARegister wd, MSARegister ws, Register rt); |
| 1427 void sld_h(MSARegister wd, MSARegister ws, Register rt); |
| 1428 void sld_w(MSARegister wd, MSARegister ws, Register rt); |
| 1429 void sld_d(MSARegister wd, MSARegister ws, Register rt); |
| 1430 void splat_b(MSARegister wd, MSARegister ws, Register rt); |
| 1431 void splat_h(MSARegister wd, MSARegister ws, Register rt); |
| 1432 void splat_w(MSARegister wd, MSARegister ws, Register rt); |
| 1433 void splat_d(MSARegister wd, MSARegister ws, Register rt); |
| 1434 void pckev_b(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1435 void pckev_h(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1436 void pckev_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1437 void pckev_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1438 void pckod_b(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1439 void pckod_h(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1440 void pckod_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1441 void pckod_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1442 void ilvl_b(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1443 void ilvl_h(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1444 void ilvl_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1445 void ilvl_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1446 void ilvr_b(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1447 void ilvr_h(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1448 void ilvr_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1449 void ilvr_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1450 void ilvev_b(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1451 void ilvev_h(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1452 void ilvev_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1453 void ilvev_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1454 void ilvod_b(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1455 void ilvod_h(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1456 void ilvod_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1457 void ilvod_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1458 void vshf_b(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1459 void vshf_h(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1460 void vshf_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1461 void vshf_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1462 void srar_b(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1463 void srar_h(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1464 void srar_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1465 void srar_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1466 void srlr_b(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1467 void srlr_h(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1468 void srlr_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1469 void srlr_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1470 void hadd_s_b(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1471 void hadd_s_h(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1472 void hadd_s_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1473 void hadd_s_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1474 void hadd_u_b(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1475 void hadd_u_h(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1476 void hadd_u_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1477 void hadd_u_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1478 void hsub_s_b(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1479 void hsub_s_h(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1480 void hsub_s_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1481 void hsub_s_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1482 void hsub_u_b(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1483 void hsub_u_h(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1484 void hsub_u_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1485 void hsub_u_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1486 |
| 1487 void fcaf_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1488 void fcaf_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1489 void fcun_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1490 void fcun_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1491 void fceq_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1492 void fceq_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1493 void fcueq_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1494 void fcueq_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1495 void fclt_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1496 void fclt_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1497 void fcult_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1498 void fcult_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1499 void fcle_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1500 void fcle_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1501 void fcule_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1502 void fcule_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1503 void fsaf_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1504 void fsaf_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1505 void fsun_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1506 void fsun_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1507 void fseq_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1508 void fseq_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1509 void fsueq_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1510 void fsueq_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1511 void fslt_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1512 void fslt_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1513 void fsult_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1514 void fsult_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1515 void fsle_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1516 void fsle_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1517 void fsule_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1518 void fsule_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1519 void fadd_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1520 void fadd_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1521 void fsub_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1522 void fsub_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1523 void fmul_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1524 void fmul_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1525 void fdiv_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1526 void fdiv_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1527 void fmadd_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1528 void fmadd_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1529 void fmsub_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1530 void fmsub_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1531 void fexp2_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1532 void fexp2_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1533 void fexdo_h(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1534 void fexdo_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1535 void ftq_h(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1536 void ftq_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1537 void fmin_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1538 void fmin_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1539 void fmin_a_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1540 void fmin_a_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1541 void fmax_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1542 void fmax_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1543 void fmax_a_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1544 void fmax_a_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1545 void fcor_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1546 void fcor_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1547 void fcune_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1548 void fcune_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1549 void fcne_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1550 void fcne_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1551 void mul_q_h(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1552 void mul_q_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1553 void madd_q_h(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1554 void madd_q_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1555 void msub_q_h(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1556 void msub_q_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1557 void fsor_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1558 void fsor_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1559 void fsune_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1560 void fsune_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1561 void fsne_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1562 void fsne_d(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1563 void mulr_q_h(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1564 void mulr_q_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1565 void maddr_q_h(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1566 void maddr_q_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1567 void msubr_q_h(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1568 void msubr_q_w(MSARegister wd, MSARegister ws, MSARegister wt); |
| 1569 |
| 1570 void sldi_b(MSARegister wd, MSARegister ws, uint32_t n); |
| 1571 void sldi_h(MSARegister wd, MSARegister ws, uint32_t n); |
| 1572 void sldi_w(MSARegister wd, MSARegister ws, uint32_t n); |
| 1573 void sldi_d(MSARegister wd, MSARegister ws, uint32_t n); |
| 1574 void splati_b(MSARegister wd, MSARegister ws, uint32_t n); |
| 1575 void splati_h(MSARegister wd, MSARegister ws, uint32_t n); |
| 1576 void splati_w(MSARegister wd, MSARegister ws, uint32_t n); |
| 1577 void splati_d(MSARegister wd, MSARegister ws, uint32_t n); |
| 1578 void copy_s_b(Register rd, MSARegister ws, uint32_t n); |
| 1579 void copy_s_h(Register rd, MSARegister ws, uint32_t n); |
| 1580 void copy_s_w(Register rd, MSARegister ws, uint32_t n); |
| 1581 void copy_u_b(Register rd, MSARegister ws, uint32_t n); |
| 1582 void copy_u_h(Register rd, MSARegister ws, uint32_t n); |
| 1583 void copy_u_w(Register rd, MSARegister ws, uint32_t n); |
| 1584 void insert_b(MSARegister wd, uint32_t n, Register rs); |
| 1585 void insert_h(MSARegister wd, uint32_t n, Register rs); |
| 1586 void insert_w(MSARegister wd, uint32_t n, Register rs); |
| 1587 void insve_b(MSARegister wd, uint32_t n, MSARegister ws); |
| 1588 void insve_h(MSARegister wd, uint32_t n, MSARegister ws); |
| 1589 void insve_w(MSARegister wd, uint32_t n, MSARegister ws); |
| 1590 void insve_d(MSARegister wd, uint32_t n, MSARegister ws); |
| 1591 void move_v(MSARegister wd, MSARegister ws); |
| 1592 void ctcmsa(MSAControlRegister cd, Register rs); |
| 1593 void cfcmsa(Register rd, MSAControlRegister cs); |
| 1594 |
| 1595 void slli_b(MSARegister wd, MSARegister ws, uint32_t m); |
| 1596 void slli_h(MSARegister wd, MSARegister ws, uint32_t m); |
| 1597 void slli_w(MSARegister wd, MSARegister ws, uint32_t m); |
| 1598 void slli_d(MSARegister wd, MSARegister ws, uint32_t m); |
| 1599 void srai_b(MSARegister wd, MSARegister ws, uint32_t m); |
| 1600 void srai_h(MSARegister wd, MSARegister ws, uint32_t m); |
| 1601 void srai_w(MSARegister wd, MSARegister ws, uint32_t m); |
| 1602 void srai_d(MSARegister wd, MSARegister ws, uint32_t m); |
| 1603 void srli_b(MSARegister wd, MSARegister ws, uint32_t m); |
| 1604 void srli_h(MSARegister wd, MSARegister ws, uint32_t m); |
| 1605 void srli_w(MSARegister wd, MSARegister ws, uint32_t m); |
| 1606 void srli_d(MSARegister wd, MSARegister ws, uint32_t m); |
| 1607 void bclri_b(MSARegister wd, MSARegister ws, uint32_t m); |
| 1608 void bclri_h(MSARegister wd, MSARegister ws, uint32_t m); |
| 1609 void bclri_w(MSARegister wd, MSARegister ws, uint32_t m); |
| 1610 void bclri_d(MSARegister wd, MSARegister ws, uint32_t m); |
| 1611 void bseti_b(MSARegister wd, MSARegister ws, uint32_t m); |
| 1612 void bseti_h(MSARegister wd, MSARegister ws, uint32_t m); |
| 1613 void bseti_w(MSARegister wd, MSARegister ws, uint32_t m); |
| 1614 void bseti_d(MSARegister wd, MSARegister ws, uint32_t m); |
| 1615 void bnegi_b(MSARegister wd, MSARegister ws, uint32_t m); |
| 1616 void bnegi_h(MSARegister wd, MSARegister ws, uint32_t m); |
| 1617 void bnegi_w(MSARegister wd, MSARegister ws, uint32_t m); |
| 1618 void bnegi_d(MSARegister wd, MSARegister ws, uint32_t m); |
| 1619 void binsli_b(MSARegister wd, MSARegister ws, uint32_t m); |
| 1620 void binsli_h(MSARegister wd, MSARegister ws, uint32_t m); |
| 1621 void binsli_w(MSARegister wd, MSARegister ws, uint32_t m); |
| 1622 void binsli_d(MSARegister wd, MSARegister ws, uint32_t m); |
| 1623 void binsri_b(MSARegister wd, MSARegister ws, uint32_t m); |
| 1624 void binsri_h(MSARegister wd, MSARegister ws, uint32_t m); |
| 1625 void binsri_w(MSARegister wd, MSARegister ws, uint32_t m); |
| 1626 void binsri_d(MSARegister wd, MSARegister ws, uint32_t m); |
| 1627 void sat_s_b(MSARegister wd, MSARegister ws, uint32_t m); |
| 1628 void sat_s_h(MSARegister wd, MSARegister ws, uint32_t m); |
| 1629 void sat_s_w(MSARegister wd, MSARegister ws, uint32_t m); |
| 1630 void sat_s_d(MSARegister wd, MSARegister ws, uint32_t m); |
| 1631 void sat_u_b(MSARegister wd, MSARegister ws, uint32_t m); |
| 1632 void sat_u_h(MSARegister wd, MSARegister ws, uint32_t m); |
| 1633 void sat_u_w(MSARegister wd, MSARegister ws, uint32_t m); |
| 1634 void sat_u_d(MSARegister wd, MSARegister ws, uint32_t m); |
| 1635 void srari_b(MSARegister wd, MSARegister ws, uint32_t m); |
| 1636 void srari_h(MSARegister wd, MSARegister ws, uint32_t m); |
| 1637 void srari_w(MSARegister wd, MSARegister ws, uint32_t m); |
| 1638 void srari_d(MSARegister wd, MSARegister ws, uint32_t m); |
| 1639 void srlri_b(MSARegister wd, MSARegister ws, uint32_t m); |
| 1640 void srlri_h(MSARegister wd, MSARegister ws, uint32_t m); |
| 1641 void srlri_w(MSARegister wd, MSARegister ws, uint32_t m); |
| 1642 void srlri_d(MSARegister wd, MSARegister ws, uint32_t m); |
| 1643 |
984 // Check the code size generated from label to here. | 1644 // Check the code size generated from label to here. |
985 int SizeOfCodeGeneratedSince(Label* label) { | 1645 int SizeOfCodeGeneratedSince(Label* label) { |
986 return pc_offset() - label->pos(); | 1646 return pc_offset() - label->pos(); |
987 } | 1647 } |
988 | 1648 |
989 // Check the number of instructions generated from label to here. | 1649 // Check the number of instructions generated from label to here. |
990 int InstructionsGeneratedSince(Label* label) { | 1650 int InstructionsGeneratedSince(Label* label) { |
991 return SizeOfCodeGeneratedSince(label) / kInstrSize; | 1651 return SizeOfCodeGeneratedSince(label) / kInstrSize; |
992 } | 1652 } |
993 | 1653 |
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1370 CompactBranchType is_compact_branch = CompactBranchType::NO); | 2030 CompactBranchType is_compact_branch = CompactBranchType::NO); |
1371 void GenInstrImmediate(Opcode opcode, Register rs, uint32_t offset21); | 2031 void GenInstrImmediate(Opcode opcode, Register rs, uint32_t offset21); |
1372 void GenInstrImmediate( | 2032 void GenInstrImmediate( |
1373 Opcode opcode, int32_t offset26, | 2033 Opcode opcode, int32_t offset26, |
1374 CompactBranchType is_compact_branch = CompactBranchType::NO); | 2034 CompactBranchType is_compact_branch = CompactBranchType::NO); |
1375 | 2035 |
1376 | 2036 |
1377 void GenInstrJump(Opcode opcode, | 2037 void GenInstrJump(Opcode opcode, |
1378 uint32_t address); | 2038 uint32_t address); |
1379 | 2039 |
| 2040 // MSA |
| 2041 void GenInstrMsaI8(SecondaryField operation, uint32_t imm8, MSARegister ws, |
| 2042 MSARegister wd); |
| 2043 |
| 2044 void GenInstrMsaI5(SecondaryField operation, SecondaryField df, int32_t imm5, |
| 2045 MSARegister ws, MSARegister wd); |
| 2046 |
| 2047 void GenInstrMsaBit(SecondaryField operation, SecondaryField df, uint32_t m, |
| 2048 MSARegister ws, MSARegister wd); |
| 2049 |
| 2050 void GenInstrMsaI10(SecondaryField operation, SecondaryField df, |
| 2051 int32_t imm10, MSARegister wd); |
| 2052 |
| 2053 template <typename RegType> |
| 2054 void GenInstrMsa3R(SecondaryField operation, SecondaryField df, RegType t, |
| 2055 MSARegister ws, MSARegister wd); |
| 2056 |
| 2057 template <typename DstType, typename SrcType> |
| 2058 void GenInstrMsaElm(SecondaryField operation, SecondaryField df, uint32_t n, |
| 2059 SrcType src, DstType dst); |
| 2060 |
| 2061 void GenInstrMsa3RF(SecondaryField operation, uint32_t df, MSARegister wt, |
| 2062 MSARegister ws, MSARegister wd); |
| 2063 |
| 2064 void GenInstrMsaVec(SecondaryField operation, MSARegister wt, MSARegister ws, |
| 2065 MSARegister wd); |
| 2066 |
| 2067 void GenInstrMsaMI10(SecondaryField operation, int32_t s10, Register rs, |
| 2068 MSARegister wd); |
| 2069 |
| 2070 void GenInstrMsa2R(SecondaryField operation, SecondaryField df, |
| 2071 MSARegister ws, MSARegister wd); |
| 2072 |
| 2073 void GenInstrMsa2RF(SecondaryField operation, SecondaryField df, |
| 2074 MSARegister ws, MSARegister wd); |
| 2075 |
| 2076 void GenInstrMsaBranch(SecondaryField operation, MSARegister wt, |
| 2077 int32_t offset16); |
| 2078 |
| 2079 inline bool is_valid_msa_df_m(SecondaryField bit_df, uint32_t m) { |
| 2080 switch (bit_df) { |
| 2081 case BIT_DF_b: |
| 2082 return is_uint3(m); |
| 2083 case BIT_DF_h: |
| 2084 return is_uint4(m); |
| 2085 case BIT_DF_w: |
| 2086 return is_uint5(m); |
| 2087 case BIT_DF_d: |
| 2088 return is_uint6(m); |
| 2089 default: |
| 2090 return false; |
| 2091 } |
| 2092 } |
| 2093 |
| 2094 inline bool is_valid_msa_df_n(SecondaryField elm_df, uint32_t n) { |
| 2095 switch (elm_df) { |
| 2096 case ELM_DF_B: |
| 2097 return is_uint4(n); |
| 2098 case ELM_DF_H: |
| 2099 return is_uint3(n); |
| 2100 case ELM_DF_W: |
| 2101 return is_uint2(n); |
| 2102 case ELM_DF_D: |
| 2103 return is_uint1(n); |
| 2104 default: |
| 2105 return false; |
| 2106 } |
| 2107 } |
1380 | 2108 |
1381 // Labels. | 2109 // Labels. |
1382 void print(Label* L); | 2110 void print(Label* L); |
1383 void bind_to(Label* L, int pos); | 2111 void bind_to(Label* L, int pos); |
1384 void next(Label* L, bool is_internal); | 2112 void next(Label* L, bool is_internal); |
1385 | 2113 |
1386 // One trampoline consists of: | 2114 // One trampoline consists of: |
1387 // - space for trampoline slots, | 2115 // - space for trampoline slots, |
1388 // - space for labels. | 2116 // - space for labels. |
1389 // | 2117 // |
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1471 public: | 2199 public: |
1472 explicit EnsureSpace(Assembler* assembler) { | 2200 explicit EnsureSpace(Assembler* assembler) { |
1473 assembler->CheckBuffer(); | 2201 assembler->CheckBuffer(); |
1474 } | 2202 } |
1475 }; | 2203 }; |
1476 | 2204 |
1477 } // namespace internal | 2205 } // namespace internal |
1478 } // namespace v8 | 2206 } // namespace v8 |
1479 | 2207 |
1480 #endif // V8_ARM_ASSEMBLER_MIPS_H_ | 2208 #endif // V8_ARM_ASSEMBLER_MIPS_H_ |
OLD | NEW |