s390: optimize for int 64-bit operation and cleanup

src/s390/simulator-s390.cc

Index: src/s390/simulator-s390.cc
diff --git a/src/s390/simulator-s390.cc b/src/s390/simulator-s390.cc
index b86132f12c7e0dae7715a22716c642ceba42f0d4..1ed9b0e281550cf8994ee2227a516631e5cb12e1 100644
--- a/src/s390/simulator-s390.cc
+++ b/src/s390/simulator-s390.cc
@@ -8769,8 +8769,6 @@ EVALUATE(DEBR) {
   float fr2_val = get_float32_from_d_register(r2);
   fr1_val /= fr2_val;
   set_d_register_from_float32(r1, fr1_val);
-  SetS390ConditionCode<float>(fr1_val, 0);
-
   return length;
 }
 
@@ -8870,7 +8868,6 @@ EVALUATE(MEEBR) {
   float fr2_val = get_float32_from_d_register(r2);
   fr1_val *= fr2_val;
   set_d_register_from_float32(r1, fr1_val);
-  SetS390ConditionCode<float>(fr1_val, 0);
   return length;
 }
 
@@ -8922,7 +8919,6 @@ EVALUATE(MDBR) {
   double r2_val = get_double_from_d_register(r2);
   r1_val *= r2_val;
   set_d_register_from_double(r1, r1_val);
-  SetS390ConditionCode<double>(r1_val, 0);
   return length;
 }
 
@@ -8933,7 +8929,6 @@ EVALUATE(DDBR) {
   double r2_val = get_double_from_d_register(r2);
   r1_val /= r2_val;
   set_d_register_from_double(r1, r1_val);
-  SetS390ConditionCode<double>(r1_val, 0);
   return length;
 }
 
@@ -10435,12 +10430,14 @@ EVALUATE(DLGR) {
   dividend += get_register(r1 + 1);
   uint64_t remainder = dividend % r2_val;
   uint64_t quotient = dividend / r2_val;
-  r1_val = remainder;
   set_register(r1, remainder);
   set_register(r1 + 1, quotient);
   return length;
 #else
+  // 32 bit arch doesn't support __int128 type
+  USE(instr);
   UNREACHABLE();
+  return 0;
 #endif
 }
 
@@ -10926,8 +10923,10 @@ EVALUATE(AG) {
   int64_t b2_val = (b2 == 0) ? 0 : get_register(b2);
   int64_t alu_out = get_register(r1);
   int64_t mem_val = ReadDW(b2_val + x2_val + d2);
+  bool isOF = CheckOverflowForIntAdd(alu_out, mem_val, int64_t);
   alu_out += mem_val;
-  SetS390ConditionCode<int32_t>(alu_out, 0);
+  SetS390ConditionCode<int64_t>(alu_out, 0);
+  SetS390OverflowCode(isOF);
   set_register(r1, alu_out);
   return length;
 }
@@ -10939,8 +10938,10 @@ EVALUATE(SG) {
   int64_t b2_val = (b2 == 0) ? 0 : get_register(b2);
   int64_t alu_out = get_register(r1);
   int64_t mem_val = ReadDW(b2_val + x2_val + d2);
+  bool isOF = CheckOverflowForIntSub(alu_out, mem_val, int64_t);
   alu_out -= mem_val;
   SetS390ConditionCode<int32_t>(alu_out, 0);
+  SetS390OverflowCode(isOF);
   set_register(r1, alu_out);
   return length;
 }
@@ -10994,9 +10995,19 @@ EVALUATE(MSG) {
 }
 
 EVALUATE(DSG) {
-  UNIMPLEMENTED();
-  USE(instr);
-  return 0;
+  DCHECK_OPCODE(DSG);
+  DECODE_RXY_A_INSTRUCTION(r1, x2, b2, d2);
+  DCHECK(r1 % 2 == 0);
+  int64_t b2_val = (b2 == 0) ? 0 : get_register(b2);
+  int64_t x2_val = (x2 == 0) ? 0 : get_register(x2);
+  intptr_t d2_val = d2;
+  int64_t mem_val = ReadDW(b2_val + d2_val + x2_val);
+  int64_t r1_val = get_register(r1 + 1);
+  int64_t quotient = r1_val / mem_val;
+  int64_t remainder = r1_val % mem_val;
+  set_register(r1, remainder);
+  set_register(r1 + 1, quotient);
+  return length;
 }
 
 EVALUATE(CVBG) {
@@ -11604,9 +11615,27 @@ EVALUATE(MLG) {
 }
 
 EVALUATE(DLG) {
-  UNIMPLEMENTED();
+  DCHECK_OPCODE(DLG);
+#ifdef V8_TARGET_ARCH_S390X
+  DECODE_RXY_A_INSTRUCTION(r1, x2, b2, d2);
+  uint64_t r1_val = get_register(r1);
+  int64_t x2_val = (x2 == 0) ? 0 : get_register(x2);
+  int64_t b2_val = (b2 == 0) ? 0 : get_register(b2);
+  DCHECK(r1 % 2 == 0);
+  unsigned __int128 dividend = static_cast<unsigned __int128>(r1_val) << 64;
+  dividend += get_register(r1 + 1);
+  int64_t mem_val = ReadDW(b2_val + x2_val + d2);
+  uint64_t remainder = dividend % mem_val;
+  uint64_t quotient = dividend / mem_val;
+  set_register(r1, remainder);
+  set_register(r1 + 1, quotient);
+  return length;
+#else
+  // 32 bit arch doesn't support __int128 type
   USE(instr);
+  UNREACHABLE();
   return 0;
+#endif
 }
 
 EVALUATE(ALCG) {
@@ -12509,16 +12538,14 @@ EVALUATE(CIB) {
 
 EVALUATE(LDEB) {
   DCHECK_OPCODE(LDEB);
-  // Load Float
   DECODE_RXE_INSTRUCTION(r1, b2, x2, d2);
   int rb = b2;
   int rx = x2;
   int offset = d2;
   int64_t rb_val = (rb == 0) ? 0 : get_register(rb);
   int64_t rx_val = (rx == 0) ? 0 : get_register(rx);
-  double ret =
-      static_cast<double>(*reinterpret_cast<float*>(rx_val + rb_val + offset));
-  set_d_register_from_double(r1, ret);
+  float fval = ReadFloat(rx_val + rb_val + offset);
+  set_d_register_from_double(r1, static_cast<double>(fval));
   return length;
 }
 
@@ -12560,15 +12587,31 @@ EVALUATE(CEB) {
 }
 
 EVALUATE(AEB) {
-  UNIMPLEMENTED();
-  USE(instr);
-  return 0;
+  DCHECK_OPCODE(AEB);
+  DECODE_RXE_INSTRUCTION(r1, b2, x2, d2);
+  int64_t b2_val = (b2 == 0) ? 0 : get_register(b2);
+  int64_t x2_val = (x2 == 0) ? 0 : get_register(x2);
+  intptr_t d2_val = d2;
+  float r1_val = get_float32_from_d_register(r1);
+  float fval = ReadFloat(b2_val + x2_val + d2_val);
+  r1_val += fval;
+  set_d_register_from_float32(r1, r1_val);
+  SetS390ConditionCode<float>(r1_val, 0);
+  return length;
 }
 
 EVALUATE(SEB) {
-  UNIMPLEMENTED();
-  USE(instr);
-  return 0;
+  DCHECK_OPCODE(SEB);
+  DECODE_RXE_INSTRUCTION(r1, b2, x2, d2);
+  int64_t b2_val = (b2 == 0) ? 0 : get_register(b2);
+  int64_t x2_val = (x2 == 0) ? 0 : get_register(x2);
+  intptr_t d2_val = d2;
+  float r1_val = get_float32_from_d_register(r1);
+  float fval = ReadFloat(b2_val + x2_val + d2_val);
+  r1_val -= fval;
+  set_d_register_from_float32(r1, r1_val);
+  SetS390ConditionCode<float>(r1_val, 0);
+  return length;
 }
 
 EVALUATE(MDEB) {
@@ -12578,9 +12621,16 @@ EVALUATE(MDEB) {
 }
 
 EVALUATE(DEB) {
-  UNIMPLEMENTED();
-  USE(instr);
-  return 0;
+  DCHECK_OPCODE(DEB);
+  DECODE_RXE_INSTRUCTION(r1, b2, x2, d2);
+  int64_t b2_val = (b2 == 0) ? 0 : get_register(b2);
+  int64_t x2_val = (x2 == 0) ? 0 : get_register(x2);
+  intptr_t d2_val = d2;
+  float r1_val = get_float32_from_d_register(r1);
+  float fval = ReadFloat(b2_val + x2_val + d2_val);
+  r1_val /= fval;
+  set_d_register_from_float32(r1, r1_val);
+  return length;
 }
 
 EVALUATE(MAEB) {
@@ -12633,9 +12683,16 @@ EVALUATE(SQDB) {
 }
 
 EVALUATE(MEEB) {
-  UNIMPLEMENTED();
-  USE(instr);
-  return 0;
+  DCHECK_OPCODE(MEEB);
+  DECODE_RXE_INSTRUCTION(r1, b2, x2, d2);
+  int64_t b2_val = (b2 == 0) ? 0 : get_register(b2);
+  int64_t x2_val = (x2 == 0) ? 0 : get_register(x2);
+  intptr_t d2_val = d2;
+  float r1_val = get_float32_from_d_register(r1);
+  float fval = ReadFloat(b2_val + x2_val + d2_val);
+  r1_val *= fval;
+  set_d_register_from_float32(r1, r1_val);
+  return length;
 }
 
 EVALUATE(KDB) {
@@ -12696,7 +12753,6 @@ EVALUATE(MDB) {
   double dbl_val = ReadDouble(b2_val + x2_val + d2_val);
   r1_val *= dbl_val;
   set_d_register_from_double(r1, r1_val);
-  SetS390ConditionCode<double>(r1_val, 0);
   return length;
 }
 
@@ -12710,7 +12766,6 @@ EVALUATE(DDB) {
   double dbl_val = ReadDouble(b2_val + x2_val + d2_val);
   r1_val /= dbl_val;
   set_d_register_from_double(r1, r1_val);
-  SetS390ConditionCode<double>(r1_val, 0);
   return length;
 }