Add several SIMD opcodes to IA32

src/compiler/ia32/code-generator-ia32.cc

Index: src/compiler/ia32/code-generator-ia32.cc
diff --git a/src/compiler/ia32/code-generator-ia32.cc b/src/compiler/ia32/code-generator-ia32.cc
index f94f6bc21184630ecee0b5bb1d47fc7bd6f9b7db..d1c210e13ed91924878b277e3a19bf5249de5729 100644
--- a/src/compiler/ia32/code-generator-ia32.cc
+++ b/src/compiler/ia32/code-generator-ia32.cc
@@ -1906,6 +1906,41 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
       __ xchg(i.InputRegister(index), operand);
       break;
     }
+    case kIA32Int32x4Create: {

[bbudge, 2017/02/24 18:28:54]

Could you rename the opcode kIA32Int32x4Splat? I'm eliminating the Create ops
since they're really splats.

[Jing, 2017/02/25 02:49:04]

Done.

+      XMMRegister dst = i.OutputSimd128Register();
+      __ movd(dst, i.InputOperand(0));
+      __ pshufd(dst, dst, 0x0);
+      break;
+    }
+    case kIA32Int32x4ExtractLane: {
+      __ Pextrd(i.OutputRegister(), i.InputSimd128Register(0), i.InputInt8(1));
+      break;
+    }
+    case kIA32Int32x4ReplaceLane: {
+      CpuFeatureScope sse_scope(masm(), SSE4_1);
+      __ pinsrd(i.OutputSimd128Register(), i.InputOperand(2), i.InputInt8(1));
+      break;
+    }
+    case kSSEInt32x4Add: {
+      __ paddd(i.OutputSimd128Register(), i.InputOperand(1));
+      break;
+    }
+    case kSSEInt32x4Sub: {
+      __ psubd(i.OutputSimd128Register(), i.InputOperand(1));
+      break;
+    }
+    case kAVXInt32x4Add: {
+      CpuFeatureScope avx_scope(masm(), AVX);
+      __ vpaddd(i.OutputSimd128Register(), i.InputSimd128Register(0),
+                i.InputOperand(1));
+      break;
+    }
+    case kAVXInt32x4Sub: {
+      CpuFeatureScope avx_scope(masm(), AVX);
+      __ vpsubd(i.OutputSimd128Register(), i.InputSimd128Register(0),
+                i.InputOperand(1));
+      break;
+    }
     case kCheckedLoadInt8:
       ASSEMBLE_CHECKED_LOAD_INTEGER(movsx_b);
       break;